This patch series adds ADC support for RK3588 and updates
the DT bindings for the same.
To test ADC support on Rock 5B board, a voltage divider circuit
was created using the gpio pin 22 ( SARADC_IN4 ) and few more
tests were ran for testing the buffer and trigger support using
the iio_generic_buffer tool.
Changes in v2
- Add from address in patches 1 and 2.
- Create separate patches for adding new device support and changes to
the old device code.
- Make use of FIELD_PREP in patch 2.
- Move the enablement of clocks at it's original position in patch 3
- Add Reviewed-by tag in patches 4 and 5.
- Add an Acked-by tag in patch 8.
Shreeya Patel (8):
iio: adc: rockchip_saradc: Add callback functions
iio: adc: rockchip_saradc: Add support for RK3588
iio: adc: rockchip_saradc: Make use of devm_clk_get_enabled
iio: adc: rockchip_saradc: Use of_device_get_match_data
iio: adc: rockchip_saradc: Match alignment with open parenthesis
iio: adc: rockchip_saradc: Use dev_err_probe
arm64: dts: rockchip: Add DT node for ADC support in RK3588
dt-bindings: iio: adc: Add rockchip,rk3588-saradc string
.../bindings/iio/adc/rockchip-saradc.yaml | 1 +
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 +
drivers/iio/adc/rockchip_saradc.c | 262 +++++++++++-------
3 files changed, 168 insertions(+), 107 deletions(-)
--
2.30.2
From: Simon Xue <[email protected]>
Add start, read and power_down callback functions,
which will help in adding new rockchip device support
cleanly.
Signed-off-by: Simon Xue <[email protected]>
Signed-off-by: Shreeya Patel <[email protected]>
---
Changes in v2
- Add a from address.
- Create a separate patch for changes done in the code for old
devices.
drivers/iio/adc/rockchip_saradc.c | 64 +++++++++++++++++++++++++------
1 file changed, 52 insertions(+), 12 deletions(-)
diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
index 79448c5ffc2a..21f9d92a6af4 100644
--- a/drivers/iio/adc/rockchip_saradc.c
+++ b/drivers/iio/adc/rockchip_saradc.c
@@ -38,10 +38,15 @@
#define SARADC_TIMEOUT msecs_to_jiffies(100)
#define SARADC_MAX_CHANNELS 8
+struct rockchip_saradc;
+
struct rockchip_saradc_data {
const struct iio_chan_spec *channels;
int num_channels;
unsigned long clk_rate;
+ void (*start)(struct rockchip_saradc *info, int chn);
+ int (*read)(struct rockchip_saradc *info);
+ void (*power_down)(struct rockchip_saradc *info);
};
struct rockchip_saradc {
@@ -60,27 +65,50 @@ struct rockchip_saradc {
struct notifier_block nb;
};
-static void rockchip_saradc_power_down(struct rockchip_saradc *info)
+static void rockchip_saradc_reset_controller(struct reset_control *reset);
+
+static void rockchip_saradc_start_v1(struct rockchip_saradc *info, int chn)
+{
+ /* 8 clock periods as delay between power up and start cmd */
+ writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC);
+ /* Select the channel to be used and trigger conversion */
+ writel(SARADC_CTRL_POWER_CTRL | (chn & SARADC_CTRL_CHN_MASK) |
+ SARADC_CTRL_IRQ_ENABLE, info->regs + SARADC_CTRL);
+}
+
+static void rockchip_saradc_start(struct rockchip_saradc *info, int chn)
+{
+ info->data->start(info, chn);
+}
+
+static int rockchip_saradc_read_v1(struct rockchip_saradc *info)
+{
+ return readl_relaxed(info->regs + SARADC_DATA);
+}
+
+static int rockchip_saradc_read(struct rockchip_saradc *info)
+{
+ return info->data->read(info);
+}
+
+static void rockchip_saradc_power_down_v1(struct rockchip_saradc *info)
{
- /* Clear irq & power down adc */
writel_relaxed(0, info->regs + SARADC_CTRL);
}
+static void rockchip_saradc_power_down(struct rockchip_saradc *info)
+{
+ if (info->data->power_down)
+ info->data->power_down(info);
+}
+
static int rockchip_saradc_conversion(struct rockchip_saradc *info,
struct iio_chan_spec const *chan)
{
reinit_completion(&info->completion);
- /* 8 clock periods as delay between power up and start cmd */
- writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC);
-
info->last_chan = chan;
-
- /* Select the channel to be used and trigger conversion */
- writel(SARADC_CTRL_POWER_CTRL
- | (chan->channel & SARADC_CTRL_CHN_MASK)
- | SARADC_CTRL_IRQ_ENABLE,
- info->regs + SARADC_CTRL);
+ rockchip_saradc_start(info, chan->channel);
if (!wait_for_completion_timeout(&info->completion, SARADC_TIMEOUT))
return -ETIMEDOUT;
@@ -123,7 +151,7 @@ static irqreturn_t rockchip_saradc_isr(int irq, void *dev_id)
struct rockchip_saradc *info = dev_id;
/* Read value */
- info->last_val = readl_relaxed(info->regs + SARADC_DATA);
+ info->last_val = rockchip_saradc_read(info);
info->last_val &= GENMASK(info->last_chan->scan_type.realbits - 1, 0);
rockchip_saradc_power_down(info);
@@ -163,6 +191,9 @@ static const struct rockchip_saradc_data saradc_data = {
.channels = rockchip_saradc_iio_channels,
.num_channels = ARRAY_SIZE(rockchip_saradc_iio_channels),
.clk_rate = 1000000,
+ .start = rockchip_saradc_start_v1,
+ .read = rockchip_saradc_read_v1,
+ .power_down = rockchip_saradc_power_down_v1,
};
static const struct iio_chan_spec rockchip_rk3066_tsadc_iio_channels[] = {
@@ -174,6 +205,9 @@ static const struct rockchip_saradc_data rk3066_tsadc_data = {
.channels = rockchip_rk3066_tsadc_iio_channels,
.num_channels = ARRAY_SIZE(rockchip_rk3066_tsadc_iio_channels),
.clk_rate = 50000,
+ .start = rockchip_saradc_start_v1,
+ .read = rockchip_saradc_read_v1,
+ .power_down = rockchip_saradc_power_down_v1,
};
static const struct iio_chan_spec rockchip_rk3399_saradc_iio_channels[] = {
@@ -189,6 +223,9 @@ static const struct rockchip_saradc_data rk3399_saradc_data = {
.channels = rockchip_rk3399_saradc_iio_channels,
.num_channels = ARRAY_SIZE(rockchip_rk3399_saradc_iio_channels),
.clk_rate = 1000000,
+ .start = rockchip_saradc_start_v1,
+ .read = rockchip_saradc_read_v1,
+ .power_down = rockchip_saradc_power_down_v1,
};
static const struct iio_chan_spec rockchip_rk3568_saradc_iio_channels[] = {
@@ -206,6 +243,9 @@ static const struct rockchip_saradc_data rk3568_saradc_data = {
.channels = rockchip_rk3568_saradc_iio_channels,
.num_channels = ARRAY_SIZE(rockchip_rk3568_saradc_iio_channels),
.clk_rate = 1000000,
+ .start = rockchip_saradc_start_v1,
+ .read = rockchip_saradc_read_v1,
+ .power_down = rockchip_saradc_power_down_v1,
};
static const struct of_device_id rockchip_saradc_match[] = {
--
2.30.2
Use dev_err_probe instead of dev_err in probe function,
which simplifies code a little bit and prints the error
code.
Signed-off-by: Shreeya Patel <[email protected]>
---
Changes in v2
- No changes
drivers/iio/adc/rockchip_saradc.c | 45 ++++++++++++++-----------------
1 file changed, 20 insertions(+), 25 deletions(-)
diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
index ede929d9bca0..54c1c2f018a9 100644
--- a/drivers/iio/adc/rockchip_saradc.c
+++ b/drivers/iio/adc/rockchip_saradc.c
@@ -424,25 +424,23 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
return -ENODEV;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
- if (!indio_dev) {
- dev_err(&pdev->dev, "failed allocating iio device\n");
- return -ENOMEM;
- }
+ if (!indio_dev)
+ return dev_err_probe(&pdev->dev, -ENOMEM,
+ "failed allocating iio device\n");
+
info = iio_priv(indio_dev);
match_data = of_device_get_match_data(&pdev->dev);
- if (!match_data) {
- dev_err(&pdev->dev, "failed to match device\n");
- return -ENODEV;
- }
+ if (!match_data)
+ return dev_err_probe(&pdev->dev, -ENODEV,
+ "failed to match device\n");
info->data = match_data;
/* Sanity check for possible later IP variants with more channels */
- if (info->data->num_channels > SARADC_MAX_CHANNELS) {
- dev_err(&pdev->dev, "max channels exceeded");
- return -EINVAL;
- }
+ if (info->data->num_channels > SARADC_MAX_CHANNELS)
+ return dev_err_probe(&pdev->dev, -EINVAL,
+ "max channels exceeded");
info->regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(info->regs))
@@ -490,23 +488,20 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
* This may become user-configurable in the future.
*/
ret = clk_set_rate(info->clk, info->data->clk_rate);
- if (ret < 0) {
- dev_err(&pdev->dev, "failed to set adc clk rate, %d\n", ret);
- return ret;
- }
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "failed to set adc clk rate\n");
ret = regulator_enable(info->vref);
- if (ret < 0) {
- dev_err(&pdev->dev, "failed to enable vref regulator\n");
- return ret;
- }
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "failed to enable vref regulator\n");
+
ret = devm_add_action_or_reset(&pdev->dev,
rockchip_saradc_regulator_disable, info);
- if (ret) {
- dev_err(&pdev->dev, "failed to register devm action, %d\n",
- ret);
- return ret;
- }
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret,
+ "failed to register devm action\n");
ret = regulator_get_voltage(info->vref);
if (ret < 0)
--
2.30.2
On Fri, 26 May 2023 02:57:04 +0530
Shreeya Patel <[email protected]> wrote:
> This patch series adds ADC support for RK3588 and updates
> the DT bindings for the same.
>
> To test ADC support on Rock 5B board, a voltage divider circuit
> was created using the gpio pin 22 ( SARADC_IN4 ) and few more
> tests were ran for testing the buffer and trigger support using
> the iio_generic_buffer tool.
>
FWIW I don't have any additional comments on this beyond agreeing
those made by others need addressing.
Fingers crossed for v3.
Jonathan
>
> Changes in v2
> - Add from address in patches 1 and 2.
> - Create separate patches for adding new device support and changes to
> the old device code.
> - Make use of FIELD_PREP in patch 2.
> - Move the enablement of clocks at it's original position in patch 3
> - Add Reviewed-by tag in patches 4 and 5.
> - Add an Acked-by tag in patch 8.
>
> Shreeya Patel (8):
> iio: adc: rockchip_saradc: Add callback functions
> iio: adc: rockchip_saradc: Add support for RK3588
> iio: adc: rockchip_saradc: Make use of devm_clk_get_enabled
> iio: adc: rockchip_saradc: Use of_device_get_match_data
> iio: adc: rockchip_saradc: Match alignment with open parenthesis
> iio: adc: rockchip_saradc: Use dev_err_probe
> arm64: dts: rockchip: Add DT node for ADC support in RK3588
> dt-bindings: iio: adc: Add rockchip,rk3588-saradc string
>
> .../bindings/iio/adc/rockchip-saradc.yaml | 1 +
> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 +
> drivers/iio/adc/rockchip_saradc.c | 262 +++++++++++-------
> 3 files changed, 168 insertions(+), 107 deletions(-)
>
On 28/05/23 22:16, Jonathan Cameron wrote:
> On Fri, 26 May 2023 02:57:04 +0530
> Shreeya Patel <[email protected]> wrote:
>
>> This patch series adds ADC support for RK3588 and updates
>> the DT bindings for the same.
>>
>> To test ADC support on Rock 5B board, a voltage divider circuit
>> was created using the gpio pin 22 ( SARADC_IN4 ) and few more
>> tests were ran for testing the buffer and trigger support using
>> the iio_generic_buffer tool.
>>
> FWIW I don't have any additional comments on this beyond agreeing
> those made by others need addressing.
>
> Fingers crossed for v3.
Thanks Jonathan, I'll send a v3 after making the changes mentioned by
Dmitry and Angelo.
Regards,
Shreeya Patel
>
> Jonathan
>
>> Changes in v2
>> - Add from address in patches 1 and 2.
>> - Create separate patches for adding new device support and changes to
>> the old device code.
>> - Make use of FIELD_PREP in patch 2.
>> - Move the enablement of clocks at it's original position in patch 3
>> - Add Reviewed-by tag in patches 4 and 5.
>> - Add an Acked-by tag in patch 8.
>>
>> Shreeya Patel (8):
>> iio: adc: rockchip_saradc: Add callback functions
>> iio: adc: rockchip_saradc: Add support for RK3588
>> iio: adc: rockchip_saradc: Make use of devm_clk_get_enabled
>> iio: adc: rockchip_saradc: Use of_device_get_match_data
>> iio: adc: rockchip_saradc: Match alignment with open parenthesis
>> iio: adc: rockchip_saradc: Use dev_err_probe
>> arm64: dts: rockchip: Add DT node for ADC support in RK3588
>> dt-bindings: iio: adc: Add rockchip,rk3588-saradc string
>>
>> .../bindings/iio/adc/rockchip-saradc.yaml | 1 +
>> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 +
>> drivers/iio/adc/rockchip_saradc.c | 262 +++++++++++-------
>> 3 files changed, 168 insertions(+), 107 deletions(-)
>>
>