Starting with Zen4, core PMU on AMD platforms such as Genoa and
Ryzen-7000 will support PerfMonV2, and it is also compatible with
legacy PERFCTR_CORE behavior and MSR addresses.
If you don't have access to the hardware specification, the commits
d6d0c7f681fd..7685665c390d for host perf can also bring a quick
overview. Its main change is the addition of three MSR's equivalent
to Intel V2, namely global_ctrl, global_status, global_status_clear.
It is worth noting that this feature is very attractive for reducing the
overhead of PMU virtualization, since multiple MSR accesses to multiple
counters will be replaced by a single access to the global register,
plus more accuracy gain when multiple guest counters are used.
All related testcases are passed on a Genoa box.
Please feel free to run more tests, add more or share comments.
Patch 0001-0007 could be applied earlier, which may help reduce
the burden on industrious reviewers.
Previous:
https://lore.kernel.org/kvm/[email protected]/
V5 -> V6 Changelog:
- Introduce pmu_ops->MIN_NR_GP_COUNTERS and WARN_ON_ONCE; (Sean)
- Set MIN_NR_GP_COUNTERS = 2 instead of 1 for Intel Arch PMU;
Like Xu (10):
KVM: x86/pmu: Expose reprogram_counters() in pmu.h
KVM: x86/pmu: Return #GP if user sets the GLOBAL_STATUS reserved bits
KVM: x86/pmu: Make part of the Intel v2 PMU MSRs handling x86 generic
KVM: x86: Explicitly zero cpuid "0xa" leaf when PMU is disabled
KVM: x86/pmu: Disable vPMU if the minimum num of counters isn't met
KVM: x86/pmu: Forget PERFCTR_CORE if the min num of counters isn't met
KVM: x86/pmu: Constrain the num of guest counters with kvm_pmu_cap
KVM: x86/cpuid: Add a KVM-only leaf to redirect AMD PerfMonV2 flag
KVM: x86/svm/pmu: Add AMD PerfMonV2 support
KVM: x86/cpuid: Add AMD CPUID ExtPerfMonAndDbg leaf 0x80000022
arch/x86/include/asm/kvm-x86-pmu-ops.h | 1 -
arch/x86/kvm/cpuid.c | 30 +++++++++-
arch/x86/kvm/pmu.c | 83 +++++++++++++++++++++++---
arch/x86/kvm/pmu.h | 43 +++++++++++--
arch/x86/kvm/reverse_cpuid.h | 7 +++
arch/x86/kvm/svm/pmu.c | 68 +++++++++++++++------
arch/x86/kvm/svm/svm.c | 19 +++++-
arch/x86/kvm/vmx/pmu_intel.c | 33 +++-------
arch/x86/kvm/x86.c | 10 ++++
9 files changed, 230 insertions(+), 64 deletions(-)
base-commit: b9846a698c9aff4eb2214a06ac83638ad098f33f
--
2.40.1
From: Like Xu <[email protected]>
A sanity check on the number of counters enumerated by perf is added.
PERFCTR_CORE support is explicitly dropped if the min number isn't met.
E.g. if KVM needs 6 counters and perf says there are 4, then something
is wrong and enumerating 6 to a guest is only going to cause more issues.
Opportunistically, the kvm_cpu_cap_check_and_set() is applied to simplify
the host check before setting the PERFCTR_CORE flag.
Suggested-by: Sean Christopherson <[email protected]>
Signed-off-by: Like Xu <[email protected]>
---
arch/x86/kvm/svm/svm.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index ca32389f3c36..d9669e3cc00a 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -5025,9 +5025,18 @@ static __init void svm_set_cpu_caps(void)
boot_cpu_has(X86_FEATURE_AMD_SSBD))
kvm_cpu_cap_set(X86_FEATURE_VIRT_SSBD);
- /* AMD PMU PERFCTR_CORE CPUID */
- if (enable_pmu && boot_cpu_has(X86_FEATURE_PERFCTR_CORE))
- kvm_cpu_cap_set(X86_FEATURE_PERFCTR_CORE);
+ if (enable_pmu) {
+ /*
+ * Enumerate support for PERFCTR_CORE if and only if KVM has
+ * access to enough counters to virtualize "core" support,
+ * otherwise limit vPMU support to the legacy number of counters.
+ */
+ if (kvm_pmu_cap.num_counters_gp < AMD64_NUM_COUNTERS_CORE)
+ kvm_pmu_cap.num_counters_gp = min(AMD64_NUM_COUNTERS,
+ kvm_pmu_cap.num_counters_gp);
+ else
+ kvm_cpu_cap_check_and_set(X86_FEATURE_PERFCTR_CORE);
+ }
/* CPUID 0x8000001F (SME/SEV features) */
sev_set_cpu_caps();
--
2.40.1