As pointed out in [1], the Linux implementation of RSC basically requires
(even if not explicitly) that we point it to a power domain which
represents the power state of the CPUs. In an effort to fulfill that
requirement, make it required in bindings and hook it up on all platforms
where I was able to do. This means all RPMh platforms, except
- SC7180
- SC7280
- SA8775
As there wasn't an idle-states setup (which may be on purpose for CrOS
devices, certainly not for Windows SC7[12]80s) that I could validate.
(Doug, Bartosz, could you guys look into your respective platforms of
interest here?)
This series also adds support for idle states on SM6350, as I was able
to add and test that.
[1] https://lore.kernel.org/linux-arm-msm/[email protected]/
Signed-off-by: Konrad Dybcio <[email protected]>
---
Konrad Dybcio (8):
dt-bindings: soc: qcom,rpmh-rsc: Require power-domains
arm64: dts: qcom: sm6350: Add PSCI idle states
arm64: dts: qcom: qdu1000: Flush RSC sleep & wake votes
arm64: dts: qcom: sc8180x: Flush RSC sleep & wake votes
arm64: dts: qcom: sdm670: Flush RSC sleep & wake votes
arm64: dts: qcom: sdm845: Flush RSC sleep & wake votes
arm64: dts: qcom: sm6350: Flush RSC sleep & wake votes
arm64: dts: qcom: sm8550: Flush RSC sleep & wake votes
.../bindings/soc/qcom/qcom,rpmh-rsc.yaml | 2 +
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 1 +
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 1 +
arch/arm64/boot/dts/qcom/sdm670.dtsi | 1 +
arch/arm64/boot/dts/qcom/sdm845.dtsi | 1 +
arch/arm64/boot/dts/qcom/sm6350.dtsi | 142 +++++++++++++++++++++
arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 +
7 files changed, 149 insertions(+)
---
base-commit: d4cee89031c80066ec461bb77b5e13a4f37d5fd2
change-id: 20230531-topic-rsc-35e838da9afb
Best regards,
--
Konrad Dybcio <[email protected]>
The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associate the apps_rsc with the cluster pd, so that it can be notified
about this event.
Without this, only AMC votes are being commited.
Fixes: 6bd20c54b589 ("arm64: dts: qcom: Add base QDU1000/QRU1000 DTSIs")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
index ddc3239478ae..4bc8c77a3538 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
@@ -1252,6 +1252,7 @@ apps_rsc: rsc@17a00000 {
qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>,
<WAKE_TCS 3>, <CONTROL_TCS 0>;
label = "apps_rsc";
+ power-domains = <&CLUSTER_PD>;
apps_bcm_voter: bcm-voter {
compatible = "qcom,bcm-voter";
--
2.40.1
The Linux RPMh implementation refrains from sending some RPMh votes until
the system is about to enter suspend (which is indicated by all CPU cores
entering a low-power state). Lack of the power-domains property will make
it such that these votes are never sent.
Require the power-domains property as discussed in [1].
[1] https://lore.kernel.org/linux-arm-msm/[email protected]/
Signed-off-by: Konrad Dybcio <[email protected]>
---
Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml
index a4046ba60846..af632d0e0355 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml
@@ -124,6 +124,7 @@ required:
- qcom,tcs-offset
- reg
- reg-names
+ - power-domains
additionalProperties: false
@@ -179,6 +180,7 @@ examples:
<SLEEP_TCS 1>,
<WAKE_TCS 1>,
<CONTROL_TCS 0>;
+ power-domains = <&CLUSTER_PD>;
};
- |
--
2.40.1
Add the PSCI idle states so that the CPU (among other things) can
reach lower power states.
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 141 +++++++++++++++++++++++++++++++++++
1 file changed, 141 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 46c29a190f1d..9311bb6bddab 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -56,6 +56,8 @@ CPU0: cpu@0 {
interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD0>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
L2_0: l2-cache {
compatible = "cache";
@@ -84,6 +86,8 @@ CPU1: cpu@100 {
interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD1>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
L2_100: l2-cache {
compatible = "cache";
@@ -107,6 +111,8 @@ CPU2: cpu@200 {
interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD2>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
L2_200: l2-cache {
compatible = "cache";
@@ -130,6 +136,8 @@ CPU3: cpu@300 {
interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD3>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
L2_300: l2-cache {
compatible = "cache";
@@ -153,6 +161,8 @@ CPU4: cpu@400 {
interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD4>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
L2_400: l2-cache {
compatible = "cache";
@@ -176,6 +186,8 @@ CPU5: cpu@500 {
interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD5>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
L2_500: l2-cache {
compatible = "cache";
@@ -199,6 +211,8 @@ CPU6: cpu@600 {
interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD6>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
L2_600: l2-cache {
compatible = "cache";
@@ -222,6 +236,8 @@ CPU7: cpu@700 {
interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD7>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
L2_700: l2-cache {
compatible = "cache";
@@ -266,6 +282,76 @@ core7 {
};
};
};
+
+ domain-idle-states {
+ CLUSTER_SLEEP_PC: cluster-sleep-0 {
+ compatible = "domain-idle-state";
+ arm,psci-suspend-param = <0x41000044>;
+ entry-latency-us = <2752>;
+ exit-latency-us = <3048>;
+ min-residency-us = <6118>;
+ };
+
+ CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {
+ compatible = "domain-idle-state";
+ arm,psci-suspend-param = <0x41001244>;
+ entry-latency-us = <3638>;
+ exit-latency-us = <4562>;
+ min-residency-us = <8467>;
+ };
+
+ CLUSTER_AOSS_SLEEP: cluster-sleep-2 {
+ compatible = "domain-idle-state";
+ arm,psci-suspend-param = <0x4100b244>;
+ entry-latency-us = <3263>;
+ exit-latency-us = <6562>;
+ min-residency-us = <9987>;
+ };
+ };
+
+ cpu_idle_states: idle-states {
+ entry-method = "psci";
+
+ LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
+ compatible = "arm,idle-state";
+ idle-state-name = "little-power-collapse";
+ arm,psci-suspend-param = <0x40000003>;
+ entry-latency-us = <549>;
+ exit-latency-us = <901>;
+ min-residency-us = <1774>;
+ local-timer-stop;
+ };
+
+ LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
+ compatible = "arm,idle-state";
+ idle-state-name = "little-rail-power-collapse";
+ arm,psci-suspend-param = <0x40000004>;
+ entry-latency-us = <702>;
+ exit-latency-us = <915>;
+ min-residency-us = <4001>;
+ local-timer-stop;
+ };
+
+ BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
+ compatible = "arm,idle-state";
+ idle-state-name = "big-power-collapse";
+ arm,psci-suspend-param = <0x40000003>;
+ entry-latency-us = <523>;
+ exit-latency-us = <1244>;
+ min-residency-us = <2207>;
+ local-timer-stop;
+ };
+
+ BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
+ compatible = "arm,idle-state";
+ idle-state-name = "big-rail-power-collapse";
+ arm,psci-suspend-param = <0x40000004>;
+ entry-latency-us = <526>;
+ exit-latency-us = <1854>;
+ min-residency-us = <5555>;
+ local-timer-stop;
+ };
+ };
};
firmware {
@@ -395,6 +481,61 @@ pmu {
psci {
compatible = "arm,psci-1.0";
method = "smc";
+
+ CPU_PD0: power-domain-cpu0 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+ };
+
+ CPU_PD1: power-domain-cpu1 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+ };
+
+ CPU_PD2: power-domain-cpu2 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+ };
+
+ CPU_PD3: power-domain-cpu3 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+ };
+
+ CPU_PD4: power-domain-cpu4 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+ };
+
+ CPU_PD5: power-domain-cpu5 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+ };
+
+ CPU_PD6: power-domain-cpu6 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
+ };
+
+ CPU_PD7: power-domain-cpu7 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
+ };
+
+ CLUSTER_PD: power-domain-cpu-cluster0 {
+ #power-domain-cells = <0>;
+ domain-idle-states = <&CLUSTER_SLEEP_PC
+ &CLUSTER_SLEEP_CX_RET
+ &CLUSTER_AOSS_SLEEP>;
+ };
};
reserved_memory: reserved-memory {
--
2.40.1
The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associate the apps_rsc with the cluster pd, so that it can be notified
about this event.
Without this, only AMC votes are being commited.
Fixes: 07c8ded6e373 ("arm64: dts: qcom: add sdm670 and pixel 3a device trees")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sdm670.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index b61e13db89bd..a1c207c0266d 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -1282,6 +1282,7 @@ apps_rsc: rsc@179c0000 {
<SLEEP_TCS 3>,
<WAKE_TCS 3>,
<CONTROL_TCS 1>;
+ power-domains = <&CLUSTER_PD>;
apps_bcm_voter: bcm-voter {
compatible = "qcom,bcm-voter";
--
2.40.1
The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associate the apps_rsc with the cluster pd, so that it can be notified
about this event.
Without this, only AMC votes are being commited.
Fixes: ffc50b2d3828 ("arm64: dts: qcom: Add base SM8550 dtsi")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 75cd374943eb..6a06373a3779 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3621,6 +3621,7 @@ apps_rsc: rsc@17a00000 {
qcom,drv-id = <2>;
qcom,tcs-config = <ACTIVE_TCS 3>, <SLEEP_TCS 2>,
<WAKE_TCS 2>, <CONTROL_TCS 0>;
+ power-domains = <&CLUSTER_PD>;
apps_bcm_voter: bcm-voter {
compatible = "qcom,bcm-voter";
--
2.40.1
The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associate the apps_rsc with the cluster pd, so that it can be notified
about this event.
Without this, only AMC votes are being commited.
Fixes: 8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index e8613a00fcab..573c542b1ce8 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -3495,6 +3495,7 @@ apps_rsc: rsc@18200000 {
<WAKE_TCS 1>,
<CONTROL_TCS 0>;
label = "apps_rsc";
+ power-domains = <&CLUSTER_PD>;
apps_bcm_voter: bcm-voter {
compatible = "qcom,bcm-voter";
--
2.40.1
The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associate the apps_rsc with the cluster pd, so that it can be notified
about this event.
Without this, only AMC votes are being commited.
Fixes: 5f82b9cda61e ("arm64: dts: qcom: Add SM6350 device tree")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 9311bb6bddab..1cdad69e3c07 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -2055,6 +2055,7 @@ apps_rsc: rsc@18200000 {
qcom,drv-id = <2>;
qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>,
<WAKE_TCS 3>, <CONTROL_TCS 1>;
+ power-domains = <&CLUSTER_PD>;
rpmhcc: clock-controller {
compatible = "qcom,sm6350-rpmh-clk";
--
2.40.1
The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associate the apps_rsc with the cluster pd, so that it can be notified
about this event.
Without this, only AMC votes are being commited.
Fixes: c83545d95376 ("arm64: dts: sdm845: Add rpmh-rsc node")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 950305aad44d..707550ef4990 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -5138,6 +5138,7 @@ apps_rsc: rsc@179c0000 {
<SLEEP_TCS 3>,
<WAKE_TCS 3>,
<CONTROL_TCS 1>;
+ power-domains = <&CLUSTER_PD>;
apps_bcm_voter: bcm-voter {
compatible = "qcom,bcm-voter";
--
2.40.1
On 31.05.2023 15:22, Konrad Dybcio wrote:
> As pointed out in [1], the Linux implementation of RSC basically requires
> (even if not explicitly) that we point it to a power domain which
> represents the power state of the CPUs. In an effort to fulfill that
> requirement, make it required in bindings and hook it up on all platforms
> where I was able to do. This means all RPMh platforms, except
>
> - SC7180
> - SC7280
> - SA8775
>
> As there wasn't an idle-states setup (which may be on purpose for CrOS
> devices, certainly not for Windows SC7[12]80s) that I could validate.
> (Doug, Bartosz, could you guys look into your respective platforms of
> interest here?)
>
> This series also adds support for idle states on SM6350, as I was able
> to add and test that.
I noticed that 7280 is WIP:
https://lore.kernel.org/lkml/[email protected]/
Konrad
>
> [1] https://lore.kernel.org/linux-arm-msm/[email protected]/
>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> Konrad Dybcio (8):
> dt-bindings: soc: qcom,rpmh-rsc: Require power-domains
> arm64: dts: qcom: sm6350: Add PSCI idle states
> arm64: dts: qcom: qdu1000: Flush RSC sleep & wake votes
> arm64: dts: qcom: sc8180x: Flush RSC sleep & wake votes
> arm64: dts: qcom: sdm670: Flush RSC sleep & wake votes
> arm64: dts: qcom: sdm845: Flush RSC sleep & wake votes
> arm64: dts: qcom: sm6350: Flush RSC sleep & wake votes
> arm64: dts: qcom: sm8550: Flush RSC sleep & wake votes
>
> .../bindings/soc/qcom/qcom,rpmh-rsc.yaml | 2 +
> arch/arm64/boot/dts/qcom/qdu1000.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sc8180x.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sdm670.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sm6350.dtsi | 142 +++++++++++++++++++++
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 +
> 7 files changed, 149 insertions(+)
> ---
> base-commit: d4cee89031c80066ec461bb77b5e13a4f37d5fd2
> change-id: 20230531-topic-rsc-35e838da9afb
>
> Best regards,
On 31.05.2023 15:22, Konrad Dybcio wrote:
> As pointed out in [1], the Linux implementation of RSC basically requires
> (even if not explicitly) that we point it to a power domain which
> represents the power state of the CPUs. In an effort to fulfill that
> requirement, make it required in bindings and hook it up on all platforms
> where I was able to do. This means all RPMh platforms, except
>
> - SC7180
> - SC7280
> - SA8775
>
> As there wasn't an idle-states setup (which may be on purpose for CrOS
> devices, certainly not for Windows SC7[12]80s) that I could validate.
> (Doug, Bartosz, could you guys look into your respective platforms of
> interest here?)
>
> This series also adds support for idle states on SM6350, as I was able
> to add and test that.
I noticed that 7280 is WIP:
>
> [1] https://lore.kernel.org/linux-arm-msm/[email protected]/
>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> Konrad Dybcio (8):
> dt-bindings: soc: qcom,rpmh-rsc: Require power-domains
> arm64: dts: qcom: sm6350: Add PSCI idle states
> arm64: dts: qcom: qdu1000: Flush RSC sleep & wake votes
> arm64: dts: qcom: sc8180x: Flush RSC sleep & wake votes
> arm64: dts: qcom: sdm670: Flush RSC sleep & wake votes
> arm64: dts: qcom: sdm845: Flush RSC sleep & wake votes
> arm64: dts: qcom: sm6350: Flush RSC sleep & wake votes
> arm64: dts: qcom: sm8550: Flush RSC sleep & wake votes
>
> .../bindings/soc/qcom/qcom,rpmh-rsc.yaml | 2 +
> arch/arm64/boot/dts/qcom/qdu1000.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sc8180x.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sdm670.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sm6350.dtsi | 142 +++++++++++++++++++++
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 +
> 7 files changed, 149 insertions(+)
> ---
> base-commit: d4cee89031c80066ec461bb77b5e13a4f37d5fd2
> change-id: 20230531-topic-rsc-35e838da9afb
>
> Best regards,
Hi,
On Wed, May 31, 2023 at 6:22 AM Konrad Dybcio <[email protected]> wrote:
>
> The rpmh driver will cache sleep and wake votes until the cluster
> power-domain is about to enter idle, to avoid unnecessary writes. So
> associate the apps_rsc with the cluster pd, so that it can be notified
> about this event.
>
> Without this, only AMC votes are being commited.
>
> Fixes: c83545d95376 ("arm64: dts: sdm845: Add rpmh-rsc node")
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 950305aad44d..707550ef4990 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -5138,6 +5138,7 @@ apps_rsc: rsc@179c0000 {
> <SLEEP_TCS 3>,
> <WAKE_TCS 3>,
> <CONTROL_TCS 1>;
> + power-domains = <&CLUSTER_PD>;
It would be good to confirm that this doesn't throw sdm845-cheza for a
loop. No sdm845 Chromebooks ever officially shipped, but some people
like Rob Clark still use the old boards in their CI farms. Adding him
here in case he wants to check. Worst case we could just delete the
property from the cheza device tree.
-Doug
Hi,
On Wed, May 31, 2023 at 7:26 AM Konrad Dybcio <[email protected]> wrote:
>
> On 31.05.2023 15:22, Konrad Dybcio wrote:
> > As pointed out in [1], the Linux implementation of RSC basically requires
> > (even if not explicitly) that we point it to a power domain which
> > represents the power state of the CPUs. In an effort to fulfill that
> > requirement, make it required in bindings and hook it up on all platforms
> > where I was able to do. This means all RPMh platforms, except
> >
> > - SC7180
> > - SC7280
> > - SA8775
> >
> > As there wasn't an idle-states setup (which may be on purpose for CrOS
> > devices, certainly not for Windows SC7[12]80s) that I could validate.
> > (Doug, Bartosz, could you guys look into your respective platforms of
> > interest here?)
> >
> > This series also adds support for idle states on SM6350, as I was able
> > to add and test that.
> I noticed that 7280 is WIP:
>
> https://lore.kernel.org/lkml/[email protected]/
Right. For sc7180 Chromebooks we don't use OSI (OS Initiated) mode but
instead use PC (Platform Coordinated) mode. As I understand it, that
means we take a different path through all this stuff.
That being said, in the sc7280 thread you pointed at, Bjorn and Ulf
said that we could use the new device tree snippets for sc7280 even
before the ATF update. If I'm reading the thread correctly and the
same applies to sc7180:
1. New DT plus firmware that doesn't support OSI - OK
2. New DT plus firmware that supports OSI - OK after code changes
3. Old DT plus firmware that doesn't support OSI - OK
4. Old DT plus firmware that supports OSI - Not OK
For sc7180 Chromebooks we'll never have firmware that supports OSI.
That means that, assuming I'm understanding correctly, we actually
could move the DT to represent things the new way. Presumably this
would be important for sc7180 devices that originally shipped with
Windows (I think support for one of these is underway).
-Doug
On 31/05/2023 15:22, Konrad Dybcio wrote:
> The Linux RPMh implementation refrains from sending some RPMh votes until
> the system is about to enter suspend (which is indicated by all CPU cores
> entering a low-power state). Lack of the power-domains property will make
> it such that these votes are never sent.
>
> Require the power-domains property as discussed in [1].
>
> [1] https://lore.kernel.org/linux-arm-msm/[email protected]/
> Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On 31.05.2023 23:45, Doug Anderson wrote:
> Hi,
>
> On Wed, May 31, 2023 at 7:26 AM Konrad Dybcio <[email protected]> wrote:
>>
>> On 31.05.2023 15:22, Konrad Dybcio wrote:
>>> As pointed out in [1], the Linux implementation of RSC basically requires
>>> (even if not explicitly) that we point it to a power domain which
>>> represents the power state of the CPUs. In an effort to fulfill that
>>> requirement, make it required in bindings and hook it up on all platforms
>>> where I was able to do. This means all RPMh platforms, except
>>>
>>> - SC7180
>>> - SC7280
>>> - SA8775
>>>
>>> As there wasn't an idle-states setup (which may be on purpose for CrOS
>>> devices, certainly not for Windows SC7[12]80s) that I could validate.
>>> (Doug, Bartosz, could you guys look into your respective platforms of
>>> interest here?)
>>>
>>> This series also adds support for idle states on SM6350, as I was able
>>> to add and test that.
>> I noticed that 7280 is WIP:
>>
>> https://lore.kernel.org/lkml/[email protected]/
>
> Right. For sc7180 Chromebooks we don't use OSI (OS Initiated) mode but
> instead use PC (Platform Coordinated) mode. As I understand it, that
> means we take a different path through all this stuff.
>
> That being said, in the sc7280 thread you pointed at, Bjorn and Ulf
> said that we could use the new device tree snippets for sc7280 even
> before the ATF update. If I'm reading the thread correctly and the
> same applies to sc7180:
>
> 1. New DT plus firmware that doesn't support OSI - OK
> 2. New DT plus firmware that supports OSI - OK after code changes
> 3. Old DT plus firmware that doesn't support OSI - OK
> 4. Old DT plus firmware that supports OSI - Not OK
>
> For sc7180 Chromebooks we'll never have firmware that supports OSI.
> That means that, assuming I'm understanding correctly, we actually
> could move the DT to represent things the new way. Presumably this
> would be important for sc7180 devices that originally shipped with
> Windows (I think support for one of these is underway).
It's even merged now!
Yeah, AFAICT all you said makes sense
I don't however know how you tell RSC driver that your platform is
going to sleep when using PC mode..
KOnrad
>
> -Doug
On Wed, 31 May 2023 15:22:34 +0200, Konrad Dybcio wrote:
> As pointed out in [1], the Linux implementation of RSC basically requires
> (even if not explicitly) that we point it to a power domain which
> represents the power state of the CPUs. In an effort to fulfill that
> requirement, make it required in bindings and hook it up on all platforms
> where I was able to do. This means all RPMh platforms, except
>
> - SC7180
> - SC7280
> - SA8775
>
> [...]
Applied, thanks!
[2/8] arm64: dts: qcom: sm6350: Add PSCI idle states
commit: ade89bc08c8e7f52ee8a70d0c6ea55c2defdf1d3
[3/8] arm64: dts: qcom: qdu1000: Flush RSC sleep & wake votes
commit: ab033e7846f91953244d0626b28ce66412b813b3
[4/8] arm64: dts: qcom: sc8180x: Flush RSC sleep & wake votes
commit: 442d55d099ed72d96aee996e56f802b5cf885f39
[5/8] arm64: dts: qcom: sdm670: Flush RSC sleep & wake votes
commit: 7b04cbd81b0e60c5151a310e7b730dc4a951a211
[6/8] arm64: dts: qcom: sdm845: Flush RSC sleep & wake votes
commit: 91e83140b5dd5598fbcfada3ee1f8b2b410c3731
[7/8] arm64: dts: qcom: sm6350: Flush RSC sleep & wake votes
commit: 255c53df8ec3ea9f00765eb3dac02ccb705704dd
[8/8] arm64: dts: qcom: sm8550: Flush RSC sleep & wake votes
commit: 4b2c7ac8e469ab7f92e50c34ad4012a77e79d078
Best regards,
--
Bjorn Andersson <[email protected]>