2023-05-31 21:47:43

by Nishanth Menon

Subject: [PATCH 4/6] arm64: dts: ti: k3-j721s2: Configure pinctrl for timer IO

There are timer IO pads in the MCU domain, and in the MAIN domain. These
pads can be muxed for the related timers.

The details of the multiplexing can be found in the register
documentation and Technical Reference Manual[1].

These are similar to J721e/J7200, but have different mux capabilities.

[1] https://www.ti.com/lit/zip/spruj28

Signed-off-by: Nishanth Menon <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 18 +++++++++++++++
.../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 22 +++++++++++++++++++
2 files changed, 40 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 3f00fa4e9780..ced187ad802d 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -72,6 +72,24 @@ main_pmx0: pinctrl@11c000 {
pinctrl-single,function-mask = <0xffffffff>;
};

+ /* TIMERIO pad input CTRLMMR_TIMER*_CTRL registers */
+ main_timerio_input: pinctrl@104200 {
+ compatible = "pinctrl-single";
+ reg = <0x00 0x104200 0x00 0x50>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x00000007>;
+ };
+
+ /* TIMERIO pad output CTCTRLMMR_TIMERIO*_CTRL registers */
+ main_timerio_output: pinctrl@104280 {
+ compatible = "pinctrl-single";
+ reg = <0x00 0x104280 0x00 0x20>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x0000001f>;
+ };
+
main_crypto: crypto@4e00000 {
compatible = "ti,j721e-sa2ul";
reg = <0x00 0x04e00000 0x00 0x1200>;
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index 758528076014..f563dcc7b3f8 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -71,6 +71,28 @@ wkup_pmx0: pinctrl@4301c000 {
pinctrl-single,function-mask = <0xffffffff>;
};

+ /* MCU_TIMERIO pad input CTRLMMR_MCU_TIMER*_CTRL registers */
+ mcu_timerio_input: pinctrl@40f04200 {
+ compatible = "pinctrl-single";
+ reg = <0x00 0x40f04200 0x00 0x28>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x0000000f>;
+ /* Non-MPU Firmware usage */
+ status = "reserved";
+ };
+
+ /* MCU_TIMERIO pad output CTRLMMR_MCU_TIMERIO*_CTRL registers */
+ mcu_timerio_output: pinctrl@40f04280 {
+ compatible = "pinctrl-single";
+ reg = <0x00 0x40f04280 0x00 0x28>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x0000000f>;
+ /* Non-MPU Firmware usage */
+ status = "reserved";
+ };
+
wkup_gpio_intr: interrupt-controller@42200000 {
compatible = "ti,sci-intr";
reg = <0x00 0x42200000 0x00 0x400>;
--
2.40.0

2023-06-02 07:27:33

by Tony Lindgren

Subject: Re: [PATCH 4/6] arm64: dts: ti: k3-j721s2: Configure pinctrl for timer IO

* Nishanth Menon <[email protected]> [230531 21:32]:
> There are timer IO pads in the MCU domain, and in the MAIN domain. These
> pads can be muxed for the related timers.
>
> The details of the multiplexing can be found in the register
> documentation and Technical Reference Manual[1].
>
> These are similar to J721e/J7200, but have different mux capabilities.

Reviewed-by: Tony Lindgren <[email protected]>