2023-06-02 06:21:45

by Abel Vesa

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Subject: [PATCH v2 2/6] arm64: dts: qcom: sm8150: Add missing interconnect paths to USB HCs

The USB HCs nodes are missing the interconnect paths, so add them.

Signed-off-by: Abel Vesa <[email protected]>
---

Changes since v1:
* None.

arch/arm64/boot/dts/qcom/sm8150.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 50a21062ea24..18c822abdb88 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3595,6 +3595,10 @@ usb_1: usb@a6f8800 {

resets = <&gcc GCC_USB30_PRIM_BCR>;

+ interconnects = <&aggre1_noc MASTER_USB3 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>;
+ interconnect-names = "usb-ddr", "apps-usb";
+
usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xcd00>;
@@ -3644,6 +3648,10 @@ usb_2: usb@a8f8800 {

resets = <&gcc GCC_USB30_SEC_BCR>;

+ interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>;
+ interconnect-names = "usb-ddr", "apps-usb";
+
usb_2_dwc3: usb@a800000 {
compatible = "snps,dwc3";
reg = <0 0x0a800000 0 0xcd00>;
--
2.34.1



2023-06-02 09:45:27

by Konrad Dybcio

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Subject: Re: [PATCH v2 2/6] arm64: dts: qcom: sm8150: Add missing interconnect paths to USB HCs



On 2.06.2023 08:20, Abel Vesa wrote:
> The USB HCs nodes are missing the interconnect paths, so add them.
>
> Signed-off-by: Abel Vesa <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>

Konrad
>
> Changes since v1:
> * None.
>
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 50a21062ea24..18c822abdb88 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -3595,6 +3595,10 @@ usb_1: usb@a6f8800 {
>
> resets = <&gcc GCC_USB30_PRIM_BCR>;
>
> + interconnects = <&aggre1_noc MASTER_USB3 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>;
> + interconnect-names = "usb-ddr", "apps-usb";
> +
> usb_1_dwc3: usb@a600000 {
> compatible = "snps,dwc3";
> reg = <0 0x0a600000 0 0xcd00>;
> @@ -3644,6 +3648,10 @@ usb_2: usb@a8f8800 {
>
> resets = <&gcc GCC_USB30_SEC_BCR>;
>
> + interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>;
> + interconnect-names = "usb-ddr", "apps-usb";
> +
> usb_2_dwc3: usb@a800000 {
> compatible = "snps,dwc3";
> reg = <0 0x0a800000 0 0xcd00>;