This patch series adds a new compatible for the Display SubSystem (DSS)
controller on TI's AM625 SoC. It further adds the required support for
the same in the tidss driver.
The AM625-DSS is a newer version of the DSS from the AM65X version with
the major change being the addition of another OLDI TX. With the help of
2 OLDI TXes, the AM625 DSS can support dual-linked OLDI displays with a
resolution of up-to 2K or WUXGA (1920x1200@60fps) at half the OLDI clock
frequency or even cloned video outputs on each of the TXes.
This patch series acts as a continuation of the patches posted in v3[1].
The OLDI support patches combined from v5 onwards are now separated
again. The OLDI support will be added subsequently with a separte patch
series.
I have dropped Krzysztof Kozlowski's and Rahul T R's R-b tags from patch
1/2 considering the changes involved in the binding.
I have tested these patches on AM625 SK-EVM and AM625 based Beagle Play.
To test this series on AM625 based platforms, basic display support
patches, (for driver + devicetree) can be found in the
"next_am62-base_support" branch on my github fork[2].
[1]: V3: https://patchwork.freedesktop.org/series/105373/
[2]: https://github.com/aradhya07/linux-ab/tree/next_am62-base_support
Previous versions:
- V7: https://patchwork.freedesktop.org/series/113328/
- V6: https://patchwork.freedesktop.org/series/111106/
- V5: https://patchwork.freedesktop.org/series/109194/
Changelog:
V8:
- Rebase for current merge window.
- Drop all the OLDI support patches.
- Update the binding to remove the 2nd OLDI port instances.
- Drop the Reviewed-by tags of Krzysztof Kozlowski and Rahul T R
because of the changes.
V7:
- Rebase to current linux-next.
- Address Tomi Valkeinen's comments.
1. Separate the DSS VP and output port coupling.
v6 introduced 'output_port_bus_type' in addition to 'vp_bus_type'
but having both of the variables was redundant. Hence, in v7
the 'output_port_bus_type' essentially replaces 'vp_bus_type'.
2. Break Patch v6 2/5 into 2 separate patches (v7 1/6 and v7 3/6).
3. Change in name and addition of OLDI mode macros.
4. Other minor changes.
V6:
- Rebase for current merge window.
- Add 'allOf:' condition in the DT binding.
- Address Tomi Valkeinen's comments.
1. Combine DT binding patches for new compatible and 3rd DSS port.
2. Further separate DSS VPs and output ports.
3. Separate OLDI mode discovery logic from the panel/bridge
discovery (which allowed support for OLDI bridges as well.)
4. Organize OLDI IO control register macros platform wise.
V5:
- Rebase for current merge window.
- Add max DT ports in DSS features.
- Combine the OLDI support series.
(Changes from OLDI support series v1)
- Address Tomi Valkeinen's comments.
1. Update the OLDI link detection approach.
2. Add port #3 for 2nd OLDI TX.
3. Configure 2 panel-bridges for cloned panels.
4. Drop the OLDI clock set patch.
5. Drop rgb565-to-888 patch.
V3:
- Change yaml enum in alphabetical order.
- Correct a typo.
V2:
- Remove redundant register array.
Aradhya Bhatia (2):
dt-bindings: display: ti,am65x-dss: Add am625 dss compatible
drm/tidss: Add support for AM625 DSS
.../bindings/display/ti/ti,am65x-dss.yaml | 18 ++++--
drivers/gpu/drm/tidss/tidss_dispc.c | 57 ++++++++++++++++++-
drivers/gpu/drm/tidss/tidss_dispc.h | 2 +
drivers/gpu/drm/tidss/tidss_drv.c | 1 +
4 files changed, 71 insertions(+), 7 deletions(-)
--
2.40.1
Add support for the DSS controller on TI's AM625 SoC in the tidss
driver.
The AM625 DSS supports 2 video planes connecting to 2 video ports.
The first plane is a full plane supporting all the features, while the
2nd plane is a "lite" plane without scaling support.
The first video port in AM625 DSS internally provides DPI output to 2
OLDI transmitters. Each OLDI TX outputs 4 differential lanes of video
output and 1 of clock output.
The second video port outputs DPI data directly out of the SoC. It has
24 data lines and can support a maximum of RGB888 output bus format.
Signed-off-by: Aradhya Bhatia <[email protected]>
---
Notes:
Changes from v7:
* Drop all changes made after v3.
- Drop output bus type support. All outputs from DSS will be the
video port outptus.
* Make the first video port type as INTERNAL from OLDI.
drivers/gpu/drm/tidss/tidss_dispc.c | 57 ++++++++++++++++++++++++++++-
drivers/gpu/drm/tidss/tidss_dispc.h | 2 +
drivers/gpu/drm/tidss/tidss_drv.c | 1 +
3 files changed, 59 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
index dca077411f77..484da1aa27bb 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -275,6 +275,55 @@ const struct dispc_features dispc_j721e_feats = {
.vid_order = { 1, 3, 0, 2 },
};
+const struct dispc_features dispc_am625_feats = {
+ .max_pclk_khz = {
+ [DISPC_VP_DPI] = 165000,
+ [DISPC_VP_INTERNAL] = 170000,
+ },
+
+ .scaling = {
+ .in_width_max_5tap_rgb = 1280,
+ .in_width_max_3tap_rgb = 2560,
+ .in_width_max_5tap_yuv = 2560,
+ .in_width_max_3tap_yuv = 4096,
+ .upscale_limit = 16,
+ .downscale_limit_5tap = 4,
+ .downscale_limit_3tap = 2,
+ /*
+ * The max supported pixel inc value is 255. The value
+ * of pixel inc is calculated like this: 1+(xinc-1)*bpp.
+ * The maximum bpp of all formats supported by the HW
+ * is 8. So the maximum supported xinc value is 32,
+ * because 1+(32-1)*8 < 255 < 1+(33-1)*4.
+ */
+ .xinc_max = 32,
+ },
+
+ .subrev = DISPC_AM625,
+
+ .common = "common",
+ .common_regs = tidss_am65x_common_regs,
+
+ .num_vps = 2,
+ .vp_name = { "vp1", "vp2" },
+ .ovr_name = { "ovr1", "ovr2" },
+ .vpclk_name = { "vp1", "vp2" },
+ .vp_bus_type = { DISPC_VP_INTERNAL, DISPC_VP_DPI },
+
+ .vp_feat = { .color = {
+ .has_ctm = true,
+ .gamma_size = 256,
+ .gamma_type = TIDSS_GAMMA_8BIT,
+ },
+ },
+
+ .num_planes = 2,
+ /* note: vid is plane_id 0 and vidl1 is plane_id 1 */
+ .vid_name = { "vid", "vidl1" },
+ .vid_lite = { false, true, },
+ .vid_order = { 1, 0 },
+};
+
static const u16 *dispc_common_regmap;
struct dss_vp_data {
@@ -776,6 +825,7 @@ dispc_irq_t dispc_read_and_clear_irqstatus(struct dispc_device *dispc)
switch (dispc->feat->subrev) {
case DISPC_K2G:
return dispc_k2g_read_and_clear_irqstatus(dispc);
+ case DISPC_AM625:
case DISPC_AM65X:
case DISPC_J721E:
return dispc_k3_read_and_clear_irqstatus(dispc);
@@ -791,6 +841,7 @@ void dispc_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask)
case DISPC_K2G:
dispc_k2g_set_irqenable(dispc, mask);
break;
+ case DISPC_AM625:
case DISPC_AM65X:
case DISPC_J721E:
dispc_k3_set_irqenable(dispc, mask);
@@ -1281,6 +1332,7 @@ void dispc_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane,
dispc_k2g_ovr_set_plane(dispc, hw_plane, hw_videoport,
x, y, layer);
break;
+ case DISPC_AM625:
case DISPC_AM65X:
dispc_am65x_ovr_set_plane(dispc, hw_plane, hw_videoport,
x, y, layer);
@@ -2199,6 +2251,7 @@ static void dispc_plane_init(struct dispc_device *dispc)
case DISPC_K2G:
dispc_k2g_plane_init(dispc);
break;
+ case DISPC_AM625:
case DISPC_AM65X:
case DISPC_J721E:
dispc_k3_plane_init(dispc);
@@ -2305,6 +2358,7 @@ static void dispc_vp_write_gamma_table(struct dispc_device *dispc,
case DISPC_K2G:
dispc_k2g_vp_write_gamma_table(dispc, hw_videoport);
break;
+ case DISPC_AM625:
case DISPC_AM65X:
dispc_am65x_vp_write_gamma_table(dispc, hw_videoport);
break;
@@ -2579,7 +2633,8 @@ int dispc_runtime_resume(struct dispc_device *dispc)
REG_GET(dispc, DSS_SYSSTATUS, 2, 2),
REG_GET(dispc, DSS_SYSSTATUS, 3, 3));
- if (dispc->feat->subrev == DISPC_AM65X)
+ if (dispc->feat->subrev == DISPC_AM625 ||
+ dispc->feat->subrev == DISPC_AM65X)
dev_dbg(dispc->dev, "OLDI RESETDONE %d,%d,%d\n",
REG_GET(dispc, DSS_SYSSTATUS, 5, 5),
REG_GET(dispc, DSS_SYSSTATUS, 6, 6),
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/tidss_dispc.h
index 946ed769caaf..33ac5ad7a423 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.h
+++ b/drivers/gpu/drm/tidss/tidss_dispc.h
@@ -59,6 +59,7 @@ enum dispc_vp_bus_type {
enum dispc_dss_subrevision {
DISPC_K2G,
+ DISPC_AM625,
DISPC_AM65X,
DISPC_J721E,
};
@@ -86,6 +87,7 @@ struct dispc_features {
};
extern const struct dispc_features dispc_k2g_feats;
+extern const struct dispc_features dispc_am625_feats;
extern const struct dispc_features dispc_am65x_feats;
extern const struct dispc_features dispc_j721e_feats;
diff --git a/drivers/gpu/drm/tidss/tidss_drv.c b/drivers/gpu/drm/tidss/tidss_drv.c
index 3f5f27fb6ebc..0a6f19314662 100644
--- a/drivers/gpu/drm/tidss/tidss_drv.c
+++ b/drivers/gpu/drm/tidss/tidss_drv.c
@@ -232,6 +232,7 @@ static void tidss_shutdown(struct platform_device *pdev)
static const struct of_device_id tidss_of_table[] = {
{ .compatible = "ti,k2g-dss", .data = &dispc_k2g_feats, },
+ { .compatible = "ti,am625-dss", .data = &dispc_am625_feats, },
{ .compatible = "ti,am65x-dss", .data = &dispc_am65x_feats, },
{ .compatible = "ti,j721e-dss", .data = &dispc_j721e_feats, },
{ }
--
2.40.1
Hi,
On 08/06/2023 19:37, Aradhya Bhatia wrote:
> Add support for the DSS controller on TI's AM625 SoC in the tidss
> driver.
>
> The AM625 DSS supports 2 video planes connecting to 2 video ports.
> The first plane is a full plane supporting all the features, while the
> 2nd plane is a "lite" plane without scaling support.
The DRM planes are reversed compared to the HW planes, aren't they? Is
the above referring to HW planes?
> The first video port in AM625 DSS internally provides DPI output to 2
> OLDI transmitters. Each OLDI TX outputs 4 differential lanes of video
> output and 1 of clock output.
I think it should be explained that OLDI is not supported in this
version, but will be added later.
Other than that:
Reviewed-by: Tomi Valkeinen <[email protected]>
Tomi
Hi Tomi,
Thank you for the reviews!
On 16-Jun-23 18:15, Tomi Valkeinen wrote:
> Hi,
>
> On 08/06/2023 19:37, Aradhya Bhatia wrote:
>> Add support for the DSS controller on TI's AM625 SoC in the tidss
>> driver.
>>
>> The AM625 DSS supports 2 video planes connecting to 2 video ports.
>> The first plane is a full plane supporting all the features, while the
>> 2nd plane is a "lite" plane without scaling support.
>
> The DRM planes are reversed compared to the HW planes, aren't they? Is
> the above referring to HW planes?
Yes, I am referring to the HW planes, and the DRM planes reversed as
well. =)
>
>> The first video port in AM625 DSS internally provides DPI output to 2
>> OLDI transmitters. Each OLDI TX outputs 4 differential lanes of video
>> output and 1 of clock output.
>
> I think it should be explained that OLDI is not supported in this
> version, but will be added later.
Okay, I will make the change.
Regards
Aradhya
>
> Other than that:
>
> Reviewed-by: Tomi Valkeinen <[email protected]>
>
> Tomi
>