In continuation of patch series posted by Nishanth for sync of uboot device tree with kernel device tree for AM64 SOC.
https://lore.kernel.org/linux-arm-kernel/[email protected]/
This series extend device tree sync/clean up for J7200 SOC.
This patch series build on top of
https://lore.kernel.org/all/[email protected]
Boot logs
https://gist.github.com/uditkumarti/a43decc11c49d59c658cfc4f3f255c5e
Changes since v3:
https://lore.kernel.org/all/[email protected]/
* Add general purpose timers
Added reviewed by Tony Lindgren
* Configure pinctrl for timer IO pads
No change
* remove duplicate main_i2c0 pin mux
Moved before uart pin mux
* Add uart pinmux
Added missing uart pin mux
* Define aliases at board level
* Drop SoC level aliases
Moved aliases<F4> at board level
Changes since v2:
https://lore.kernel.org/all/[email protected]/
* Configure pinctrl for timer IO pads
Added reviewed by Tony Lindgren
* Add uart pin mux in main_pmx0
Changed subject of patch
Changes since v1:
https://lore.kernel.org/all/[email protected]/
* Add general purpose timers:
Addded CLKSEL_VD clock for odd numbered timers
Marked MCU_Timer as reserved, fixed clock index for main_timer13
*Configure pinctrl for timer IO pads
Marked mcu_timerio_input as reserved
*main_pmx0 clean up
Splitted into two patches, One for UART and second for i2c duplication removal
*Add uart pin mux in wkup_pmx0
No change
*Add bootph-pre-ram for u-boot
patch dropped, later will add bootph-pre-ram property later for all nodes.
Udit Kumar (6):
arm64: dts: ti: k3-j7200: Add general purpose timers
arm64: dts: ti: k3-j7200: Configure pinctrl for timer IO pads
arm64: dts: ti: k3-j7200-common-proc-board: remove duplicate main_i2c0
pin mux
arm64: dts: ti: k3-j7200-common-proc-board: Add uart pinmux
arm64: dts: ti: k3-j7200-common-proc-board: Define aliases at board
level
arm64: dts: ti: k3-j7200: Drop SoC level aliases
.../dts/ti/k3-j7200-common-proc-board.dts | 67 ++++-
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 258 ++++++++++++++++++
.../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 150 ++++++++++
arch/arm64/boot/dts/ti/k3-j7200.dtsi | 17 --
4 files changed, 471 insertions(+), 21 deletions(-)
--
2.34.1
Add main, mcu, wakeup domain uart0 pin mux into common board file and it's
reference to uart node.
Signed-off-by: Udit Kumar <[email protected]>
---
.../dts/ti/k3-j7200-common-proc-board.dts | 58 ++++++++++++++++++-
1 file changed, 57 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 31b6501443b4..5569d48b900c 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -79,6 +79,24 @@ vdd_sd_dv: gpio-regulator-TLV71033 {
};
};
+&wkup_pmx0 {
+ mcu_uart0_pins_default: mcu-uart0-pins-default {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0xf4, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */
+ J721E_WKUP_IOPAD(0xf0, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */
+ J721E_WKUP_IOPAD(0xf8, PIN_INPUT, 0) /* (E20) MCU_UART0_CTSn */
+ J721E_WKUP_IOPAD(0xfc, PIN_OUTPUT, 0) /* (E21) MCU_UART0_RTSn */
+ >;
+ };
+
+ wkup_uart0_pins_default: wkup-uart0-pins-default {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */
+ J721E_WKUP_IOPAD(0xb4, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */
+ >;
+ };
+};
+
&wkup_pmx2 {
mcu_cpsw_pins_default: mcu-cpsw-pins-default {
pinctrl-single,pins = <
@@ -106,6 +124,29 @@ J721E_WKUP_IOPAD(0x0030, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
};
&main_pmx0 {
+ main_uart0_pins_default: main-uart0-pins-default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */
+ J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
+ J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
+ J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
+ >;
+ };
+
+ main_uart1_pins_default: main-uart1-pins-default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xb8, PIN_INPUT, 0) /* (T18) UART1_RXD */
+ J721E_IOPAD(0xbc, PIN_INPUT, 0) /* (T20) UART1_TXD */
+ >;
+ };
+
+ main_uart3_pins_default: main-uart3-pins-default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x60, PIN_INPUT, 11) /* (T15) MCAN8_TX.UART3_CTSn */
+ J721E_IOPAD(0x30, PIN_INPUT, 11) /* (Y18) MCAN2_TX.UART3_RXD */
+ >;
+ };
+
main_i2c1_pins_default: main-i2c1-pins-default {
pinctrl-single,pins = <
J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */
@@ -144,22 +185,30 @@ J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
&wkup_uart0 {
/* Wakeup UART is used by System firmware */
status = "reserved";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_uart0_pins_default>;
};
&mcu_uart0 {
status = "okay";
- /* Default pinmux */
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_uart0_pins_default>;
+ clock-frequency = <96000000>;
};
&main_uart0 {
status = "okay";
/* Shared with ATF on this platform */
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart0_pins_default>;
};
&main_uart1 {
status = "okay";
/* Default pinmux */
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart1_pins_default>;
};
&main_uart2 {
@@ -167,6 +216,13 @@ &main_uart2 {
status = "reserved";
};
+&main_uart3 {
+ /* Shared with MCAN Interface */
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart3_pins_default>;
+};
+
&main_gpio2 {
status = "disabled";
};
--
2.34.1
On 16:41-20230611, Udit Kumar wrote:
> In continuation of patch series posted by Nishanth for sync of uboot device tree with kernel device tree for AM64 SOC.
> https://lore.kernel.org/linux-arm-kernel/[email protected]/
>
> This series extend device tree sync/clean up for J7200 SOC.
Thank you for the cleanup. For the series:
Reviewed-by: Nishanth Menon <[email protected]>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
Hi Udit Kumar,
On Sun, 11 Jun 2023 16:41:34 +0530, Udit Kumar wrote:
> In continuation of patch series posted by Nishanth for sync of uboot device tree with kernel device tree for AM64 SOC.
> https://lore.kernel.org/linux-arm-kernel/[email protected]/
>
> This series extend device tree sync/clean up for J7200 SOC.
>
> This patch series build on top of
> https://lore.kernel.org/all/[email protected]
>
> [...]
I have applied the following to branch ti-k3-dts-next on [1].
Thank you!
[1/6] arm64: dts: ti: k3-j7200: Add general purpose timers
commit: c8a28ed4837ce03254e0941f4fbc8364b1e78543
[2/6] arm64: dts: ti: k3-j7200: Configure pinctrl for timer IO pads
commit: 03612d384621ffe21c6d338de916251d1bfd84fa
[3/6] arm64: dts: ti: k3-j7200-common-proc-board: remove duplicate main_i2c0 pin mux
commit: 7f58e2b418d89f38f242b04da5a1dd93a2c514fd
[4/6] arm64: dts: ti: k3-j7200-common-proc-board: Add uart pinmux
commit: 3709ea7f960ed77ac29af692c9e32351060400d9
[5/6] arm64: dts: ti: k3-j7200-common-proc-board: Define aliases at board level
commit: c4ba159fff90791956370ce93c130aadea87dbb6
[6/6] arm64: dts: ti: k3-j7200: Drop SoC level aliases
commit: 858dde8a3f56f0b7a0c217ac4abf56e34c34ae74
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh