This patch series includes a few enhancements and other updates to the
RVU NIX AF driver.
The first patch adds devlink option to configure NPC MCAM high priority
zone entries reservation. This is useful when the requester needs more
high priority entries than default reserved entries.
The second patch adds support for RSS hash computation using L3 SRC or
DST only, or L4 SRC or DST only.
The third patch updates DWRR MTU configuration for CN10KB silicon. HW uses
the DWRR MTU to compute DWRR weight.
Patch 4 configures the LBK link in TL3_TL2 configuration only when switch
mode is enabled.
Patch 5 adds an option in the mailbox request to enable/disable DROP_RE bit
which drops packets with L2 errors when set.
Patch 6 updates SMQ flush mechanism to stop other child nodes from
enqueuing any packets while SMQ flush is active. Otherwise SMQ flush may
timeout.
Kiran Kumar K (1):
octeontx2-af: extend RSS supported offload types
Naveen Mamindlapalli (2):
octeontx2-af: Add devlink option to adjust mcam high prio zone entries
octeontx2-af: Set XOFF on other child transmit schedulers during SMQ
flush
Nithin Dabilpuram (1):
octeontx2-af: add option to toggle DROP_RE enable in rx cfg
Subbaraya Sundeep (1):
octeontx2-af: Enable LBK links only when switch mode is on.
Sunil Goutham (1):
octeontx2-af: cn10k: Set NIX DWRR MTU for CN10KB silicon
---
v2:
Rebased on net-next/main.
.../ethernet/marvell/octeontx2/af/common.h | 7 +
.../net/ethernet/marvell/octeontx2/af/mbox.h | 11 +-
.../net/ethernet/marvell/octeontx2/af/rvu.h | 20 ++
.../marvell/octeontx2/af/rvu_devlink.c | 74 +++++-
.../ethernet/marvell/octeontx2/af/rvu_nix.c | 247 ++++++++++++++++--
.../ethernet/marvell/octeontx2/af/rvu_reg.h | 3 +-
.../marvell/octeontx2/af/rvu_switch.c | 18 ++
.../marvell/octeontx2/nic/otx2_common.c | 18 +-
.../marvell/octeontx2/nic/otx2_common.h | 1 +
9 files changed, 379 insertions(+), 20 deletions(-)
--
2.39.0.198.ga38d39a4c5
From: Kiran Kumar K <[email protected]>
Add support to select L3 SRC or DST only, L4 SRC or DST only for RSS
calculation.
AF consumer may have requirement as we can select only SRC or DST data for
RSS calculation in L3, L4 layers. With this requirement there will be
following combinations, IPV[4,6]_SRC_ONLY, IPV[4,6]_DST_ONLY,
[TCP,UDP,SCTP]_SRC_ONLY, [TCP,UDP,SCTP]_DST_ONLY. So, instead of creating
a bit for each combination, we are using upper 4 bits (31:28) in the
flow_key_cfg to represent the SRC, DST selection. 31 => L3_SRC,
30 => L3_DST, 29 => L4_SRC, 28 => L4_DST. These won't be part of flow_cfg,
so that we don't need to change the existing ABI.
Signed-off-by: Kiran Kumar K <[email protected]>
Signed-off-by: Geetha sowjanya <[email protected]>
Signed-off-by: Naveen Mamindlapalli <[email protected]>
---
.../net/ethernet/marvell/octeontx2/af/mbox.h | 6 ++
.../ethernet/marvell/octeontx2/af/rvu_nix.c | 57 +++++++++++++++++++
2 files changed, 63 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 6389ed83637d..671fcf86ed87 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -1080,6 +1080,8 @@ struct nix_vtag_config_rsp {
*/
};
+#define NIX_FLOW_KEY_TYPE_L3_L4_MASK (~(0xf << 28))
+
struct nix_rss_flowkey_cfg {
struct mbox_msghdr hdr;
int mcam_index; /* MCAM entry index to modify */
@@ -1105,6 +1107,10 @@ struct nix_rss_flowkey_cfg {
#define NIX_FLOW_KEY_TYPE_IPV4_PROTO BIT(21)
#define NIX_FLOW_KEY_TYPE_AH BIT(22)
#define NIX_FLOW_KEY_TYPE_ESP BIT(23)
+#define NIX_FLOW_KEY_TYPE_L4_DST_ONLY BIT(28)
+#define NIX_FLOW_KEY_TYPE_L4_SRC_ONLY BIT(29)
+#define NIX_FLOW_KEY_TYPE_L3_DST_ONLY BIT(30)
+#define NIX_FLOW_KEY_TYPE_L3_SRC_ONLY BIT(31)
u32 flowkey_cfg; /* Flowkey types selected */
u8 group; /* RSS context or group */
};
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 79ed7af0b0a4..ee52b86c061f 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -3353,6 +3353,7 @@ static int set_flowkey_fields(struct nix_rx_flowkey_alg *alg, u32 flow_cfg)
struct nix_rx_flowkey_alg *field;
struct nix_rx_flowkey_alg tmp;
u32 key_type, valid_key;
+ u32 l3_l4_src_dst;
int l4_key_offset = 0;
if (!alg)
@@ -3380,6 +3381,15 @@ static int set_flowkey_fields(struct nix_rx_flowkey_alg *alg, u32 flow_cfg)
* group_member - Enabled when protocol is part of a group.
*/
+ /* Last 4 bits (31:28) are reserved to specify SRC, DST
+ * selection for L3, L4 i.e IPV[4,6]_SRC, IPV[4,6]_DST,
+ * [TCP,UDP,SCTP]_SRC, [TCP,UDP,SCTP]_DST
+ * 31 => L3_SRC, 30 => L3_DST, 29 => L4_SRC, 28 => L4_DST
+ */
+ l3_l4_src_dst = flow_cfg;
+ /* Reset these 4 bits, so that these won't be part of key */
+ flow_cfg &= NIX_FLOW_KEY_TYPE_L3_L4_MASK;
+
keyoff_marker = 0; max_key_off = 0; group_member = 0;
nr_field = 0; key_off = 0; field_marker = 1;
field = &tmp; max_bit_pos = fls(flow_cfg);
@@ -3417,6 +3427,22 @@ static int set_flowkey_fields(struct nix_rx_flowkey_alg *alg, u32 flow_cfg)
}
field->hdr_offset = 12; /* SIP offset */
field->bytesm1 = 7; /* SIP + DIP, 8 bytes */
+
+ /* Only SIP */
+ if (l3_l4_src_dst & NIX_FLOW_KEY_TYPE_L3_SRC_ONLY)
+ field->bytesm1 = 3; /* SIP, 4 bytes */
+
+ if (l3_l4_src_dst & NIX_FLOW_KEY_TYPE_L3_DST_ONLY) {
+ /* Both SIP + DIP */
+ if (field->bytesm1 == 3) {
+ field->bytesm1 = 7; /* SIP + DIP, 8B */
+ } else {
+ /* Only DIP */
+ field->hdr_offset = 16; /* DIP off */
+ field->bytesm1 = 3; /* DIP, 4 bytes */
+ }
+ }
+
field->ltype_mask = 0xF; /* Match only IPv4 */
keyoff_marker = false;
break;
@@ -3430,6 +3456,22 @@ static int set_flowkey_fields(struct nix_rx_flowkey_alg *alg, u32 flow_cfg)
}
field->hdr_offset = 8; /* SIP offset */
field->bytesm1 = 31; /* SIP + DIP, 32 bytes */
+
+ /* Only SIP */
+ if (l3_l4_src_dst & NIX_FLOW_KEY_TYPE_L3_SRC_ONLY)
+ field->bytesm1 = 15; /* SIP, 16 bytes */
+
+ if (l3_l4_src_dst & NIX_FLOW_KEY_TYPE_L3_DST_ONLY) {
+ /* Both SIP + DIP */
+ if (field->bytesm1 == 15) {
+ /* SIP + DIP, 32 bytes */
+ field->bytesm1 = 31;
+ } else {
+ /* Only DIP */
+ field->hdr_offset = 24; /* DIP off */
+ field->bytesm1 = 15; /* DIP,16 bytes */
+ }
+ }
field->ltype_mask = 0xF; /* Match only IPv6 */
break;
case NIX_FLOW_KEY_TYPE_TCP:
@@ -3445,6 +3487,21 @@ static int set_flowkey_fields(struct nix_rx_flowkey_alg *alg, u32 flow_cfg)
field->lid = NPC_LID_LH;
field->bytesm1 = 3; /* Sport + Dport, 4 bytes */
+ if (l3_l4_src_dst & NIX_FLOW_KEY_TYPE_L4_SRC_ONLY)
+ field->bytesm1 = 1; /* SRC, 2 bytes */
+
+ if (l3_l4_src_dst & NIX_FLOW_KEY_TYPE_L4_DST_ONLY) {
+ /* Both SRC + DST */
+ if (field->bytesm1 == 1) {
+ /* SRC + DST, 4 bytes */
+ field->bytesm1 = 3;
+ } else {
+ /* Only DIP */
+ field->hdr_offset = 2; /* DST off */
+ field->bytesm1 = 1; /* DST, 2 bytes */
+ }
+ }
+
/* Enum values for NPC_LID_LD and NPC_LID_LG are same,
* so no need to change the ltype_match, just change
* the lid for inner protocols
--
2.39.0.198.ga38d39a4c5
Hello:
This series was applied to netdev/net-next.git (main)
by David S. Miller <[email protected]>:
On Mon, 12 Jun 2023 11:34:18 +0530 you wrote:
> This patch series includes a few enhancements and other updates to the
> RVU NIX AF driver.
>
> The first patch adds devlink option to configure NPC MCAM high priority
> zone entries reservation. This is useful when the requester needs more
> high priority entries than default reserved entries.
>
> [...]
Here is the summary with links:
- [net-next,v2,1/6] octeontx2-af: Add devlink option to adjust mcam high prio zone entries
https://git.kernel.org/netdev/net-next/c/09de114c770f
- [net-next,v2,2/6] octeontx2-af: extend RSS supported offload types
https://git.kernel.org/netdev/net-next/c/79bc788c038c
- [net-next,v2,3/6] octeontx2-af: cn10k: Set NIX DWRR MTU for CN10KB silicon
https://git.kernel.org/netdev/net-next/c/bbba125eade7
- [net-next,v2,4/6] octeontx2-af: Enable LBK links only when switch mode is on.
https://git.kernel.org/netdev/net-next/c/b6a072a15327
- [net-next,v2,5/6] octeontx2-af: add option to toggle DROP_RE enable in rx cfg
https://git.kernel.org/netdev/net-next/c/4ed6387a61fc
- [net-next,v2,6/6] octeontx2-af: Set XOFF on other child transmit schedulers during SMQ flush
https://git.kernel.org/netdev/net-next/c/e18aab0470d8
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html