2023-06-26 17:58:02

by Konrad Dybcio

Subject: [PATCH v2 0/3] Fix up 8280 GCC GDSCs

Part of the SC8280XP GDSCs were not fully described and others were
missing. This series attempts to fix that.

As usual with the laptop stuff, please test it on your setup to make sure
everybody's still happy.

Signed-off-by: Konrad Dybcio <[email protected]>
---
Changes in v2:
- Pick up tags
- Drop HW_CTRL as the flag upstream indicates usage and not only support
for that feature
- Link to v1: https://lore.kernel.org/r/[email protected]

---
Konrad Dybcio (3):
clk: qcom: gcc-sc8280xp: Add missing GDSC flags
dt-bindings: clock: qcom,gcc-sc8280xp: Add missing GDSCs
clk: qcom: gcc-sc8280xp: Add missing GDSCs

drivers/clk/qcom/gcc-sc8280xp.c | 121 ++++++++++++++++++++++++--
include/dt-bindings/clock/qcom,gcc-sc8280xp.h | 10 +++
2 files changed, 124 insertions(+), 7 deletions(-)
---
base-commit: 60e7c4a25da68cd826719b685babbd23e73b85b0
change-id: 20230620-topic-sc8280_gccgdsc-1b6b7eabaaf6

Best regards,
--
Konrad Dybcio <[email protected]>

2023-06-26 18:00:42

by Konrad Dybcio

Subject: [PATCH v2 2/3] dt-bindings: clock: qcom,gcc-sc8280xp: Add missing GDSCs

There are 10 more GDSCs that we've not been caring about, and by extension
(and perhaps even more importantly), not putting to sleep. Add them.

Fixes: a66a82f2a55e ("dt-bindings: clock: Add Qualcomm SC8280XP GCC bindings")
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
---
include/dt-bindings/clock/qcom,gcc-sc8280xp.h | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h
index 721105ea4fad..845491591784 100644
--- a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h
+++ b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h
@@ -494,5 +494,15 @@
#define USB30_SEC_GDSC 11
#define EMAC_0_GDSC 12
#define EMAC_1_GDSC 13
+#define USB4_1_GDSC 14
+#define USB4_GDSC 15
+#define HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC 16
+#define HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC 17
+#define HLOS1_VOTE_MMNOC_MMU_TBU_SF0_GDSC 18
+#define HLOS1_VOTE_MMNOC_MMU_TBU_SF1_GDSC 19
+#define HLOS1_VOTE_TURING_MMU_TBU0_GDSC 20
+#define HLOS1_VOTE_TURING_MMU_TBU1_GDSC 21
+#define HLOS1_VOTE_TURING_MMU_TBU2_GDSC 22
+#define HLOS1_VOTE_TURING_MMU_TBU3_GDSC 23

#endif

--
2.41.0

2023-06-26 18:12:59

by Konrad Dybcio

Subject: [PATCH v2 1/3] clk: qcom: gcc-sc8280xp: Add missing GDSC flags

All of the 8280's GCC GDSCs can and should use the retain registers so
as not to lose their state when entering lower power modes.

Fixes: d65d005f9a6c ("clk: qcom: add sc8280xp GCC driver")
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/clk/qcom/gcc-sc8280xp.c | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c
index b90c71637814..64bea886322d 100644
--- a/drivers/clk/qcom/gcc-sc8280xp.c
+++ b/drivers/clk/qcom/gcc-sc8280xp.c
@@ -6761,7 +6761,7 @@ static struct gdsc pcie_0_tunnel_gdsc = {
.name = "pcie_0_tunnel_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
- .flags = VOTABLE,
+ .flags = VOTABLE | RETAIN_FF_ENABLE,
};

static struct gdsc pcie_1_tunnel_gdsc = {
@@ -6772,7 +6772,7 @@ static struct gdsc pcie_1_tunnel_gdsc = {
.name = "pcie_1_tunnel_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
- .flags = VOTABLE,
+ .flags = VOTABLE | RETAIN_FF_ENABLE,
};

/*
@@ -6787,7 +6787,7 @@ static struct gdsc pcie_2a_gdsc = {
.name = "pcie_2a_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
- .flags = VOTABLE | ALWAYS_ON,
+ .flags = VOTABLE | RETAIN_FF_ENABLE | ALWAYS_ON,
};

static struct gdsc pcie_2b_gdsc = {
@@ -6798,7 +6798,7 @@ static struct gdsc pcie_2b_gdsc = {
.name = "pcie_2b_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
- .flags = VOTABLE | ALWAYS_ON,
+ .flags = VOTABLE | RETAIN_FF_ENABLE | ALWAYS_ON,
};

static struct gdsc pcie_3a_gdsc = {
@@ -6809,7 +6809,7 @@ static struct gdsc pcie_3a_gdsc = {
.name = "pcie_3a_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
- .flags = VOTABLE | ALWAYS_ON,
+ .flags = VOTABLE | RETAIN_FF_ENABLE | ALWAYS_ON,
};

static struct gdsc pcie_3b_gdsc = {
@@ -6820,7 +6820,7 @@ static struct gdsc pcie_3b_gdsc = {
.name = "pcie_3b_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
- .flags = VOTABLE | ALWAYS_ON,
+ .flags = VOTABLE | RETAIN_FF_ENABLE | ALWAYS_ON,
};

static struct gdsc pcie_4_gdsc = {
@@ -6831,7 +6831,7 @@ static struct gdsc pcie_4_gdsc = {
.name = "pcie_4_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
- .flags = VOTABLE | ALWAYS_ON,
+ .flags = VOTABLE | RETAIN_FF_ENABLE | ALWAYS_ON,
};

static struct gdsc ufs_card_gdsc = {
@@ -6840,6 +6840,7 @@ static struct gdsc ufs_card_gdsc = {
.name = "ufs_card_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
+ .flags = RETAIN_FF_ENABLE,
};

static struct gdsc ufs_phy_gdsc = {
@@ -6848,6 +6849,7 @@ static struct gdsc ufs_phy_gdsc = {
.name = "ufs_phy_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
+ .flags = RETAIN_FF_ENABLE,
};

static struct gdsc usb30_mp_gdsc = {
@@ -6856,6 +6858,7 @@ static struct gdsc usb30_mp_gdsc = {
.name = "usb30_mp_gdsc",
},
.pwrsts = PWRSTS_RET_ON,
+ .flags = RETAIN_FF_ENABLE,
};

static struct gdsc usb30_prim_gdsc = {
@@ -6864,6 +6867,7 @@ static struct gdsc usb30_prim_gdsc = {
.name = "usb30_prim_gdsc",
},
.pwrsts = PWRSTS_RET_ON,
+ .flags = RETAIN_FF_ENABLE,
};

static struct gdsc usb30_sec_gdsc = {
@@ -6872,6 +6876,7 @@ static struct gdsc usb30_sec_gdsc = {
.name = "usb30_sec_gdsc",
},
.pwrsts = PWRSTS_RET_ON,
+ .flags = RETAIN_FF_ENABLE,
};

static struct gdsc emac_0_gdsc = {
@@ -6880,6 +6885,7 @@ static struct gdsc emac_0_gdsc = {
.name = "emac_0_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
+ .flags = RETAIN_FF_ENABLE,
};

static struct gdsc emac_1_gdsc = {
@@ -6888,6 +6894,7 @@ static struct gdsc emac_1_gdsc = {
.name = "emac_1_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
+ .flags = RETAIN_FF_ENABLE,
};

static struct clk_regmap *gcc_sc8280xp_clocks[] = {

--
2.41.0

2023-06-26 18:13:05

by Konrad Dybcio

Subject: [PATCH v2 3/3] clk: qcom: gcc-sc8280xp: Add missing GDSCs

There are 10 more GDSCs that we've not been caring about, and by extension
(and perhaps even more importantly), not putting to sleep. Add them.

Fixes: d65d005f9a6c ("clk: qcom: add sc8280xp GCC driver")
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/clk/qcom/gcc-sc8280xp.c | 100 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 100 insertions(+)

diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c
index 64bea886322d..3e1a62fa3a07 100644
--- a/drivers/clk/qcom/gcc-sc8280xp.c
+++ b/drivers/clk/qcom/gcc-sc8280xp.c
@@ -6897,6 +6897,96 @@ static struct gdsc emac_1_gdsc = {
.flags = RETAIN_FF_ENABLE,
};

+static struct gdsc usb4_1_gdsc = {
+ .gdscr = 0xb8004,
+ .pd = {
+ .name = "usb4_1_gdsc",
+ },
+ .pwrsts = PWRSTS_OFF_ON,
+ .flags = RETAIN_FF_ENABLE,
+};
+
+static struct gdsc usb4_gdsc = {
+ .gdscr = 0x2a004,
+ .pd = {
+ .name = "usb4_gdsc",
+ },
+ .pwrsts = PWRSTS_OFF_ON,
+ .flags = RETAIN_FF_ENABLE,
+};
+
+static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc = {
+ .gdscr = 0x7d050,
+ .pd = {
+ .name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc",
+ },
+ .pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
+};
+
+static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc = {
+ .gdscr = 0x7d058,
+ .pd = {
+ .name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc",
+ },
+ .pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
+};
+
+static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc = {
+ .gdscr = 0x7d054,
+ .pd = {
+ .name = "hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc",
+ },
+ .pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
+};
+
+static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc = {
+ .gdscr = 0x7d06c,
+ .pd = {
+ .name = "hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc",
+ },
+ .pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
+};
+
+static struct gdsc hlos1_vote_turing_mmu_tbu0_gdsc = {
+ .gdscr = 0x7d05c,
+ .pd = {
+ .name = "hlos1_vote_turing_mmu_tbu0_gdsc",
+ },
+ .pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
+};
+
+static struct gdsc hlos1_vote_turing_mmu_tbu1_gdsc = {
+ .gdscr = 0x7d060,
+ .pd = {
+ .name = "hlos1_vote_turing_mmu_tbu1_gdsc",
+ },
+ .pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
+};
+
+static struct gdsc hlos1_vote_turing_mmu_tbu2_gdsc = {
+ .gdscr = 0x7d0a0,
+ .pd = {
+ .name = "hlos1_vote_turing_mmu_tbu2_gdsc",
+ },
+ .pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
+};
+
+static struct gdsc hlos1_vote_turing_mmu_tbu3_gdsc = {
+ .gdscr = 0x7d0a4,
+ .pd = {
+ .name = "hlos1_vote_turing_mmu_tbu3_gdsc",
+ },
+ .pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
+};
+
static struct clk_regmap *gcc_sc8280xp_clocks[] = {
[GCC_AGGRE_NOC_PCIE0_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie0_tunnel_axi_clk.clkr,
[GCC_AGGRE_NOC_PCIE1_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie1_tunnel_axi_clk.clkr,
@@ -7377,6 +7467,16 @@ static struct gdsc *gcc_sc8280xp_gdscs[] = {
[USB30_SEC_GDSC] = &usb30_sec_gdsc,
[EMAC_0_GDSC] = &emac_0_gdsc,
[EMAC_1_GDSC] = &emac_1_gdsc,
+ [USB4_1_GDSC] = &usb4_1_gdsc,
+ [USB4_GDSC] = &usb4_gdsc,
+ [HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc,
+ [HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc,
+ [HLOS1_VOTE_MMNOC_MMU_TBU_SF0_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc,
+ [HLOS1_VOTE_MMNOC_MMU_TBU_SF1_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc,
+ [HLOS1_VOTE_TURING_MMU_TBU0_GDSC] = &hlos1_vote_turing_mmu_tbu0_gdsc,
+ [HLOS1_VOTE_TURING_MMU_TBU1_GDSC] = &hlos1_vote_turing_mmu_tbu1_gdsc,
+ [HLOS1_VOTE_TURING_MMU_TBU2_GDSC] = &hlos1_vote_turing_mmu_tbu2_gdsc,
+ [HLOS1_VOTE_TURING_MMU_TBU3_GDSC] = &hlos1_vote_turing_mmu_tbu3_gdsc,
};

static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = {

--
2.41.0

2023-07-07 08:01:16

by Manivannan Sadhasivam

Subject: Re: [PATCH v2 3/3] clk: qcom: gcc-sc8280xp: Add missing GDSCs

On Mon, Jun 26, 2023 at 07:48:08PM +0200, Konrad Dybcio wrote:
> There are 10 more GDSCs that we've not been caring about, and by extension
> (and perhaps even more importantly), not putting to sleep. Add them.
>
> Fixes: d65d005f9a6c ("clk: qcom: add sc8280xp GCC driver")
> Signed-off-by: Konrad Dybcio <[email protected]>

One nit below:

Acked-by: Manivannan Sadhasivam <[email protected]>

> ---
> drivers/clk/qcom/gcc-sc8280xp.c | 100 ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 100 insertions(+)
>
> diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c
> index 64bea886322d..3e1a62fa3a07 100644
> --- a/drivers/clk/qcom/gcc-sc8280xp.c
> +++ b/drivers/clk/qcom/gcc-sc8280xp.c
> @@ -6897,6 +6897,96 @@ static struct gdsc emac_1_gdsc = {
> .flags = RETAIN_FF_ENABLE,
> };
>
> +static struct gdsc usb4_1_gdsc = {
> + .gdscr = 0xb8004,
> + .pd = {
> + .name = "usb4_1_gdsc",
> + },
> + .pwrsts = PWRSTS_OFF_ON,
> + .flags = RETAIN_FF_ENABLE,
> +};
> +
> +static struct gdsc usb4_gdsc = {
> + .gdscr = 0x2a004,
> + .pd = {
> + .name = "usb4_gdsc",
> + },
> + .pwrsts = PWRSTS_OFF_ON,
> + .flags = RETAIN_FF_ENABLE,
> +};

Can we group the USB GDSCs together?

- Mani

> +
> +static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc = {
> + .gdscr = 0x7d050,
> + .pd = {
> + .name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc",
> + },
> + .pwrsts = PWRSTS_OFF_ON,
> + .flags = VOTABLE,
> +};
> +
> +static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc = {
> + .gdscr = 0x7d058,
> + .pd = {
> + .name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc",
> + },
> + .pwrsts = PWRSTS_OFF_ON,
> + .flags = VOTABLE,
> +};
> +
> +static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc = {
> + .gdscr = 0x7d054,
> + .pd = {
> + .name = "hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc",
> + },
> + .pwrsts = PWRSTS_OFF_ON,
> + .flags = VOTABLE,
> +};
> +
> +static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc = {
> + .gdscr = 0x7d06c,
> + .pd = {
> + .name = "hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc",
> + },
> + .pwrsts = PWRSTS_OFF_ON,
> + .flags = VOTABLE,
> +};
> +
> +static struct gdsc hlos1_vote_turing_mmu_tbu0_gdsc = {
> + .gdscr = 0x7d05c,
> + .pd = {
> + .name = "hlos1_vote_turing_mmu_tbu0_gdsc",
> + },
> + .pwrsts = PWRSTS_OFF_ON,
> + .flags = VOTABLE,
> +};
> +
> +static struct gdsc hlos1_vote_turing_mmu_tbu1_gdsc = {
> + .gdscr = 0x7d060,
> + .pd = {
> + .name = "hlos1_vote_turing_mmu_tbu1_gdsc",
> + },
> + .pwrsts = PWRSTS_OFF_ON,
> + .flags = VOTABLE,
> +};
> +
> +static struct gdsc hlos1_vote_turing_mmu_tbu2_gdsc = {
> + .gdscr = 0x7d0a0,
> + .pd = {
> + .name = "hlos1_vote_turing_mmu_tbu2_gdsc",
> + },
> + .pwrsts = PWRSTS_OFF_ON,
> + .flags = VOTABLE,
> +};
> +
> +static struct gdsc hlos1_vote_turing_mmu_tbu3_gdsc = {
> + .gdscr = 0x7d0a4,
> + .pd = {
> + .name = "hlos1_vote_turing_mmu_tbu3_gdsc",
> + },
> + .pwrsts = PWRSTS_OFF_ON,
> + .flags = VOTABLE,
> +};
> +
> static struct clk_regmap *gcc_sc8280xp_clocks[] = {
> [GCC_AGGRE_NOC_PCIE0_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie0_tunnel_axi_clk.clkr,
> [GCC_AGGRE_NOC_PCIE1_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie1_tunnel_axi_clk.clkr,
> @@ -7377,6 +7467,16 @@ static struct gdsc *gcc_sc8280xp_gdscs[] = {
> [USB30_SEC_GDSC] = &usb30_sec_gdsc,
> [EMAC_0_GDSC] = &emac_0_gdsc,
> [EMAC_1_GDSC] = &emac_1_gdsc,
> + [USB4_1_GDSC] = &usb4_1_gdsc,
> + [USB4_GDSC] = &usb4_gdsc,
> + [HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc,
> + [HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc,
> + [HLOS1_VOTE_MMNOC_MMU_TBU_SF0_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc,
> + [HLOS1_VOTE_MMNOC_MMU_TBU_SF1_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc,
> + [HLOS1_VOTE_TURING_MMU_TBU0_GDSC] = &hlos1_vote_turing_mmu_tbu0_gdsc,
> + [HLOS1_VOTE_TURING_MMU_TBU1_GDSC] = &hlos1_vote_turing_mmu_tbu1_gdsc,
> + [HLOS1_VOTE_TURING_MMU_TBU2_GDSC] = &hlos1_vote_turing_mmu_tbu2_gdsc,
> + [HLOS1_VOTE_TURING_MMU_TBU3_GDSC] = &hlos1_vote_turing_mmu_tbu3_gdsc,
> };
>
> static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = {
>
> --
> 2.41.0
>

--
மணிவண்ணன் சதாசிவம்

2023-07-07 08:10:54

by Manivannan Sadhasivam

Subject: Re: [PATCH v2 2/3] dt-bindings: clock: qcom,gcc-sc8280xp: Add missing GDSCs

On Mon, Jun 26, 2023 at 07:48:07PM +0200, Konrad Dybcio wrote:
> There are 10 more GDSCs that we've not been caring about, and by extension
> (and perhaps even more importantly), not putting to sleep. Add them.
>
> Fixes: a66a82f2a55e ("dt-bindings: clock: Add Qualcomm SC8280XP GCC bindings")
> Acked-by: Rob Herring <[email protected]>
> Signed-off-by: Konrad Dybcio <[email protected]>

Acked-by: Manivannan Sadhasivam <[email protected]>

- Mani

> ---
> include/dt-bindings/clock/qcom,gcc-sc8280xp.h | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h
> index 721105ea4fad..845491591784 100644
> --- a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h
> +++ b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h
> @@ -494,5 +494,15 @@
> #define USB30_SEC_GDSC 11
> #define EMAC_0_GDSC 12
> #define EMAC_1_GDSC 13
> +#define USB4_1_GDSC 14
> +#define USB4_GDSC 15
> +#define HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC 16
> +#define HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC 17
> +#define HLOS1_VOTE_MMNOC_MMU_TBU_SF0_GDSC 18
> +#define HLOS1_VOTE_MMNOC_MMU_TBU_SF1_GDSC 19
> +#define HLOS1_VOTE_TURING_MMU_TBU0_GDSC 20
> +#define HLOS1_VOTE_TURING_MMU_TBU1_GDSC 21
> +#define HLOS1_VOTE_TURING_MMU_TBU2_GDSC 22
> +#define HLOS1_VOTE_TURING_MMU_TBU3_GDSC 23
>
> #endif
>
> --
> 2.41.0
>

--
மணிவண்ணன் சதாசிவம்

2023-07-07 08:21:18

by Manivannan Sadhasivam

Subject: Re: [PATCH v2 1/3] clk: qcom: gcc-sc8280xp: Add missing GDSC flags

On Mon, Jun 26, 2023 at 07:48:06PM +0200, Konrad Dybcio wrote:
> All of the 8280's GCC GDSCs can and should use the retain registers so
> as not to lose their state when entering lower power modes.
>
> Fixes: d65d005f9a6c ("clk: qcom: add sc8280xp GCC driver")
> Signed-off-by: Konrad Dybcio <[email protected]>

Acked-by: Manivannan Sadhasivam <[email protected]>

- Mani

> ---
> drivers/clk/qcom/gcc-sc8280xp.c | 21 ++++++++++++++-------
> 1 file changed, 14 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c
> index b90c71637814..64bea886322d 100644
> --- a/drivers/clk/qcom/gcc-sc8280xp.c
> +++ b/drivers/clk/qcom/gcc-sc8280xp.c
> @@ -6761,7 +6761,7 @@ static struct gdsc pcie_0_tunnel_gdsc = {
> .name = "pcie_0_tunnel_gdsc",
> },
> .pwrsts = PWRSTS_OFF_ON,
> - .flags = VOTABLE,
> + .flags = VOTABLE | RETAIN_FF_ENABLE,
> };
>
> static struct gdsc pcie_1_tunnel_gdsc = {
> @@ -6772,7 +6772,7 @@ static struct gdsc pcie_1_tunnel_gdsc = {
> .name = "pcie_1_tunnel_gdsc",
> },
> .pwrsts = PWRSTS_OFF_ON,
> - .flags = VOTABLE,
> + .flags = VOTABLE | RETAIN_FF_ENABLE,
> };
>
> /*
> @@ -6787,7 +6787,7 @@ static struct gdsc pcie_2a_gdsc = {
> .name = "pcie_2a_gdsc",
> },
> .pwrsts = PWRSTS_OFF_ON,
> - .flags = VOTABLE | ALWAYS_ON,
> + .flags = VOTABLE | RETAIN_FF_ENABLE | ALWAYS_ON,
> };
>
> static struct gdsc pcie_2b_gdsc = {
> @@ -6798,7 +6798,7 @@ static struct gdsc pcie_2b_gdsc = {
> .name = "pcie_2b_gdsc",
> },
> .pwrsts = PWRSTS_OFF_ON,
> - .flags = VOTABLE | ALWAYS_ON,
> + .flags = VOTABLE | RETAIN_FF_ENABLE | ALWAYS_ON,
> };
>
> static struct gdsc pcie_3a_gdsc = {
> @@ -6809,7 +6809,7 @@ static struct gdsc pcie_3a_gdsc = {
> .name = "pcie_3a_gdsc",
> },
> .pwrsts = PWRSTS_OFF_ON,
> - .flags = VOTABLE | ALWAYS_ON,
> + .flags = VOTABLE | RETAIN_FF_ENABLE | ALWAYS_ON,
> };
>
> static struct gdsc pcie_3b_gdsc = {
> @@ -6820,7 +6820,7 @@ static struct gdsc pcie_3b_gdsc = {
> .name = "pcie_3b_gdsc",
> },
> .pwrsts = PWRSTS_OFF_ON,
> - .flags = VOTABLE | ALWAYS_ON,
> + .flags = VOTABLE | RETAIN_FF_ENABLE | ALWAYS_ON,
> };
>
> static struct gdsc pcie_4_gdsc = {
> @@ -6831,7 +6831,7 @@ static struct gdsc pcie_4_gdsc = {
> .name = "pcie_4_gdsc",
> },
> .pwrsts = PWRSTS_OFF_ON,
> - .flags = VOTABLE | ALWAYS_ON,
> + .flags = VOTABLE | RETAIN_FF_ENABLE | ALWAYS_ON,
> };
>
> static struct gdsc ufs_card_gdsc = {
> @@ -6840,6 +6840,7 @@ static struct gdsc ufs_card_gdsc = {
> .name = "ufs_card_gdsc",
> },
> .pwrsts = PWRSTS_OFF_ON,
> + .flags = RETAIN_FF_ENABLE,
> };
>
> static struct gdsc ufs_phy_gdsc = {
> @@ -6848,6 +6849,7 @@ static struct gdsc ufs_phy_gdsc = {
> .name = "ufs_phy_gdsc",
> },
> .pwrsts = PWRSTS_OFF_ON,
> + .flags = RETAIN_FF_ENABLE,
> };
>
> static struct gdsc usb30_mp_gdsc = {
> @@ -6856,6 +6858,7 @@ static struct gdsc usb30_mp_gdsc = {
> .name = "usb30_mp_gdsc",
> },
> .pwrsts = PWRSTS_RET_ON,
> + .flags = RETAIN_FF_ENABLE,
> };
>
> static struct gdsc usb30_prim_gdsc = {
> @@ -6864,6 +6867,7 @@ static struct gdsc usb30_prim_gdsc = {
> .name = "usb30_prim_gdsc",
> },
> .pwrsts = PWRSTS_RET_ON,
> + .flags = RETAIN_FF_ENABLE,
> };
>
> static struct gdsc usb30_sec_gdsc = {
> @@ -6872,6 +6876,7 @@ static struct gdsc usb30_sec_gdsc = {
> .name = "usb30_sec_gdsc",
> },
> .pwrsts = PWRSTS_RET_ON,
> + .flags = RETAIN_FF_ENABLE,
> };
>
> static struct gdsc emac_0_gdsc = {
> @@ -6880,6 +6885,7 @@ static struct gdsc emac_0_gdsc = {
> .name = "emac_0_gdsc",
> },
> .pwrsts = PWRSTS_OFF_ON,
> + .flags = RETAIN_FF_ENABLE,
> };
>
> static struct gdsc emac_1_gdsc = {
> @@ -6888,6 +6894,7 @@ static struct gdsc emac_1_gdsc = {
> .name = "emac_1_gdsc",
> },
> .pwrsts = PWRSTS_OFF_ON,
> + .flags = RETAIN_FF_ENABLE,
> };
>
> static struct clk_regmap *gcc_sc8280xp_clocks[] = {
>
> --
> 2.41.0
>

--
மணிவண்ணன் சதாசிவம்

2023-07-10 05:33:00

by Bjorn Andersson

Subject: Re: (subset) [PATCH v2 0/3] Fix up 8280 GCC GDSCs

On Mon, 26 Jun 2023 19:48:05 +0200, Konrad Dybcio wrote:
> Part of the SC8280XP GDSCs were not fully described and others were
> missing. This series attempts to fix that.
>
> As usual with the laptop stuff, please test it on your setup to make sure
> everybody's still happy.
>
>
> [...]

Applied, thanks!

[1/3] clk: qcom: gcc-sc8280xp: Add missing GDSC flags
commit: 2fd02de27054576a4a8c89302e2f77122c55e957
[3/3] clk: qcom: gcc-sc8280xp: Add missing GDSCs
commit: 4712eb7ff85bd3dd09c6668b8de4080e02b3eea9

Best regards,
--
Bjorn Andersson <[email protected]>