2023-06-22 20:29:30

by Maxim Kochetkov

[permalink] [raw]
Subject: [PATCH v4 1/1] net: axienet: Move reset before 64-bit DMA detection

64-bit DMA detection will fail if axienet was started before (by boot
loader, boot ROM, etc). In this state axienet will not start properly.
XAXIDMA_TX_CDESC_OFFSET + 4 register (MM2S_CURDESC_MSB) is used to detect
64-bit DMA capability here. But datasheet says: When DMACR.RS is 1
(axienet is in enabled state), CURDESC_PTR becomes Read Only (RO) and
is used to fetch the first descriptor. So iowrite32()/ioread32() trick
to this register to detect 64-bit DMA will not work.
So move axienet reset before 64-bit DMA detection.

Fixes: f735c40ed93c ("net: axienet: Autodetect 64-bit DMA capability")
Signed-off-by: Maxim Kochetkov <[email protected]>
Reviewed-by: Robert Hancock <[email protected]>
Reviewed-by: Radhey Shyam Pandey <[email protected]>
---
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 3e310b55bce2..734822321e0a 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -2042,6 +2042,11 @@ static int axienet_probe(struct platform_device *pdev)
goto cleanup_clk;
}

+ /* Reset core now that clocks are enabled, prior to accessing MDIO */
+ ret = __axienet_device_reset(lp);
+ if (ret)
+ goto cleanup_clk;
+
/* Autodetect the need for 64-bit DMA pointers.
* When the IP is configured for a bus width bigger than 32 bits,
* writing the MSB registers is mandatory, even if they are all 0.
@@ -2096,11 +2101,6 @@ static int axienet_probe(struct platform_device *pdev)
lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;
lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC;

- /* Reset core now that clocks are enabled, prior to accessing MDIO */
- ret = __axienet_device_reset(lp);
- if (ret)
- goto cleanup_clk;
-
ret = axienet_mdio_setup(lp);
if (ret)
dev_warn(&pdev->dev,
--
2.40.1



2023-06-22 21:27:58

by Jakub Kicinski

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] net: axienet: Move reset before 64-bit DMA detection

On Thu, 22 Jun 2023 22:22:45 +0300 Maxim Kochetkov wrote:
> 64-bit DMA detection will fail if axienet was started before (by boot
> loader, boot ROM, etc). In this state axienet will not start properly.
> XAXIDMA_TX_CDESC_OFFSET + 4 register (MM2S_CURDESC_MSB) is used to detect
> 64-bit DMA capability here. But datasheet says: When DMACR.RS is 1
> (axienet is in enabled state), CURDESC_PTR becomes Read Only (RO) and
> is used to fetch the first descriptor. So iowrite32()/ioread32() trick
> to this register to detect 64-bit DMA will not work.
> So move axienet reset before 64-bit DMA detection.
>
> Fixes: f735c40ed93c ("net: axienet: Autodetect 64-bit DMA capability")
> Signed-off-by: Maxim Kochetkov <[email protected]>
> Reviewed-by: Robert Hancock <[email protected]>
> Reviewed-by: Radhey Shyam Pandey <[email protected]>

Quoting documentation:

Resending after review
~~~~~~~~~~~~~~~~~~~~~~

Allow at least 24 hours to pass between postings. This will ensure reviewers
from all geographical locations have a chance to chime in. Do not wait
too long (weeks) between postings either as it will make it harder for reviewers
to recall all the context.

Make sure you address all the feedback in your new posting. Do not post a new
version of the code if the discussion about the previous version is still
ongoing, unless directly instructed by a reviewer.

See: https://www.kernel.org/doc/html/next/process/maintainer-netdev.html#resending-after-review

2023-06-24 23:42:48

by patchwork-bot+netdevbpf

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] net: axienet: Move reset before 64-bit DMA detection

Hello:

This patch was applied to netdev/net.git (main)
by Jakub Kicinski <[email protected]>:

On Thu, 22 Jun 2023 22:22:45 +0300 you wrote:
> 64-bit DMA detection will fail if axienet was started before (by boot
> loader, boot ROM, etc). In this state axienet will not start properly.
> XAXIDMA_TX_CDESC_OFFSET + 4 register (MM2S_CURDESC_MSB) is used to detect
> 64-bit DMA capability here. But datasheet says: When DMACR.RS is 1
> (axienet is in enabled state), CURDESC_PTR becomes Read Only (RO) and
> is used to fetch the first descriptor. So iowrite32()/ioread32() trick
> to this register to detect 64-bit DMA will not work.
> So move axienet reset before 64-bit DMA detection.
>
> [...]

Here is the summary with links:
- [v4,1/1] net: axienet: Move reset before 64-bit DMA detection
https://git.kernel.org/netdev/net/c/f1bc9fc4a06d

You are awesome, thank you!
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