2023-06-23 15:22:43

by Aleksandr Shubin

[permalink] [raw]

Subject: [PATCH v2 3/3] riscv: dts: allwinner: d1: Add pwm node

---

D1 and T113s contain a pwm controller with 8 channels.
This controller is supported by the sun20i-pwm driver.

Add a device tree node for it.

Signed-off-by: Aleksandr Shubin <[email protected]>
---
arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
index 922e8e0e2c09..50f0f761527b 100644
--- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
@@ -127,6 +127,18 @@ uart3_pb_pins: uart3-pb-pins {
};
};

+ pwm: pwm@2000c00 {
+ compatible = "allwinner,sun20i-d1-pwm";
+ reg = <0x02000c00 0x400>;
+ clocks = <&dcxo>,
+ <&ccu CLK_BUS_PWM>;
+ clock-names = "hosc", "bus";
+ resets = <&ccu RST_BUS_PWM>;
+ allwinner,pwm-channels = <8>;
+ status = "disabled";
+ #pwm-cells = <0x3>;
+ };
+
ccu: clock-controller@2001000 {
compatible = "allwinner,sun20i-d1-ccu";
reg = <0x2001000 0x1000>;
--
2.25.1

2023-06-23 17:03:08

by Conor Dooley

[permalink] [raw]

Subject: Re: [PATCH v2 3/3] riscv: dts: allwinner: d1: Add pwm node

---

On Fri, Jun 23, 2023 at 06:00:01PM +0300, Aleksandr Shubin wrote:
> D1 and T113s contain a pwm controller with 8 channels.
> This controller is supported by the sun20i-pwm driver.
>
> Add a device tree node for it.
>
> Signed-off-by: Aleksandr Shubin <[email protected]>
> ---
> arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> index 922e8e0e2c09..50f0f761527b 100644
> --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> @@ -127,6 +127,18 @@ uart3_pb_pins: uart3-pb-pins {
> };
> };
>
> + pwm: pwm@2000c00 {
> + compatible = "allwinner,sun20i-d1-pwm";
> + reg = <0x02000c00 0x400>;
> + clocks = <&dcxo>,
> + <&ccu CLK_BUS_PWM>;
> + clock-names = "hosc", "bus";
> + resets = <&ccu RST_BUS_PWM>;

> + allwinner,pwm-channels = <8>;

This fails dtbs_check. Please test the dts against the bindings.

Cheers,
Conor.

> + status = "disabled";
> + #pwm-cells = <0x3>;
> + };
> +
> ccu: clock-controller@2001000 {
> compatible = "allwinner,sun20i-d1-ccu";
> reg = <0x2001000 0x1000>;
> --
> 2.25.1
>

---

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