This patch series introduces device tree declarations for various
peripheral IPs of the A1 SoC family, including clock controllers, EFUSE,
USB, SPI Flash Controller, SDIO, and UART_AO:
- CLK: A1 SoC has four types on the board, namely PLL, Peripherals,
CPU, and Audio, but only Amlogic A1 PLL and Peripherals clock
controllers are currently supported.
- EFUSE: consists of a 4k bit One Time Programmable (OTP) memory
divided into 32 128-bit blocks, and data is accessed using the APB
bus through software or the Key-ladder integrated with the EFUSE
block.
- USB: only one USB 2.0 high-speed port is available in the A1 SoC,
supporting both HOST and DEVICE modes for OTG.
- SPI Flash Controller: 4-bit QPI/SPI NOR Flash or NAND FLASH
controller.
- SDIO: for WiFi/IEEE802.11 connection.
- UART_AO: for Bluetooth connection.
Alexey Romanov (1):
arm64: dts: meson: a1: enable efuse controller and setup its clk
Dmitry Rokosov (2):
arm64: dts: meson: a1: introduce PLL and Peripherals clk controllers
arm64: dts: meson: a1: support USB controller in OTG mode
Jan Dakinevich (1):
arm64: dts: meson: a1: add eMMC controller and its pins
Martin Kurbanov (1):
arm64: dts: meson: a1: introduce SPI Flash Controller
Oleg Lyovin (1):
arm64: dts: meson: a1: introduce UART_AO mux definitions
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 164 ++++++++++++++++++++++
1 file changed, 164 insertions(+)
--
2.36.0
Hello Neil, Krzysztof, Jerome, Martin, Rob and Conor,
Would you please review this patch? The latest modifications enable CLK,
EFUSE, USB, SDIO (WiFi), and UART (BT) functionality on A1 boards.
On Wed, Jun 07, 2023 at 11:16:35PM +0300, Dmitry Rokosov wrote:
> This patch series introduces device tree declarations for various
> peripheral IPs of the A1 SoC family, including clock controllers, EFUSE,
> USB, SPI Flash Controller, SDIO, and UART_AO:
> - CLK: A1 SoC has four types on the board, namely PLL, Peripherals,
> CPU, and Audio, but only Amlogic A1 PLL and Peripherals clock
> controllers are currently supported.
> - EFUSE: consists of a 4k bit One Time Programmable (OTP) memory
> divided into 32 128-bit blocks, and data is accessed using the APB
> bus through software or the Key-ladder integrated with the EFUSE
> block.
> - USB: only one USB 2.0 high-speed port is available in the A1 SoC,
> supporting both HOST and DEVICE modes for OTG.
> - SPI Flash Controller: 4-bit QPI/SPI NOR Flash or NAND FLASH
> controller.
> - SDIO: for WiFi/IEEE802.11 connection.
> - UART_AO: for Bluetooth connection.
>
> Alexey Romanov (1):
> arm64: dts: meson: a1: enable efuse controller and setup its clk
>
> Dmitry Rokosov (2):
> arm64: dts: meson: a1: introduce PLL and Peripherals clk controllers
> arm64: dts: meson: a1: support USB controller in OTG mode
>
> Jan Dakinevich (1):
> arm64: dts: meson: a1: add eMMC controller and its pins
>
> Martin Kurbanov (1):
> arm64: dts: meson: a1: introduce SPI Flash Controller
>
> Oleg Lyovin (1):
> arm64: dts: meson: a1: introduce UART_AO mux definitions
>
> arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 164 ++++++++++++++++++++++
> 1 file changed, 164 insertions(+)
>
> --
> 2.36.0
>
--
Thank you,
Dmitry
On 23/06/2023 10:22, Dmitry Rokosov wrote:
> Hello Neil, Krzysztof, Jerome, Martin, Rob and Conor,
>
> Would you please review this patch? The latest modifications enable CLK,
> EFUSE, USB, SDIO (WiFi), and UART (BT) functionality on A1 boards.
>
It's not a binding...
Best regards,
Krzysztof
Krzysztof,
On Fri, Jun 23, 2023 at 10:49:19AM +0200, Krzysztof Kozlowski wrote:
> On 23/06/2023 10:22, Dmitry Rokosov wrote:
> > Hello Neil, Krzysztof, Jerome, Martin, Rob and Conor,
> >
> > Would you please review this patch? The latest modifications enable CLK,
> > EFUSE, USB, SDIO (WiFi), and UART (BT) functionality on A1 boards.
> >
>
> It's not a binding...
>
> Best regards,
> Krzysztof
>
Ah, I was thinking that you could also review the changes made to the
device tree board files. I apologize for any inconvenience caused by
additional notifications.
--
Thank you,
Dmitry