This patch adds clkc and clkc_pll dts nodes to A1 SoC main dtsi.
The first one clk controller is responsible for all SoC peripherals
clocks excluding audio clocks. The second one clk controller is used by
A1 SoC PLLs. Actually, there are two different APB heads, so we have two
different drivers.
Signed-off-by: Dmitry Rokosov <[email protected]>
---
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 26 +++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
index eed96f262844..a24228808c9c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
@@ -6,6 +6,8 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/meson-a1-gpio.h>
+#include <dt-bindings/clock/amlogic,a1-pll-clkc.h>
+#include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h>
/ {
compatible = "amlogic,a1";
@@ -126,6 +128,30 @@ uart_AO_B: serial@2000 {
status = "disabled";
};
+ clkc_periphs: clock-controller@800 {
+ compatible = "amlogic,a1-peripherals-clkc";
+ reg = <0 0x800 0 0x104>;
+ #clock-cells = <1>;
+ clocks = <&clkc_pll CLKID_FCLK_DIV2>,
+ <&clkc_pll CLKID_FCLK_DIV3>,
+ <&clkc_pll CLKID_FCLK_DIV5>,
+ <&clkc_pll CLKID_FCLK_DIV7>,
+ <&clkc_pll CLKID_HIFI_PLL>,
+ <&xtal>;
+ clock-names = "fclk_div2", "fclk_div3",
+ "fclk_div5", "fclk_div7",
+ "hifi_pll", "xtal";
+ };
+
+ clkc_pll: pll-clock-controller@7c80 {
+ compatible = "amlogic,a1-pll-clkc";
+ reg = <0 0x7c80 0 0x18c>;
+ #clock-cells = <1>;
+ clocks = <&clkc_periphs CLKID_FIXPLL_IN>,
+ <&clkc_periphs CLKID_HIFIPLL_IN>;
+ clock-names = "fixpll_in", "hifipll_in";
+ };
+
gpio_intc: interrupt-controller@0440 {
compatible = "amlogic,meson-a1-gpio-intc",
"amlogic,meson-gpio-intc";
--
2.36.0
On Wed, Jun 7, 2023 at 10:16 PM Dmitry Rokosov <[email protected]> wrote:
>
> This patch adds clkc and clkc_pll dts nodes to A1 SoC main dtsi.
> The first one clk controller is responsible for all SoC peripherals
> clocks excluding audio clocks. The second one clk controller is used by
> A1 SoC PLLs. Actually, there are two different APB heads, so we have two
> different drivers.
>
> Signed-off-by: Dmitry Rokosov <[email protected]>
> ---
> arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 26 +++++++++++++++++++++++
> 1 file changed, 26 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> index eed96f262844..a24228808c9c 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> @@ -6,6 +6,8 @@
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/gpio/meson-a1-gpio.h>
> +#include <dt-bindings/clock/amlogic,a1-pll-clkc.h>
> +#include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h>
>
> / {
> compatible = "amlogic,a1";
> @@ -126,6 +128,30 @@ uart_AO_B: serial@2000 {
> status = "disabled";
> };
>
> + clkc_periphs: clock-controller@800 {
please keep the entries sorted - so &clkc_periphs should come after
&periphs_pinctrl
> + compatible = "amlogic,a1-peripherals-clkc";
> + reg = <0 0x800 0 0x104>;
> + #clock-cells = <1>;
> + clocks = <&clkc_pll CLKID_FCLK_DIV2>,
> + <&clkc_pll CLKID_FCLK_DIV3>,
> + <&clkc_pll CLKID_FCLK_DIV5>,
> + <&clkc_pll CLKID_FCLK_DIV7>,
> + <&clkc_pll CLKID_HIFI_PLL>,
> + <&xtal>;
> + clock-names = "fclk_div2", "fclk_div3",
> + "fclk_div5", "fclk_div7",
> + "hifi_pll", "xtal";
> + };
[...]
> gpio_intc: interrupt-controller@0440 {
note to self: at some point we'll have to re-order &gpio_intc, but
that's out of scope for this patch
Best regards,
Martin
Hello Martin,
Thank you for the review!
On Sun, Jun 25, 2023 at 11:00:06PM +0200, Martin Blumenstingl wrote:
> On Wed, Jun 7, 2023 at 10:16 PM Dmitry Rokosov <[email protected]> wrote:
> >
> > This patch adds clkc and clkc_pll dts nodes to A1 SoC main dtsi.
> > The first one clk controller is responsible for all SoC peripherals
> > clocks excluding audio clocks. The second one clk controller is used by
> > A1 SoC PLLs. Actually, there are two different APB heads, so we have two
> > different drivers.
> >
> > Signed-off-by: Dmitry Rokosov <[email protected]>
> > ---
> > arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 26 +++++++++++++++++++++++
> > 1 file changed, 26 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> > index eed96f262844..a24228808c9c 100644
> > --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> > +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> > @@ -6,6 +6,8 @@
> > #include <dt-bindings/interrupt-controller/irq.h>
> > #include <dt-bindings/interrupt-controller/arm-gic.h>
> > #include <dt-bindings/gpio/meson-a1-gpio.h>
> > +#include <dt-bindings/clock/amlogic,a1-pll-clkc.h>
> > +#include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h>
> >
> > / {
> > compatible = "amlogic,a1";
> > @@ -126,6 +128,30 @@ uart_AO_B: serial@2000 {
> > status = "disabled";
> > };
> >
> > + clkc_periphs: clock-controller@800 {
> please keep the entries sorted - so &clkc_periphs should come after
> &periphs_pinctrl
>
Sure
> > + compatible = "amlogic,a1-peripherals-clkc";
> > + reg = <0 0x800 0 0x104>;
> > + #clock-cells = <1>;
> > + clocks = <&clkc_pll CLKID_FCLK_DIV2>,
> > + <&clkc_pll CLKID_FCLK_DIV3>,
> > + <&clkc_pll CLKID_FCLK_DIV5>,
> > + <&clkc_pll CLKID_FCLK_DIV7>,
> > + <&clkc_pll CLKID_HIFI_PLL>,
> > + <&xtal>;
> > + clock-names = "fclk_div2", "fclk_div3",
> > + "fclk_div5", "fclk_div7",
> > + "hifi_pll", "xtal";
> > + };
> [...]
>
> > gpio_intc: interrupt-controller@0440 {
> note to self: at some point we'll have to re-order &gpio_intc, but
> that's out of scope for this patch
I have noticed that the 'meson-a1.dtsi' file contains unsorted items. As
part of the current patch series, I can re-order them to improve the dt
structure.
--
Thank you,
Dmitry
On Wed, Jun 28, 2023 at 4:18 PM Dmitry Rokosov <[email protected]> wrote:
[...]
> >
> > > gpio_intc: interrupt-controller@0440 {
> > note to self: at some point we'll have to re-order &gpio_intc, but
> > that's out of scope for this patch
>
> I have noticed that the 'meson-a1.dtsi' file contains unsorted items. As
> part of the current patch series, I can re-order them to improve the dt
> structure.
That would be awesome!