2023-06-30 08:41:51

by Alexandre Ghiti

Subject: [PATCH v3 03/10] riscv: Make legacy counter enum match the HW numbering

RISCV_PMU_LEGACY_INSTRET used to be set to 1 whereas the offset of this
hardware counter from CSR_CYCLE is actually 2: make this offset match the
real hw offset so that we can directly expose those values to userspace.

Signed-off-by: Alexandre Ghiti <[email protected]>
---
drivers/perf/riscv_pmu_legacy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
index ca9e20bfc7ac..6a000abc28bb 100644
--- a/drivers/perf/riscv_pmu_legacy.c
+++ b/drivers/perf/riscv_pmu_legacy.c
@@ -13,7 +13,7 @@
#include <linux/platform_device.h>

#define RISCV_PMU_LEGACY_CYCLE 0
-#define RISCV_PMU_LEGACY_INSTRET 1
+#define RISCV_PMU_LEGACY_INSTRET 2

static bool pmu_init_done;

--
2.39.2

2023-06-30 10:53:45

by Andrew Jones

Subject: Re: [PATCH v3 03/10] riscv: Make legacy counter enum match the HW numbering

On Fri, Jun 30, 2023 at 10:30:06AM +0200, Alexandre Ghiti wrote:
> RISCV_PMU_LEGACY_INSTRET used to be set to 1 whereas the offset of this
> hardware counter from CSR_CYCLE is actually 2: make this offset match the
> real hw offset so that we can directly expose those values to userspace.
>
> Signed-off-by: Alexandre Ghiti <[email protected]>
> ---
> drivers/perf/riscv_pmu_legacy.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
> index ca9e20bfc7ac..6a000abc28bb 100644
> --- a/drivers/perf/riscv_pmu_legacy.c
> +++ b/drivers/perf/riscv_pmu_legacy.c
> @@ -13,7 +13,7 @@
> #include <linux/platform_device.h>
>
> #define RISCV_PMU_LEGACY_CYCLE 0
> -#define RISCV_PMU_LEGACY_INSTRET 1
> +#define RISCV_PMU_LEGACY_INSTRET 2
>
> static bool pmu_init_done;
>
> --
> 2.39.2
>

Reviewed-by: Andrew Jones <[email protected]>