On RISC-V, Coreboot does not support EFI booting, only supports
devicetree, and RISC-V does not have reserved address segments.
To support Coreboot on RISC-V platforms that require DMI
functionality, SMBIOS entry need to be passed through FFI.
Signed-off-by: Yunhui Cui <[email protected]>
---
arch/riscv/kernel/ffi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/riscv/kernel/ffi.c b/arch/riscv/kernel/ffi.c
index 147d06a5acff..b959d16fe0b3 100644
--- a/arch/riscv/kernel/ffi.c
+++ b/arch/riscv/kernel/ffi.c
@@ -8,6 +8,7 @@
#include <linux/of.h>
#include <linux/of_fdt.h>
#include <linux/libfdt.h>
+#include <linux/ffi.h>
static u64 acpi_rsdp;
@@ -35,4 +36,5 @@ u64 __init riscv_acpi_rsdp(void)
void __init ffi_init(void)
{
ffi_acpi_root_pointer();
+ ffi_smbios_root_pointer();
}
--
2.20.1