2023-07-10 10:43:56

by Jayesh Choudhary

[permalink] [raw]
Subject: [PATCH v5 0/5] Add peripherals for J784S4

This series adds support for:
- SERDES, WIZ DT nodes, Serdes lane control mux
- MAIN CPSW2G nodes
- DSS and DisplayPort-0 nodes

Changelog v4->v5:
- rebased the patches on linux-next tip.

Changelog v3->v4:
- add reg property to serdes_ln_ctrl and fix the node name again to
get rid of dtbs_check error.
- reorder reg, reg-names and ranges property for main_cpsw1.
- correct the order for clocks in serdes_wiz nodes to fix dtbs_check
warnings.
- fix indentation in reg, reg-names and clock property for dss node.
- add comments for the reg type in dss registers.

Changelog v3->v2:
- fix dtc warnings for 'scm_conf' and 'serdes_ln_ctrl' nodes
(Checked all the changes of the series with W=12 option during build)
- added clock-frequency for serdes_refclk along with other EVM changes
This refclk is being used by all the instances of serdes_wiz which
are disabled by default. So configuring refclk when the serdes nodes
are used for the first time is okay.

Changelog v1->v2:
- Moved J784S4 EVM changes together to the last patch
(Suggested by Andrew)

v4 patch link:
<https://lore.kernel.org/all/[email protected]/>

Rahul T R (2):
arm64: dts: ti: k3-j784s4-main: Add DSS and DP-bridge node
arm64: dts: ti: k3-j784s4-evm: Enable DisplayPort-0

Siddharth Vadapalli (3):
arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane
mux
arm64: dts: ti: k3-j784s4: Add Main CPSW2G node
arm64: dts: ti: k3-j784s4: Add WIZ and SERDES PHY nodes

arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 164 ++++++++++
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 335 +++++++++++++++++++++
2 files changed, 499 insertions(+)

--
2.25.1



2023-07-10 10:53:10

by Jayesh Choudhary

[permalink] [raw]
Subject: [PATCH v5 5/5] arm64: dts: ti: k3-j784s4-evm: Enable DisplayPort-0

From: Rahul T R <[email protected]>

Enable display for J784S4 EVM.

Add assigned clocks for DSS, DT node for DisplayPort PHY and pinmux for
DP HPD. Add the clock frequency for serdes_refclk.

Add the endpoint nodes to describe connection from:
DSS => MHDP => DisplayPort connector.

Also add the GPIO expander-4 node and pinmux for main_i2c4 which is
required for controlling DP power. Set status for all required nodes
for DP-0 as "okay".

Signed-off-by: Rahul T R <[email protected]>
[[email protected]: move all the changes together to enable DP-0 in EVM]
Signed-off-by: Jayesh Choudhary <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 116 +++++++++++++++++++++++
1 file changed, 116 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
index 32a3c88cdda5..1678dfc5523b 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
@@ -249,6 +249,28 @@ vdd_sd_dv: regulator-TLV71033 {
states = <1800000 0x0>,
<3300000 0x1>;
};
+
+ dp0_pwr_3v3: regulator-dp0-prw {
+ compatible = "regulator-fixed";
+ regulator-name = "dp0-pwr";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&exp4 0 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ dp0: dp0-connector {
+ compatible = "dp-connector";
+ label = "DP0";
+ type = "full-size";
+ dp-pwr-supply = <&dp0_pwr_3v3>;
+
+ port {
+ dp0_connector_in: endpoint {
+ remote-endpoint = <&dp0_out>;
+ };
+ };
+ };
};

&main_pmx0 {
@@ -310,6 +332,19 @@ vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
J784S4_IOPAD(0x020, PIN_INPUT, 7) /* (AJ35) MCAN15_RX.GPIO0_8 */
>;
};
+
+ dp0_pins_default: dp0-pins-default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x0cc, PIN_INPUT, 12) /* (AM37) SPI0_CS0.DP0_HPD */
+ >;
+ };
+
+ main_i2c4_pins_default: main-i2c4-pins-default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AG33) MCAN14_TX.I2C4_SCL */
+ J784S4_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AH33) MCAN13_RX.I2C4_SDA */
+ >;
+ };
};

&wkup_pmx2 {
@@ -875,3 +910,84 @@ &main_cpsw1_port1 {
phy-mode = "rgmii-rxid";
phy-handle = <&main_phy0>;
};
+
+&serdes_refclk {
+ clock-frequency = <100000000>;
+};
+
+&dss {
+ status = "okay";
+ assigned-clocks = <&k3_clks 218 2>,
+ <&k3_clks 218 5>,
+ <&k3_clks 218 14>,
+ <&k3_clks 218 18>;
+ assigned-clock-parents = <&k3_clks 218 3>,
+ <&k3_clks 218 7>,
+ <&k3_clks 218 16>,
+ <&k3_clks 218 22>;
+};
+
+&serdes_wiz4 {
+ status = "okay";
+};
+
+&serdes4 {
+ status = "okay";
+ serdes4_dp_link: phy@0 {
+ reg = <0>;
+ cdns,num-lanes = <4>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_DP>;
+ resets = <&serdes_wiz4 1>, <&serdes_wiz4 2>,
+ <&serdes_wiz4 3>, <&serdes_wiz4 4>;
+ };
+};
+
+&mhdp {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&dp0_pins_default>;
+ phys = <&serdes4_dp_link>;
+ phy-names = "dpphy";
+};
+
+&dss_ports {
+ port {
+ dpi0_out: endpoint {
+ remote-endpoint = <&dp0_in>;
+ };
+ };
+};
+
+&main_i2c4 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c4_pins_default>;
+ clock-frequency = <400000>;
+
+ exp4: gpio@20 {
+ compatible = "ti,tca6408";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
+&dp0_ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dp0_in: endpoint {
+ remote-endpoint = <&dpi0_out>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ dp0_out: endpoint {
+ remote-endpoint = <&dp0_connector_in>;
+ };
+ };
+};
--
2.25.1


2023-07-10 10:59:22

by Jayesh Choudhary

[permalink] [raw]
Subject: [PATCH v5 1/5] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux

From: Siddharth Vadapalli <[email protected]>

The system controller node manages the CTRL_MMR0 region.
Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux.

Signed-off-by: Siddharth Vadapalli <[email protected]>
[[email protected]: Add reg property to fix dtc warning]
Signed-off-by: Jayesh Choudhary <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++
1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index 2ea0adae6832..68cc2fa053e7 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -5,6 +5,9 @@
* Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
*/

+#include <dt-bindings/mux/mux.h>
+#include <dt-bindings/mux/ti-serdes.h>
+
&cbass_main {
msmc_ram: sram@70000000 {
compatible = "mmio-sram";
@@ -26,6 +29,26 @@ l3cache-sram@200000 {
};
};

+ scm_conf: syscon@100000 {
+ compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
+ reg = <0x00 0x00100000 0x00 0x1c000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x00 0x00 0x00100000 0x1c000>;
+
+ serdes_ln_ctrl: mux-controller@4080 {
+ compatible = "mmio-mux";
+ reg = <0x00004080 0x30>;
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
+ <0x4088 0x3>, <0x408c 0x3>, /* SERDES0 lane2/3 select */
+ <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
+ <0x4098 0x3>, <0x409c 0x3>, /* SERDES1 lane2/3 select */
+ <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
+ <0x40a8 0x3>, <0x40ac 0x3>; /* SERDES2 lane2/3 select */
+ };
+ };
+
gic500: interrupt-controller@1800000 {
compatible = "arm,gic-v3";
#address-cells = <2>;
--
2.25.1


2023-07-10 12:14:44

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v5 1/5] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux

On 10/07/2023 12:17, Jayesh Choudhary wrote:
> From: Siddharth Vadapalli <[email protected]>
>
> The system controller node manages the CTRL_MMR0 region.
> Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux.
>
> Signed-off-by: Siddharth Vadapalli <[email protected]>
> [[email protected]: Add reg property to fix dtc warning]
> Signed-off-by: Jayesh Choudhary <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index 2ea0adae6832..68cc2fa053e7 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -5,6 +5,9 @@
> * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> */
>
> +#include <dt-bindings/mux/mux.h>
> +#include <dt-bindings/mux/ti-serdes.h>

Why? What do you use from that binding?

Best regards,
Krzysztof


2023-07-11 07:25:00

by Jayesh Choudhary

[permalink] [raw]
Subject: Re: [PATCH v5 1/5] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux



On 10/07/23 17:13, Krzysztof Kozlowski wrote:
> On 10/07/2023 12:17, Jayesh Choudhary wrote:
>> From: Siddharth Vadapalli <[email protected]>
>>
>> The system controller node manages the CTRL_MMR0 region.
>> Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux.
>>
>> Signed-off-by: Siddharth Vadapalli <[email protected]>
>> [[email protected]: Add reg property to fix dtc warning]
>> Signed-off-by: Jayesh Choudhary <[email protected]>
>> ---
>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++
>> 1 file changed, 23 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> index 2ea0adae6832..68cc2fa053e7 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> @@ -5,6 +5,9 @@
>> * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
>> */
>>
>> +#include <dt-bindings/mux/mux.h>
>> +#include <dt-bindings/mux/ti-serdes.h>
>
> Why? What do you use from that binding?
>

Missed idle-state in the mux-controller node here for default values.
I will wait for more feedback and then re-spin the series.

Thanks,
-Jayesh


2023-07-11 15:50:41

by Nishanth Menon

[permalink] [raw]
Subject: Re: [PATCH v5 1/5] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux

On 12:01-20230711, Jayesh Choudhary wrote:
>
>
> On 10/07/23 17:13, Krzysztof Kozlowski wrote:
> > On 10/07/2023 12:17, Jayesh Choudhary wrote:
> > > From: Siddharth Vadapalli <[email protected]>
> > >
> > > The system controller node manages the CTRL_MMR0 region.
> > > Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux.
> > >
> > > Signed-off-by: Siddharth Vadapalli <[email protected]>
> > > [[email protected]: Add reg property to fix dtc warning]
> > > Signed-off-by: Jayesh Choudhary <[email protected]>
> > > ---
> > > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++
> > > 1 file changed, 23 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> > > index 2ea0adae6832..68cc2fa053e7 100644
> > > --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> > > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> > > @@ -5,6 +5,9 @@
> > > * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> > > */
> > > +#include <dt-bindings/mux/mux.h>
> > > +#include <dt-bindings/mux/ti-serdes.h>
> >
> > Why? What do you use from that binding?
> >
>
> Missed idle-state in the mux-controller node here for default values.
> I will wait for more feedback and then re-spin the series.

btw, I am wondering if ti-serdes.h should even exist in dt-bindings -
are any of the macros used in the driver? or should this follow the
pinctrl style macros that could happily reside in arch/arm64/boot/dts/ti
?


--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D

2023-07-12 06:06:45

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v5 1/5] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux

On 11/07/2023 17:31, Nishanth Menon wrote:
> On 12:01-20230711, Jayesh Choudhary wrote:
>>
>>
>> On 10/07/23 17:13, Krzysztof Kozlowski wrote:
>>> On 10/07/2023 12:17, Jayesh Choudhary wrote:
>>>> From: Siddharth Vadapalli <[email protected]>
>>>>
>>>> The system controller node manages the CTRL_MMR0 region.
>>>> Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux.
>>>>
>>>> Signed-off-by: Siddharth Vadapalli <[email protected]>
>>>> [[email protected]: Add reg property to fix dtc warning]
>>>> Signed-off-by: Jayesh Choudhary <[email protected]>
>>>> ---
>>>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++
>>>> 1 file changed, 23 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>>> index 2ea0adae6832..68cc2fa053e7 100644
>>>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>>> @@ -5,6 +5,9 @@
>>>> * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
>>>> */
>>>> +#include <dt-bindings/mux/mux.h>
>>>> +#include <dt-bindings/mux/ti-serdes.h>
>>>
>>> Why? What do you use from that binding?
>>>
>>
>> Missed idle-state in the mux-controller node here for default values.
>> I will wait for more feedback and then re-spin the series.
>
> btw, I am wondering if ti-serdes.h should even exist in dt-bindings -
> are any of the macros used in the driver? or should this follow the
> pinctrl style macros that could happily reside in arch/arm64/boot/dts/ti
> ?

I don't see any usage in drivers, which is a clear indication that it
might not be suitable for bindings. What are these values? Look like
some register values, which there is little sense in making a binding.

Best regards,
Krzysztof


2023-07-12 11:33:18

by Roger Quadros

[permalink] [raw]
Subject: Re: [PATCH v5 1/5] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux



On 12/07/2023 08:44, Krzysztof Kozlowski wrote:
> On 11/07/2023 17:31, Nishanth Menon wrote:
>> On 12:01-20230711, Jayesh Choudhary wrote:
>>>
>>>
>>> On 10/07/23 17:13, Krzysztof Kozlowski wrote:
>>>> On 10/07/2023 12:17, Jayesh Choudhary wrote:
>>>>> From: Siddharth Vadapalli <[email protected]>
>>>>>
>>>>> The system controller node manages the CTRL_MMR0 region.
>>>>> Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux.
>>>>>
>>>>> Signed-off-by: Siddharth Vadapalli <[email protected]>
>>>>> [[email protected]: Add reg property to fix dtc warning]
>>>>> Signed-off-by: Jayesh Choudhary <[email protected]>
>>>>> ---
>>>>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++
>>>>> 1 file changed, 23 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>>>> index 2ea0adae6832..68cc2fa053e7 100644
>>>>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>>>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>>>> @@ -5,6 +5,9 @@
>>>>> * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
>>>>> */
>>>>> +#include <dt-bindings/mux/mux.h>
>>>>> +#include <dt-bindings/mux/ti-serdes.h>
>>>>
>>>> Why? What do you use from that binding?
>>>>
>>>
>>> Missed idle-state in the mux-controller node here for default values.
>>> I will wait for more feedback and then re-spin the series.
>>
>> btw, I am wondering if ti-serdes.h should even exist in dt-bindings -
>> are any of the macros used in the driver? or should this follow the
>> pinctrl style macros that could happily reside in arch/arm64/boot/dts/ti
>> ?
>
> I don't see any usage in drivers, which is a clear indication that it
> might not be suitable for bindings. What are these values? Look like
> some register values, which there is little sense in making a binding.
>
> Best regards,
> Krzysztof
>
>

You are right. They are constants not used in the driver directly.
mmio-mux driver uses it to set the idle state of the mux via the
'idle-states' property.

I agree with Nishanth that they should be moved to arch/arm64/boot/dts/ti

--
cheers,
-roger

2023-07-12 13:34:53

by Jayesh Choudhary

[permalink] [raw]
Subject: Re: [PATCH v5 1/5] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux



On 12/07/23 16:51, Roger Quadros wrote:
>
>
> On 12/07/2023 08:44, Krzysztof Kozlowski wrote:
>> On 11/07/2023 17:31, Nishanth Menon wrote:
>>> On 12:01-20230711, Jayesh Choudhary wrote:
>>>>
>>>>
>>>> On 10/07/23 17:13, Krzysztof Kozlowski wrote:
>>>>> On 10/07/2023 12:17, Jayesh Choudhary wrote:
>>>>>> From: Siddharth Vadapalli <[email protected]>
>>>>>>
>>>>>> The system controller node manages the CTRL_MMR0 region.
>>>>>> Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux.
>>>>>>
>>>>>> Signed-off-by: Siddharth Vadapalli <[email protected]>
>>>>>> [[email protected]: Add reg property to fix dtc warning]
>>>>>> Signed-off-by: Jayesh Choudhary <[email protected]>
>>>>>> ---
>>>>>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++
>>>>>> 1 file changed, 23 insertions(+)
>>>>>>
>>>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>>>>> index 2ea0adae6832..68cc2fa053e7 100644
>>>>>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>>>>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>>>>> @@ -5,6 +5,9 @@
>>>>>> * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
>>>>>> */
>>>>>> +#include <dt-bindings/mux/mux.h>
>>>>>> +#include <dt-bindings/mux/ti-serdes.h>
>>>>>
>>>>> Why? What do you use from that binding?
>>>>>
>>>>
>>>> Missed idle-state in the mux-controller node here for default values.
>>>> I will wait for more feedback and then re-spin the series.
>>>
>>> btw, I am wondering if ti-serdes.h should even exist in dt-bindings -
>>> are any of the macros used in the driver? or should this follow the
>>> pinctrl style macros that could happily reside in arch/arm64/boot/dts/ti
>>> ?
>>
>> I don't see any usage in drivers, which is a clear indication that it
>> might not be suitable for bindings. What are these values? Look like
>> some register values, which there is little sense in making a binding.
>>
>> Best regards,
>> Krzysztof
>>
>>
>
> You are right. They are constants not used in the driver directly.
> mmio-mux driver uses it to set the idle state of the mux via the
> 'idle-states' property.
>
> I agree with Nishanth that they should be moved to arch/arm64/boot/dts/ti
>

Then I will do the cleanup for all platforms and then post the dependent
series before spinning v6.

Thanks and Warm regards,
-Jayesh