2023-07-12 09:31:38

by Xingyu Wu

Subject: [PATCH v7 8/9] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks

Add DVP and HDMI TX pixel external fixed clocks and the rates are
74.25MHz and 297MHz.

Reviewed-by: Conor Dooley <[email protected]>
Signed-off-by: Xingyu Wu <[email protected]>
---
.../dts/starfive/jh7110-starfive-visionfive-2.dtsi | 8 ++++++++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 12 ++++++++++++
2 files changed, 20 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index fa0061eb33a7..de0f40a8be93 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -38,6 +38,10 @@ gpio-restart {
};
};

+&dvp_clk {
+ clock-frequency = <74250000>;
+};
+
&gmac0_rgmii_rxin {
clock-frequency = <125000000>;
};
@@ -54,6 +58,10 @@ &gmac1_rmii_refin {
clock-frequency = <50000000>;
};

+&hdmitx0_pixelclk {
+ clock-frequency = <297000000>;
+};
+
&i2srx_bclk_ext {
clock-frequency = <12288000>;
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index ec2e70011a73..e9c1e4ad71a2 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -197,6 +197,12 @@ opp-1500000000 {
};
};

+ dvp_clk: dvp-clock {
+ compatible = "fixed-clock";
+ clock-output-names = "dvp_clk";
+ #clock-cells = <0>;
+ };
+
gmac0_rgmii_rxin: gmac0-rgmii-rxin-clock {
compatible = "fixed-clock";
clock-output-names = "gmac0_rgmii_rxin";
@@ -221,6 +227,12 @@ gmac1_rmii_refin: gmac1-rmii-refin-clock {
#clock-cells = <0>;
};

+ hdmitx0_pixelclk: hdmitx0-pixel-clock {
+ compatible = "fixed-clock";
+ clock-output-names = "hdmitx0_pixelclk";
+ #clock-cells = <0>;
+ };
+
i2srx_bclk_ext: i2srx-bclk-ext-clock {
compatible = "fixed-clock";
clock-output-names = "i2srx_bclk_ext";
--
2.25.1

2023-07-12 18:35:30

by Emil Renner Berthing

Subject: Re: [PATCH v7 8/9] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks

On Wed, 12 Jul 2023 at 11:22, Xingyu Wu <[email protected]> wrote:
>
> Add DVP and HDMI TX pixel external fixed clocks and the rates are
> 74.25MHz and 297MHz.
>
> Reviewed-by: Conor Dooley <[email protected]>

Reviewed-by: Emil Renner Berthing <[email protected]>

> Signed-off-by: Xingyu Wu <[email protected]>
> ---
> .../dts/starfive/jh7110-starfive-visionfive-2.dtsi | 8 ++++++++
> arch/riscv/boot/dts/starfive/jh7110.dtsi | 12 ++++++++++++
> 2 files changed, 20 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> index fa0061eb33a7..de0f40a8be93 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> @@ -38,6 +38,10 @@ gpio-restart {
> };
> };
>
> +&dvp_clk {
> + clock-frequency = <74250000>;
> +};
> +
> &gmac0_rgmii_rxin {
> clock-frequency = <125000000>;
> };
> @@ -54,6 +58,10 @@ &gmac1_rmii_refin {
> clock-frequency = <50000000>;
> };
>
> +&hdmitx0_pixelclk {
> + clock-frequency = <297000000>;
> +};
> +
> &i2srx_bclk_ext {
> clock-frequency = <12288000>;
> };
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index ec2e70011a73..e9c1e4ad71a2 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -197,6 +197,12 @@ opp-1500000000 {
> };
> };
>
> + dvp_clk: dvp-clock {
> + compatible = "fixed-clock";
> + clock-output-names = "dvp_clk";
> + #clock-cells = <0>;
> + };
> +
> gmac0_rgmii_rxin: gmac0-rgmii-rxin-clock {
> compatible = "fixed-clock";
> clock-output-names = "gmac0_rgmii_rxin";
> @@ -221,6 +227,12 @@ gmac1_rmii_refin: gmac1-rmii-refin-clock {
> #clock-cells = <0>;
> };
>
> + hdmitx0_pixelclk: hdmitx0-pixel-clock {
> + compatible = "fixed-clock";
> + clock-output-names = "hdmitx0_pixelclk";
> + #clock-cells = <0>;
> + };
> +
> i2srx_bclk_ext: i2srx-bclk-ext-clock {
> compatible = "fixed-clock";
> clock-output-names = "i2srx_bclk_ext";
> --
> 2.25.1
>
>
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