2023-07-17 06:04:04

by Leo Yan

Subject: [PATCH v1 1/3] arm64: Add Cortex-X4 CPU part definitions

Add the part number and MIDR definitions for Cortex-X4.

Signed-off-by: Leo Yan <[email protected]>
---
arch/arm64/include/asm/cputype.h | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 5f6f84837a49..415be1a000c6 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -84,6 +84,7 @@
#define ARM_CPU_PART_CORTEX_X2 0xD48
#define ARM_CPU_PART_NEOVERSE_N2 0xD49
#define ARM_CPU_PART_CORTEX_A78C 0xD4B
+#define ARM_CPU_PART_CORTEX_X4 0xD82

#define APM_CPU_PART_POTENZA 0x000

@@ -153,6 +154,7 @@
#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
#define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
#define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C)
+#define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4)
#define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
--
2.34.1

2023-07-24 07:12:40

by Anshuman Khandual

Subject: Re: [PATCH v1 1/3] arm64: Add Cortex-X4 CPU part definitions

On 7/17/23 11:13, Leo Yan wrote:
> Add the part number and MIDR definitions for Cortex-X4.
>
> Signed-off-by: Leo Yan <[email protected]>

LGTM per https://developer.arm.com/documentation/102484/0001/AArch64-registers/AArch64-Identification-registers-summary/MIDR-EL1--Main-ID-Register

Reviewed-by: Anshuman Khandual <[email protected]>

> ---
> arch/arm64/include/asm/cputype.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
> index 5f6f84837a49..415be1a000c6 100644
> --- a/arch/arm64/include/asm/cputype.h
> +++ b/arch/arm64/include/asm/cputype.h
> @@ -84,6 +84,7 @@
> #define ARM_CPU_PART_CORTEX_X2 0xD48
> #define ARM_CPU_PART_NEOVERSE_N2 0xD49
> #define ARM_CPU_PART_CORTEX_A78C 0xD4B
> +#define ARM_CPU_PART_CORTEX_X4 0xD82
>
> #define APM_CPU_PART_POTENZA 0x000
>
> @@ -153,6 +154,7 @@
> #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
> #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
> #define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C)
> +#define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4)
> #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
> #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
> #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)

2023-07-24 07:17:11

by Anshuman Khandual

Subject: Re: [PATCH v1 1/3] arm64: Add Cortex-X4 CPU part definitions

On 7/17/23 11:13, Leo Yan wrote:
> Add the part number and MIDR definitions for Cortex-X4.
>
> Signed-off-by: Leo Yan <[email protected]>

LGTM per https://developer.arm.com/documentation/102484/0001/AArch64-registers/AArch64-Identification-registers-summary/MIDR-EL1--Main-ID-Register

Reviewed-by: Anshuman Khandual <[email protected]>

> ---
> arch/arm64/include/asm/cputype.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
> index 5f6f84837a49..415be1a000c6 100644
> --- a/arch/arm64/include/asm/cputype.h
> +++ b/arch/arm64/include/asm/cputype.h
> @@ -84,6 +84,7 @@
> #define ARM_CPU_PART_CORTEX_X2 0xD48
> #define ARM_CPU_PART_NEOVERSE_N2 0xD49
> #define ARM_CPU_PART_CORTEX_A78C 0xD4B
> +#define ARM_CPU_PART_CORTEX_X4 0xD82
>
> #define APM_CPU_PART_POTENZA 0x000
>
> @@ -153,6 +154,7 @@
> #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
> #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
> #define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C)
> +#define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4)
> #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
> #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
> #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)