Changes since v6/v7:
-------------------
- v6 can be viewed here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Konrad and Krzysztof had different suggestions on how to tackle
different SoCs inside the eud driver which require access to secure mode
manager register space. While Konrad's suggestion was to use a dt property,
other comments suggested using optional platform data for determining
the same. Modified [PATCH 2/4] accordingly to use the optional
platform data for now.
- Added Krzysztof's RB for [PATCH 1/4] and also addressed his review comments
received on v5.
- Dropped eud cleanup patches (which were sent a v7) as they have been accepted in linux-next.
- Rebased on latest linux-next/master.
Changes since v5:
----------------
- v5 can be viewed here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Addressed Mani's comment and added Fixes tag for [PATCH 1/6].
Also collected his Ack for this patch.
- Fixed [PATCH 4/6] as per Greg's comments and added a separate patch
for identation issues -> [PATCH 3/6].
Changes since v4:
----------------
- v4 can be viewed here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Addressed Konrad's review comments regarding EUD driver code.
- Also collected his R-B for [PATCH 4/5 and 5/5].
- Fixed the dt-bindings as per Krzysztof's comments.
Changes since v3:
----------------
- v3 can be viewed here: https://www.spinics.net/lists/linux-arm-msm/msg137025.html
- Addressed Konrad's review comments regarding mainly the driver code.
Also fixed the .dtsi as per his comments.
- Also collected his R-B for [PATCH 1/5].
Changes since v2:
----------------
- v2 can be viewed here: https://www.spinics.net/lists/linux-arm-msm/msg137025.html
- Addressed Bjorn and Krzysztof's comments.
- Added [PATCH 1/5] which fixes the 'qcom_eud' sysfs path.
- Added [PATCH 5/5] to enable EUD for Qualcomm QRB4210-RB2 boards.
Changes since v1:
----------------
- v1 can be viewed here: https://lore.kernel.org/linux-arm-msm/[email protected]
- Added Krzysztof in Cc list.
- Fixed the following issue reported by kernel test bot:
>> ERROR: modpost: "qcom_scm_io_writel" [drivers/usb/misc/qcom_eud.ko] undefined!
This series adds the dt-binding and driver support for SM6115 / SM4250
EUD (Embedded USB Debugger) block available on Qualcomm SoCs.
It also enables the same for QRB4210-RB2 boards by default (the user
still needs to enable the same via sysfs).
The EUD is a mini-USB hub implemented on chip to support the USB-based debug
and trace capabilities.
EUD driver listens to events like USB attach or detach and then
informs the USB about these events via ROLE-SWITCH.
Bhupesh Sharma (4):
dt-bindings: soc: qcom: eud: Add SM6115 / SM4250 support
usb: misc: eud: Add driver support for SM6115 / SM4250
arm64: dts: qcom: sm6115: Add EUD dt node and dwc3 connector
arm64: dts: qcom: qrb4210-rb2: Enable EUD debug peripheral
.../bindings/soc/qcom/qcom,eud.yaml | 42 ++++++++++++-
arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 27 +++++++-
arch/arm64/boot/dts/qcom/sm6115.dtsi | 50 +++++++++++++++
drivers/usb/misc/Kconfig | 2 +-
drivers/usb/misc/qcom_eud.c | 62 +++++++++++++++++--
5 files changed, 173 insertions(+), 10 deletions(-)
--
2.38.1
Add SM6115 / SM4250 SoC EUD support in qcom_eud driver.
On some SoCs (like the SM6115 / SM4250 SoC), the mode manager
needs to be accessed only via the secure world (through 'scm'
calls).
Also, the enable bit inside 'tcsr_check_reg' needs to be set
first to set the eud in 'enable' mode on these SoCs.
Signed-off-by: Bhupesh Sharma <[email protected]>
---
drivers/usb/misc/Kconfig | 2 +-
drivers/usb/misc/qcom_eud.c | 62 ++++++++++++++++++++++++++++++++++---
2 files changed, 58 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/misc/Kconfig b/drivers/usb/misc/Kconfig
index 99b15b77dfd57..51eb5140caa14 100644
--- a/drivers/usb/misc/Kconfig
+++ b/drivers/usb/misc/Kconfig
@@ -146,7 +146,7 @@ config USB_APPLEDISPLAY
config USB_QCOM_EUD
tristate "QCOM Embedded USB Debugger(EUD) Driver"
- depends on ARCH_QCOM || COMPILE_TEST
+ depends on (ARCH_QCOM && QCOM_SCM) || COMPILE_TEST
select USB_ROLE_SWITCH
help
This module enables support for Qualcomm Technologies, Inc.
diff --git a/drivers/usb/misc/qcom_eud.c b/drivers/usb/misc/qcom_eud.c
index 7f371ea1248c3..136cac90228a0 100644
--- a/drivers/usb/misc/qcom_eud.c
+++ b/drivers/usb/misc/qcom_eud.c
@@ -11,9 +11,11 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
+#include <linux/firmware/qcom/qcom_scm.h>
#include <linux/usb/role.h>
#define EUD_REG_INT1_EN_MASK 0x0024
@@ -30,15 +32,25 @@
#define EUD_INT_SAFE_MODE BIT(4)
#define EUD_INT_ALL (EUD_INT_VBUS | EUD_INT_SAFE_MODE)
+#define EUD_EN2_EN BIT(0)
+#define EUD_EN2_DISABLE (0)
+#define TCSR_CHECK_EN BIT(0)
+
+struct eud_soc_cfg {
+ u32 tcsr_check_offset;
+};
+
struct eud_chip {
struct device *dev;
struct usb_role_switch *role_sw;
+ const struct eud_soc_cfg *eud_cfg;
void __iomem *base;
void __iomem *mode_mgr;
unsigned int int_status;
int irq;
bool enabled;
bool usb_attached;
+ phys_addr_t secure_mode_mgr;
};
static int enable_eud(struct eud_chip *priv)
@@ -46,7 +58,11 @@ static int enable_eud(struct eud_chip *priv)
writel(EUD_ENABLE, priv->base + EUD_REG_CSR_EUD_EN);
writel(EUD_INT_VBUS | EUD_INT_SAFE_MODE,
priv->base + EUD_REG_INT1_EN_MASK);
- writel(1, priv->mode_mgr + EUD_REG_EUD_EN2);
+
+ if (priv->secure_mode_mgr)
+ qcom_scm_io_writel(priv->secure_mode_mgr + EUD_REG_EUD_EN2, EUD_EN2_EN);
+ else
+ writel(EUD_EN2_EN, priv->mode_mgr + EUD_REG_EUD_EN2);
return usb_role_switch_set_role(priv->role_sw, USB_ROLE_DEVICE);
}
@@ -54,7 +70,11 @@ static int enable_eud(struct eud_chip *priv)
static void disable_eud(struct eud_chip *priv)
{
writel(0, priv->base + EUD_REG_CSR_EUD_EN);
- writel(0, priv->mode_mgr + EUD_REG_EUD_EN2);
+
+ if (priv->secure_mode_mgr)
+ qcom_scm_io_writel(priv->secure_mode_mgr + EUD_REG_EUD_EN2, EUD_EN2_DISABLE);
+ else
+ writel(EUD_EN2_DISABLE, priv->mode_mgr + EUD_REG_EUD_EN2);
}
static ssize_t enable_show(struct device *dev,
@@ -178,6 +198,8 @@ static void eud_role_switch_release(void *data)
static int eud_probe(struct platform_device *pdev)
{
struct eud_chip *chip;
+ struct resource *res;
+ phys_addr_t tcsr_check;
int ret;
chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
@@ -200,9 +222,34 @@ static int eud_probe(struct platform_device *pdev)
if (IS_ERR(chip->base))
return PTR_ERR(chip->base);
- chip->mode_mgr = devm_platform_ioremap_resource(pdev, 1);
- if (IS_ERR(chip->mode_mgr))
- return PTR_ERR(chip->mode_mgr);
+ /*
+ * EUD block on a few Qualcomm SoCs needs secure register access.
+ * Check for the same via SoC specific config data.
+ */
+ chip->eud_cfg = of_device_get_match_data(&pdev->dev);
+ if (chip->eud_cfg) {
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (!res)
+ return dev_err_probe(chip->dev, -ENODEV,
+ "failed to get secure_mode_mgr reg base\n");
+
+ chip->secure_mode_mgr = res->start;
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tcsr-base");
+ if (!res)
+ return dev_err_probe(chip->dev, -ENODEV,
+ "failed to get tcsr reg base\n");
+
+ tcsr_check = res->start + chip->eud_cfg->tcsr_check_offset;
+
+ ret = qcom_scm_io_writel(tcsr_check, TCSR_CHECK_EN);
+ if (ret)
+ return dev_err_probe(chip->dev, ret, "failed to write tcsr check reg\n");
+ } else {
+ chip->mode_mgr = devm_platform_ioremap_resource(pdev, 1);
+ if (IS_ERR(chip->mode_mgr))
+ return PTR_ERR(chip->mode_mgr);
+ }
chip->irq = platform_get_irq(pdev, 0);
ret = devm_request_threaded_irq(&pdev->dev, chip->irq, handle_eud_irq,
@@ -228,8 +275,13 @@ static void eud_remove(struct platform_device *pdev)
disable_irq_wake(chip->irq);
}
+static const struct eud_soc_cfg sm6115_eud_cfg = {
+ .tcsr_check_offset = 0x25018,
+};
+
static const struct of_device_id eud_dt_match[] = {
{ .compatible = "qcom,sc7280-eud" },
+ { .compatible = "qcom,sm6115-eud", .data = &sm6115_eud_cfg },
{ }
};
MODULE_DEVICE_TABLE(of, eud_dt_match);
--
2.38.1
Add dt-bindings for EUD found on Qualcomm SM6115 / SM4250 SoC.
On this SoC (and derivatives) the enable bit inside 'tcsr_check_reg'
needs to be set first to 'enable' the eud module.
So, update the dt-bindings to accommodate the third register
property (TCSR Base) required by the driver on these SoCs.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
---
.../bindings/soc/qcom/qcom,eud.yaml | 42 +++++++++++++++++--
1 file changed, 39 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml
index f2c5ec7e6437b..71274bc978584 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml
@@ -18,12 +18,16 @@ properties:
items:
- enum:
- qcom,sc7280-eud
+ - qcom,sm6115-eud
- const: qcom,eud
reg:
- items:
- - description: EUD Base Register Region
- - description: EUD Mode Manager Register
+ minItems: 2
+ maxItems: 3
+
+ reg-names:
+ minItems: 2
+ maxItems: 3
interrupts:
description: EUD interrupt
@@ -50,6 +54,38 @@ required:
- reg
- ports
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc7280-eud
+ then:
+ properties:
+ reg:
+ maxItems: 2
+ reg-names:
+ items:
+ - const: eud-base
+ - const: eud-mode-mgr
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sm6115-eud
+ then:
+ properties:
+ reg:
+ maxItems: 3
+ reg-names:
+ items:
+ - const: eud-base
+ - const: eud-mode-mgr
+ - const: tcsr-base
+
additionalProperties: false
examples:
--
2.38.1