Subject: [PATCH v9 3/4] arm: dts: qcom: sdx55: Add CPU PCIe interconnect path

Add cpu-pcie interconnect path to sdx65 platform.

Signed-off-by: Krishna chaitanya chundru <[email protected]>
---
arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
index df3cd9c..a7c0c26 100644
--- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
@@ -422,8 +422,9 @@
interrupt-names = "global",
"doorbell";

- interconnects = <&system_noc MASTER_PCIE &mc_virt SLAVE_EBI_CH0>;
- interconnect-names = "pcie-mem";
+ interconnects = <&system_noc MASTER_PCIE &mc_virt SLAVE_EBI_CH0>,
+ <&mem_noc MASTER_AMPSS_M0 &system_noc SLAVE_PCIE_0>;
+ interconnect-names = "pcie-mem", "cpu-pcie";

resets = <&gcc GCC_PCIE_BCR>;
reset-names = "core";
--
2.7.4



2023-07-19 05:05:53

by Manivannan Sadhasivam

[permalink] [raw]
Subject: Re: [PATCH v9 3/4] arm: dts: qcom: sdx55: Add CPU PCIe interconnect path

On Tue, Jul 18, 2023 at 08:50:44PM +0530, Krishna chaitanya chundru wrote:
> Add cpu-pcie interconnect path to sdx65 platform.

sdx55 and please mention "PCIe RC". Perhaps you should also add "missing"?

- Mani

>
> Signed-off-by: Krishna chaitanya chundru <[email protected]>
> ---
> arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
> index df3cd9c..a7c0c26 100644
> --- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
> +++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
> @@ -422,8 +422,9 @@
> interrupt-names = "global",
> "doorbell";
>
> - interconnects = <&system_noc MASTER_PCIE &mc_virt SLAVE_EBI_CH0>;
> - interconnect-names = "pcie-mem";
> + interconnects = <&system_noc MASTER_PCIE &mc_virt SLAVE_EBI_CH0>,
> + <&mem_noc MASTER_AMPSS_M0 &system_noc SLAVE_PCIE_0>;
> + interconnect-names = "pcie-mem", "cpu-pcie";
>
> resets = <&gcc GCC_PCIE_BCR>;
> reset-names = "core";
> --
> 2.7.4
>

--
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Subject: Re: [PATCH v9 3/4] arm: dts: qcom: sdx55: Add CPU PCIe interconnect path


On 7/19/2023 10:11 AM, Manivannan Sadhasivam wrote:
> On Tue, Jul 18, 2023 at 08:50:44PM +0530, Krishna chaitanya chundru wrote:
>> Add cpu-pcie interconnect path to sdx65 platform.
> sdx55 and please mention "PCIe RC". Perhaps you should also add "missing"?
>
> - Mani

I will reactify it.

for "PCIe RC" you mean "PCIe EP" as this endpoint node

-KC


>
>> Signed-off-by: Krishna chaitanya chundru <[email protected]>
>> ---
>> arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
>> index df3cd9c..a7c0c26 100644
>> --- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
>> +++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
>> @@ -422,8 +422,9 @@
>> interrupt-names = "global",
>> "doorbell";
>>
>> - interconnects = <&system_noc MASTER_PCIE &mc_virt SLAVE_EBI_CH0>;
>> - interconnect-names = "pcie-mem";
>> + interconnects = <&system_noc MASTER_PCIE &mc_virt SLAVE_EBI_CH0>,
>> + <&mem_noc MASTER_AMPSS_M0 &system_noc SLAVE_PCIE_0>;
>> + interconnect-names = "pcie-mem", "cpu-pcie";
>>
>> resets = <&gcc GCC_PCIE_BCR>;
>> reset-names = "core";
>> --
>> 2.7.4
>>

2023-07-19 07:01:42

by Manivannan Sadhasivam

[permalink] [raw]
Subject: Re: [PATCH v9 3/4] arm: dts: qcom: sdx55: Add CPU PCIe interconnect path

On Wed, Jul 19, 2023 at 12:03:11PM +0530, Krishna Chaitanya Chundru wrote:
>
> On 7/19/2023 10:11 AM, Manivannan Sadhasivam wrote:
> > On Tue, Jul 18, 2023 at 08:50:44PM +0530, Krishna chaitanya chundru wrote:
> > > Add cpu-pcie interconnect path to sdx65 platform.
> > sdx55 and please mention "PCIe RC". Perhaps you should also add "missing"?
> >
> > - Mani
>
> I will reactify it.
>
> for "PCIe RC" you mean "PCIe EP" as this endpoint node
>

Oops, yeah it is PCIe EP only.

- Mani

> -KC
>
>
> >
> > > Signed-off-by: Krishna chaitanya chundru <[email protected]>
> > > ---
> > > arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 5 +++--
> > > 1 file changed, 3 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
> > > index df3cd9c..a7c0c26 100644
> > > --- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
> > > +++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
> > > @@ -422,8 +422,9 @@
> > > interrupt-names = "global",
> > > "doorbell";
> > > - interconnects = <&system_noc MASTER_PCIE &mc_virt SLAVE_EBI_CH0>;
> > > - interconnect-names = "pcie-mem";
> > > + interconnects = <&system_noc MASTER_PCIE &mc_virt SLAVE_EBI_CH0>,
> > > + <&mem_noc MASTER_AMPSS_M0 &system_noc SLAVE_PCIE_0>;
> > > + interconnect-names = "pcie-mem", "cpu-pcie";
> > > resets = <&gcc GCC_PCIE_BCR>;
> > > reset-names = "core";
> > > --
> > > 2.7.4
> > >

--
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