Hi Conor,
These patches add dma and tdm nodes for the StarFive JH7110 SoC, they
are based on linux-next. I have tested them on the VisionFive2 board.
Thanks.
Best regards,
Walker
Walker Chen (2):
riscv: dts: starfive: jh7110: add dma controller node
riscv: dts: starfive: jh7110: add the node and pins configuration for
tdm
.../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++++++++++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 39 ++++++++++++++++++
2 files changed, 79 insertions(+)
--
2.17.1
Add the tdm controller node and pins configuration of tdm for the
StarFive JH7110 SoC.
Reviewed-by: Hal Feng <[email protected]>
Signed-off-by: Walker Chen <[email protected]>
---
.../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++++++++++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 ++++++++++
2 files changed, 61 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 5feff4673503..f49992097448 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -265,6 +265,40 @@
slew-rate = <0>;
};
};
+
+ tdm_pins: tdm-0 {
+ tx-pins {
+ pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
+ GPOEN_ENABLE,
+ GPI_NONE)>;
+ bias-pull-up;
+ drive-strength = <2>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+
+ rx-pins {
+ pinmux = <GPIOMUX(61, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_RXD)>;
+ input-enable;
+ };
+
+ sync-pins {
+ pinmux = <GPIOMUX(63, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_SYNC)>;
+ input-enable;
+ };
+
+ pcmclk-pins {
+ pinmux = <GPIOMUX(38, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_CLK)>;
+ input-enable;
+ };
+ };
};
&uart0 {
@@ -273,6 +307,12 @@
status = "okay";
};
+&tdm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&tdm_pins>;
+ status = "okay";
+};
+
&U74_1 {
cpu-supply = <&vdd_cpu>;
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 411a1bd4ddc9..d3973f5e315c 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -446,6 +446,27 @@
status = "disabled";
};
+ tdm: tdm@10090000 {
+ compatible = "starfive,jh7110-tdm";
+ reg = <0x0 0x10090000 0x0 0x1000>;
+ clocks = <&syscrg JH7110_SYSCLK_TDM_AHB>,
+ <&syscrg JH7110_SYSCLK_TDM_APB>,
+ <&syscrg JH7110_SYSCLK_TDM_INTERNAL>,
+ <&syscrg JH7110_SYSCLK_TDM_TDM>,
+ <&syscrg JH7110_SYSCLK_MCLK_INNER>,
+ <&tdm_ext>;
+ clock-names = "tdm_ahb", "tdm_apb",
+ "tdm_internal", "tdm",
+ "mclk_inner", "tdm_ext";
+ resets = <&syscrg JH7110_SYSRST_TDM_AHB>,
+ <&syscrg JH7110_SYSRST_TDM_APB>,
+ <&syscrg JH7110_SYSRST_TDM_CORE>;
+ dmas = <&dma 20>, <&dma 21>;
+ dma-names = "rx","tx";
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
stgcrg: clock-controller@10230000 {
compatible = "starfive,jh7110-stgcrg";
reg = <0x0 0x10230000 0x0 0x10000>;
--
2.17.1
Add the dma controller node for the Starfive JH7110 SoC.
Reviewed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Walker Chen <[email protected]>
---
arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 90aabeac7b51..411a1bd4ddc9 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -685,6 +685,24 @@
status = "disabled";
};
+ dma: dma-controller@16050000 {
+ compatible = "starfive,jh7110-axi-dma";
+ reg = <0x0 0x16050000 0x0 0x10000>;
+ clocks = <&stgcrg JH7110_STGCLK_DMA1P_AXI>,
+ <&stgcrg JH7110_STGCLK_DMA1P_AHB>;
+ clock-names = "core-clk", "cfgr-clk";
+ resets = <&stgcrg JH7110_STGRST_DMA1P_AXI>,
+ <&stgcrg JH7110_STGRST_DMA1P_AHB>;
+ interrupts = <73>;
+ #dma-cells = <1>;
+ dma-channels = <4>;
+ snps,dma-masters = <1>;
+ snps,data-width = <3>;
+ snps,block-size = <65536 65536 65536 65536>;
+ snps,priority = <0 1 2 3>;
+ snps,axi-max-burst-len = <16>;
+ };
+
aoncrg: clock-controller@17000000 {
compatible = "starfive,jh7110-aoncrg";
reg = <0x0 0x17000000 0x0 0x10000>;
--
2.17.1
From: Conor Dooley <[email protected]>
On Mon, 24 Jul 2023 14:51:56 +0800, Walker Chen wrote:
> These patches add dma and tdm nodes for the StarFive JH7110 SoC, they
> are based on linux-next. I have tested them on the VisionFive2 board.
> Thanks.
>
> Best regards,
> Walker
>
> [...]
Applied to riscv-dt-for-next, thanks!
[1/2] riscv: dts: starfive: jh7110: add dma controller node
https://git.kernel.org/conor/c/ac73c09716c3
[2/2] riscv: dts: starfive: jh7110: add the node and pins configuration for tdm
https://git.kernel.org/conor/c/e7c304c0346d
Thanks,
Conor.
On Wed, 26 Jul 2023 17:21:39 +0100, Conor Dooley wrote:
> From: Conor Dooley <[email protected]>
>
> On Mon, 24 Jul 2023 14:51:56 +0800, Walker Chen wrote:
>> These patches add dma and tdm nodes for the StarFive JH7110 SoC, they
>> are based on linux-next. I have tested them on the VisionFive2 board.
>> Thanks.
>>
>> Best regards,
>> Walker
>>
>> [...]
>
> Applied to riscv-dt-for-next, thanks!
>
> [1/2] riscv: dts: starfive: jh7110: add dma controller node
> https://git.kernel.org/conor/c/ac73c09716c3
> [2/2] riscv: dts: starfive: jh7110: add the node and pins configuration for tdm
> https://git.kernel.org/conor/c/e7c304c0346d
Hi, Conor,
You had deleted the `status = "okay";` of usb0 by mistake in this commit.
&usb0 {
dr_mode = "peripheral";
- status = "okay";
};
Could you please help fix it?
Best regards,
Hal