2023-07-25 06:22:53

by Kumar, Udit

Subject: [PATCH 1/2] arm64: dts: ti: k3-j784s4-main: Add DT node for UFS

This patch adds UFS support present in J784S4 SOC.

UFS is documentend in J784S4 TRM[1]
Section 12.3.7 'Universal Flash Storage (UFS) Interface'

[1] http://www.ti.com/lit/zip/spruj52

Cc: Chai Wenle <[email protected]>
Signed-off-by: Udit Kumar <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index 11f163e5cadf..f1db1ca5d6b1 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -1370,6 +1370,30 @@ main_spi7: spi@2170000 {
status = "disabled";
};

+ ufs_wrapper: ufs-wrapper@4e80000 {
+ compatible = "ti,j721e-ufs";
+ reg = <0x0 0x4e80000 0x0 0x100>;
+ power-domains = <&k3_pds 387 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 387 3>;
+ assigned-clocks = <&k3_clks 387 3>;
+ assigned-clock-parents = <&k3_clks 387 6>;
+ ranges;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ status = "disabled";
+
+ ufs@4e84000 {
+ compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
+ reg = <0x0 0x4e84000 0x0 0x10000>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ freq-table-hz = <250000000 250000000>, <19200000 19200000>,
+ <19200000 19200000>;
+ clocks = <&k3_clks 387 1>, <&k3_clks 387 3>, <&k3_clks 387 3>;
+ clock-names = "core_clk", "phy_clk", "ref_clk";
+ dma-coherent;
+ };
+ };
+
main_r5fss0: r5fss@5c00000 {
compatible = "ti,j721s2-r5fss";
ti,cluster-mode = <1>;
--
2.34.1

2023-07-25 10:55:09

by Vignesh Raghavendra

Subject: Re: [PATCH 1/2] arm64: dts: ti: k3-j784s4-main: Add DT node for UFS

Hi Udit

Minor nits inline:

On 25/07/23 11:08, Udit Kumar wrote:
> This patch adds UFS support present in J784S4 SOC.

"This patch" perhaps is redundant

>
> UFS is documentend in J784S4 TRM[1]

s/documentend/documented

> Section 12.3.7 'Universal Flash Storage (UFS) Interface'
>
> [1] http://www.ti.com/lit/zip/spruj52
>
> Cc: Chai Wenle <[email protected]>
> Signed-off-by: Udit Kumar <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index 11f163e5cadf..f1db1ca5d6b1 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -1370,6 +1370,30 @@ main_spi7: spi@2170000 {
> status = "disabled";
> };
>
> + ufs_wrapper: ufs-wrapper@4e80000 {
> + compatible = "ti,j721e-ufs";
> + reg = <0x0 0x4e80000 0x0 0x100>;

Inline with rest of the file please use 0x00

reg = <0x00 0x4e80000 0x00 0x100>;

> + power-domains = <&k3_pds 387 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 387 3>;
> + assigned-clocks = <&k3_clks 387 3>;
> + assigned-clock-parents = <&k3_clks 387 6>;
> + ranges;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + status = "disabled";
> +
> + ufs@4e84000 {
> + compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
> + reg = <0x0 0x4e84000 0x0 0x10000>;

Same here or perhaps use ranges in the parent node?

> + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> + freq-table-hz = <250000000 250000000>, <19200000 19200000>,
> + <19200000 19200000>;
> + clocks = <&k3_clks 387 1>, <&k3_clks 387 3>, <&k3_clks 387 3>;
> + clock-names = "core_clk", "phy_clk", "ref_clk";
> + dma-coherent;
> + };
> + };
> +
> main_r5fss0: r5fss@5c00000 {
> compatible = "ti,j721s2-r5fss";
> ti,cluster-mode = <1>;

--
Regards
Vignesh