Hello everyone,
This patch series got bigger than I expected. It cleans up the
next-c45-tja11xx driver and adds support for the TJA1120(1000BaseT1
automotive phy).
Master/slave custom implementation was replaced with the generic
implementation (genphy_c45_config_aneg/genphy_c45_read_status).
The TJA1120 and TJA1103 are a bit different when it comes to the PTP
interface. The timestamp read procedure was changed, some addresses were
changed and some bits were moved from one register to another. Adding
TJA1120 support was tricky, and I tried not to duplicate the code. If
something looks too hacky to you, I am open to suggestions.
Cheers,
Radu P
Changes in v5:
- replaced strncpy with strscpy
- reseted -> reset
Changes in v4:
- rebased on top of net-next/main
- dropped "net: phy: c45: detect 100BaseT1 and 1000BaseT1 PMA abilites".
Already part of upstream.
Changes in v3:
- merged "net: phy: nxp-c45-tja11xx: add *_reg_field functions" in
"net: phy: nxp-c45-tja11xx: prepare the ground for TJA1120"
- rephrased the commit message for "net: phy: nxp-c45-tja11xx: remove RX
BIST frame counters"
Changes in v2:
- dropped "net: phy: nxp-c45-tja11xx: fix the PTP interrupt
enablig/disabling"
- added error msgs to nxp_c45_set_reg_field and nxp_c45_clear_reg_field
- used phy_err instead of phy_warn in nxp_c45_write_reg_field and
nxp_c45_read_reg_field
- removed null checks for .driver_data and its fields
- added 100BT1 and 1000BT1 features bit
- replaced .features with .get_features
- dropped changed on TJA1103 EXT TS behaviour
- improved timestamp reading workarounds
- merged patch "net: phy: nxp-c45-tja11xx: timestamp reading workaround for
TJA1120" to 9 and 12
- implemented PCS reset workaround in link_change_notify callback
Radu Pirea (NXP OSS) (11):
net: phy: nxp-c45-tja11xx: use phylib master/slave implementation
net: phy: nxp-c45-tja11xx: remove RX BIST frame counters
net: phy: nxp-c45-tja11xx: prepare the ground for TJA1120
net: phy: nxp-c45-tja11xx: use get_features
net: phy: nxp-c45-tja11xx: add TJA1120 support
net: phy: nxp-c45-tja11xx: enable LTC sampling on both ext_ts edges
net: phy: nxp-c45-tja11xx: read egress ts on TJA1120
net: phy: nxp-c45-tja11xx: handle FUSA irq
net: phy: nxp-c45-tja11xx: run cable test with the PHY in test mode
net: phy: nxp-c45-tja11xx: read ext trig ts on TJA1120
net: phy: nxp-c45-tja11xx: reset PCS if the link goes down
drivers/net/phy/Kconfig | 2 +-
drivers/net/phy/nxp-c45-tja11xx.c | 1136 ++++++++++++++++++++++-------
2 files changed, 864 insertions(+), 274 deletions(-)
--
2.34.1
The external trigger configuration for TJA1120 has changed. The PHY
supports sampling of the LTC on rising and on falling edge.
Signed-off-by: Radu Pirea (NXP OSS) <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
---
drivers/net/phy/nxp-c45-tja11xx.c | 60 ++++++++++++++++++++++++++-----
1 file changed, 52 insertions(+), 8 deletions(-)
diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c
index dbfaf1e07ad5..8393c17a83cc 100644
--- a/drivers/net/phy/nxp-c45-tja11xx.c
+++ b/drivers/net/phy/nxp-c45-tja11xx.c
@@ -101,6 +101,10 @@
#define VEND1_PTP_CONFIG 0x1102
#define EXT_TRG_EDGE BIT(1)
+#define TJA1120_SYNC_TRIG_FILTER 0x1010
+#define PTP_TRIG_RISE_TS BIT(3)
+#define PTP_TRIG_FALLING_TS BIT(2)
+
#define CLK_RATE_ADJ_LD BIT(15)
#define CLK_RATE_ADJ_DIR BIT(14)
@@ -238,6 +242,7 @@ struct nxp_c45_phy_data {
const struct nxp_c45_phy_stats *stats;
int n_stats;
u8 ptp_clk_period;
+ bool ext_ts_both_edges;
void (*counters_enable)(struct phy_device *phydev);
void (*ptp_init)(struct phy_device *phydev);
void (*ptp_enable)(struct phy_device *phydev, bool enable);
@@ -684,9 +689,48 @@ static int nxp_c45_perout_enable(struct nxp_c45_phy *priv,
return 0;
}
+static void nxp_c45_set_rising_or_falling(struct phy_device *phydev,
+ struct ptp_extts_request *extts)
+{
+ if (extts->flags & PTP_RISING_EDGE)
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ VEND1_PTP_CONFIG, EXT_TRG_EDGE);
+
+ if (extts->flags & PTP_FALLING_EDGE)
+ phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
+ VEND1_PTP_CONFIG, EXT_TRG_EDGE);
+}
+
+static void nxp_c45_set_rising_and_falling(struct phy_device *phydev,
+ struct ptp_extts_request *extts)
+{
+ /* PTP_EXTTS_REQUEST may have only the PTP_ENABLE_FEATURE flag set. In
+ * this case external ts will be enabled on rising edge.
+ */
+ if (extts->flags & PTP_RISING_EDGE ||
+ extts->flags == PTP_ENABLE_FEATURE)
+ phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
+ TJA1120_SYNC_TRIG_FILTER,
+ PTP_TRIG_RISE_TS);
+ else
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ TJA1120_SYNC_TRIG_FILTER,
+ PTP_TRIG_RISE_TS);
+
+ if (extts->flags & PTP_FALLING_EDGE)
+ phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
+ TJA1120_SYNC_TRIG_FILTER,
+ PTP_TRIG_FALLING_TS);
+ else
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ TJA1120_SYNC_TRIG_FILTER,
+ PTP_TRIG_FALLING_TS);
+}
+
static int nxp_c45_extts_enable(struct nxp_c45_phy *priv,
struct ptp_extts_request *extts, int on)
{
+ const struct nxp_c45_phy_data *data = nxp_c45_get_data(priv->phydev);
int pin;
if (extts->flags & ~(PTP_ENABLE_FEATURE |
@@ -697,7 +741,8 @@ static int nxp_c45_extts_enable(struct nxp_c45_phy *priv,
/* Sampling on both edges is not supported */
if ((extts->flags & PTP_RISING_EDGE) &&
- (extts->flags & PTP_FALLING_EDGE))
+ (extts->flags & PTP_FALLING_EDGE) &&
+ !data->ext_ts_both_edges)
return -EOPNOTSUPP;
pin = ptp_find_pin(priv->ptp_clock, PTP_PF_EXTTS, extts->index);
@@ -711,13 +756,10 @@ static int nxp_c45_extts_enable(struct nxp_c45_phy *priv,
return 0;
}
- if (extts->flags & PTP_RISING_EDGE)
- phy_clear_bits_mmd(priv->phydev, MDIO_MMD_VEND1,
- VEND1_PTP_CONFIG, EXT_TRG_EDGE);
-
- if (extts->flags & PTP_FALLING_EDGE)
- phy_set_bits_mmd(priv->phydev, MDIO_MMD_VEND1,
- VEND1_PTP_CONFIG, EXT_TRG_EDGE);
+ if (data->ext_ts_both_edges)
+ nxp_c45_set_rising_and_falling(priv->phydev, extts);
+ else
+ nxp_c45_set_rising_or_falling(priv->phydev, extts);
nxp_c45_gpio_config(priv, pin, GPIO_EXTTS_OUT_CFG);
priv->extts = true;
@@ -1545,6 +1587,7 @@ static const struct nxp_c45_phy_data tja1103_phy_data = {
.stats = tja1103_hw_stats,
.n_stats = ARRAY_SIZE(tja1103_hw_stats),
.ptp_clk_period = PTP_CLK_PERIOD_100BT1,
+ .ext_ts_both_edges = false,
.counters_enable = tja1103_counters_enable,
.ptp_init = tja1103_ptp_init,
.ptp_enable = tja1103_ptp_enable,
@@ -1640,6 +1683,7 @@ static const struct nxp_c45_phy_data tja1120_phy_data = {
.stats = tja1120_hw_stats,
.n_stats = ARRAY_SIZE(tja1120_hw_stats),
.ptp_clk_period = PTP_CLK_PERIOD_1000BT1,
+ .ext_ts_both_edges = true,
.counters_enable = tja1120_counters_enable,
.ptp_init = tja1120_ptp_init,
.ptp_enable = tja1120_ptp_enable,
--
2.34.1
Hello:
This series was applied to netdev/net-next.git (main)
by Jakub Kicinski <[email protected]>:
On Mon, 31 Jul 2023 12:16:08 +0300 you wrote:
> Hello everyone,
>
> This patch series got bigger than I expected. It cleans up the
> next-c45-tja11xx driver and adds support for the TJA1120(1000BaseT1
> automotive phy).
>
> Master/slave custom implementation was replaced with the generic
> implementation (genphy_c45_config_aneg/genphy_c45_read_status).
>
> [...]
Here is the summary with links:
- [net-next,v5,01/11] net: phy: nxp-c45-tja11xx: use phylib master/slave implementation
https://git.kernel.org/netdev/net-next/c/ac0687e821cf
- [net-next,v5,02/11] net: phy: nxp-c45-tja11xx: remove RX BIST frame counters
https://git.kernel.org/netdev/net-next/c/643480a1a73d
- [net-next,v5,03/11] net: phy: nxp-c45-tja11xx: prepare the ground for TJA1120
https://git.kernel.org/netdev/net-next/c/6c0c85da044e
- [net-next,v5,04/11] net: phy: nxp-c45-tja11xx: use get_features
https://git.kernel.org/netdev/net-next/c/369da333569e
- [net-next,v5,05/11] net: phy: nxp-c45-tja11xx: add TJA1120 support
https://git.kernel.org/netdev/net-next/c/f1fe5dff2b8a
- [net-next,v5,06/11] net: phy: nxp-c45-tja11xx: enable LTC sampling on both ext_ts edges
https://git.kernel.org/netdev/net-next/c/b0b2247d815d
- [net-next,v5,07/11] net: phy: nxp-c45-tja11xx: read egress ts on TJA1120
https://git.kernel.org/netdev/net-next/c/bdb4c5b88520
- [net-next,v5,08/11] net: phy: nxp-c45-tja11xx: handle FUSA irq
https://git.kernel.org/netdev/net-next/c/425c8348df7b
- [net-next,v5,09/11] net: phy: nxp-c45-tja11xx: run cable test with the PHY in test mode
https://git.kernel.org/netdev/net-next/c/c552c110d479
- [net-next,v5,10/11] net: phy: nxp-c45-tja11xx: read ext trig ts on TJA1120
https://git.kernel.org/netdev/net-next/c/08e6547c8468
- [net-next,v5,11/11] net: phy: nxp-c45-tja11xx: reset PCS if the link goes down
https://git.kernel.org/netdev/net-next/c/68c6af72047c
You are awesome, thank you!
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