Hello all,
Similar to a couple previous series on this, we disable by default
nodes that cannot function standalone.
This helps prevent folks from forgetting to disable unused nodes
in their boards. One benefit of that is you can start out with
an almost empty DTS file for a new board and have it still
function without warnings or misbehaving hardware. Adding as you
go, this helps ease bringup and upstreaming of new boards.
Thanks,
Andrew
Changes for v3:
- Add enables for tqma64xxl (AM64 based)
Changes for v2:
- Added Reviewed-bys (thanks Dhruva)
- Removed "default pins" comments for GPIO
- Reworded message for 12/13 to make it more clear on dtsi files
Andrew Davis (13):
arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level
arm64: dts: ti: k3-j7200: Enable SDHCI nodes at the board level
arm64: dts: ti: k3-j721s2: Enable SDHCI nodes at the board level
arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level
arm64: dts: ti: k3-j721e: Enable OSPI nodes at the board level
arm64: dts: ti: k3-j7200: Enable OSPI nodes at the board level
arm64: dts: ti: k3-am64: Enable OSPI nodes at the board level
arm64: dts: ti: k3-j721e: Enable GPIO nodes at the board level
arm64: dts: ti: k3-j721s2: Enable GPIO nodes at the board level
arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level
arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level
arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level
arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 2 +
.../boot/dts/ti/k3-am64-phycore-som.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-am642-evm.dts | 1 +
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 5 +-
.../dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts | 1 +
.../arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi | 1 +
.../boot/dts/ti/k3-am65-iot2050-common.dtsi | 6 +-
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 4 ++
.../arm64/boot/dts/ti/k3-am654-base-board.dts | 3 +
.../boot/dts/ti/k3-am68-sk-base-board.dts | 24 +-------
.../dts/ti/k3-j7200-common-proc-board.dts | 19 ++----
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 6 ++
.../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 3 +
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 1 +
.../boot/dts/ti/k3-j721e-beagleboneai64.dts | 60 ++++---------------
.../dts/ti/k3-j721e-common-proc-board.dts | 42 ++++---------
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 11 ++++
.../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 6 ++
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 57 ++----------------
arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 1 +
.../dts/ti/k3-j721s2-common-proc-board.dts | 18 ++----
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 6 ++
.../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 2 +
23 files changed, 93 insertions(+), 187 deletions(-)
--
2.39.2
OSPI nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.
As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.
Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 10 ----------
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 2 ++
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 6 +-----
arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 1 +
4 files changed, 4 insertions(+), 15 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index 64eed76bbb7a3..0b89977351c98 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -580,16 +580,6 @@ &main_sdhci1 {
disable-wp;
};
-&ospi0 {
- /* Unused */
- status = "disabled";
-};
-
-&ospi1 {
- /* Unused */
- status = "disabled";
-};
-
&main_i2c0 {
status = "okay";
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index c1b6f8d7d1898..0c01bdd9656f1 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -378,6 +378,7 @@ ospi0: spi@47040000 {
power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
ospi1: spi@47050000 {
@@ -392,6 +393,7 @@ ospi1: spi@47050000 {
power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index bd1bd1b746056..4cd5346f2dd59 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -594,6 +594,7 @@ &main_sdhci1 {
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
@@ -657,11 +658,6 @@ partition@3fc0000 {
};
};
-&ospi1 {
- /* Unused */
- status = "disabled";
-};
-
&main_i2c0 {
status = "okay";
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
index e90e43202546e..928d3a8ad2d09 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
@@ -202,6 +202,7 @@ eeprom@50 {
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
--
2.39.2
OSPI nodes defined in the top-level AM64 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.
As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.
Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <[email protected]>
Reviewed-by: Dhruva Gole <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-am642-evm.dts | 1 +
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 1 +
arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi | 1 +
5 files changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 4e3e450e4e4c8..ed1b63b9c1c5f 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -794,6 +794,7 @@ ospi0: spi@fc40000 {
assigned-clock-parents = <&k3_clks 75 7>;
assigned-clock-rates = <166666666>;
power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
index 5606d775153d4..1c2c8f0daca9f 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
@@ -181,6 +181,7 @@ i2c_som_rtc: rtc@52 {
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index d84e7ee160328..b4a1f73d4fb17 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -520,6 +520,7 @@ &tscadc0 {
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 963d796a3a970..af06ccd466802 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -518,6 +518,7 @@ &tscadc0 {
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
index 5e9012107afab..6229849b5d968 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
@@ -180,6 +180,7 @@ &main_r5fss1_core1 {
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins>;
--
2.39.2
TSCADC nodes defined in the top-level AM65 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and/or
device information.
Disable the TSCADC nodes in the top-level dtsi files and only enable the
ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 5 +----
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 2 ++
arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 2 ++
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
index 6041862d5aa75..ba1c14a54acf4 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
@@ -582,11 +582,8 @@ &mcu_spi0 {
ti,pindir-d0-out-d1-in;
};
-&tscadc0 {
- status = "disabled";
-};
-
&tscadc1 {
+ status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5>;
};
diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
index 2c9c20a9d9179..4defde540fe0b 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
@@ -112,6 +112,7 @@ tscadc0: tscadc@40200000 {
dmas = <&mcu_udmap 0x7100>,
<&mcu_udmap 0x7101 >;
dma-names = "fifo0", "fifo1";
+ status = "disabled";
adc {
#io-channel-cells = <1>;
@@ -130,6 +131,7 @@ tscadc1: tscadc@40210000 {
dmas = <&mcu_udmap 0x7102>,
<&mcu_udmap 0x7103>;
dma-names = "fifo0", "fifo1";
+ status = "disabled";
adc {
#io-channel-cells = <1>;
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index aac243bacfeea..f5c26e9fba987 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -478,12 +478,14 @@ &usb0_phy {
};
&tscadc0 {
+ status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
};
&tscadc1 {
+ status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
--
2.39.2
GPIO nodes defined in the top-level J721s2 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.
Disable the GPIO nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <[email protected]>
Reviewed-by: Dhruva Gole <[email protected]>
---
.../boot/dts/ti/k3-am68-sk-base-board.dts | 18 ++----------------
.../dts/ti/k3-j721s2-common-proc-board.dts | 16 ++++------------
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 4 ++++
.../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 2 ++
4 files changed, 12 insertions(+), 28 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
index 5fd06cd26b479..5df5946687b34 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
@@ -382,31 +382,17 @@ J721S2_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (K26) WKUP_GPIO0_49 */
};
&main_gpio0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&rpi_header_gpio0_pins_default>;
};
-&main_gpio2 {
- status = "disabled";
-};
-
-&main_gpio4 {
- status = "disabled";
-};
-
-&main_gpio6 {
- status = "disabled";
-};
-
&wkup_gpio0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_rpi_header_gpio0_pins0_default>, <&mcu_rpi_header_gpio0_pins1_default>;
};
-&wkup_gpio1 {
- status = "disabled";
-};
-
&wkup_uart0 {
status = "reserved";
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index 7794063b77c8a..c6b85bbf9a179 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -299,20 +299,12 @@ J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */
};
};
-&main_gpio2 {
- status = "disabled";
-};
-
-&main_gpio4 {
- status = "disabled";
-};
-
-&main_gpio6 {
- status = "disabled";
+&main_gpio0 {
+ status = "okay";
};
-&wkup_gpio1 {
- status = "disabled";
+&wkup_gpio0 {
+ status = "okay";
};
&wkup_uart0 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 0e0092fa7b9fb..e60f7e18b07dd 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -579,6 +579,7 @@ main_gpio0: gpio@600000 {
power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 111 0>;
clock-names = "gpio";
+ status = "disabled";
};
main_gpio2: gpio@610000 {
@@ -595,6 +596,7 @@ main_gpio2: gpio@610000 {
power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 112 0>;
clock-names = "gpio";
+ status = "disabled";
};
main_gpio4: gpio@620000 {
@@ -611,6 +613,7 @@ main_gpio4: gpio@620000 {
power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 113 0>;
clock-names = "gpio";
+ status = "disabled";
};
main_gpio6: gpio@630000 {
@@ -627,6 +630,7 @@ main_gpio6: gpio@630000 {
power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 114 0>;
clock-names = "gpio";
+ status = "disabled";
};
main_i2c0: i2c@2000000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index 736ec5fa0ea28..3557f3338377d 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -323,6 +323,7 @@ wkup_gpio0: gpio@42110000 {
power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 115 0>;
clock-names = "gpio";
+ status = "disabled";
};
wkup_gpio1: gpio@42100000 {
@@ -339,6 +340,7 @@ wkup_gpio1: gpio@42100000 {
power-domains = <&k3_pds 116 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 116 0>;
clock-names = "gpio";
+ status = "disabled";
};
wkup_i2c0: i2c@42120000 {
--
2.39.2
SDHCI nodes defined in the top-level J721s2 SoC dtsi files are incomplete
and will not be functional unless they are extended.
As the attached SD/eMMC is only known about at the board integration level,
these nodes should only be enabled when provided with this information.
Disable the SDHCI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 6 +-----
arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts | 2 ++
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 2 ++
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
index e6e4133d1e9b9..5fd06cd26b479 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
@@ -475,13 +475,9 @@ exp2: gpio@20 {
};
};
-&main_sdhci0 {
- /* Unused */
- status = "disabled";
-};
-
&main_sdhci1 {
/* SD card */
+ status = "okay";
pinctrl-0 = <&main_mmc1_pins_default>;
pinctrl-names = "default";
disable-wp;
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index e81ef8a7a8a26..7794063b77c8a 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -366,6 +366,7 @@ exp2: gpio@22 {
&main_sdhci0 {
/* eMMC */
+ status = "okay";
non-removable;
ti,driver-strength-ohm = <50>;
disable-wp;
@@ -373,6 +374,7 @@ &main_sdhci0 {
&main_sdhci1 {
/* SD card */
+ status = "okay";
pinctrl-0 = <&main_mmc1_pins_default>;
pinctrl-names = "default";
disable-wp;
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index dc7920a352373..0e0092fa7b9fb 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -737,6 +737,7 @@ main_sdhci0: mmc@4f80000 {
mmc-hs200-1_8v;
mmc-hs400-1_8v;
dma-coherent;
+ status = "disabled";
};
main_sdhci1: mmc@4fb0000 {
@@ -766,6 +767,7 @@ main_sdhci1: mmc@4fb0000 {
dma-coherent;
/* Masking support for SDR104 capability */
sdhci-caps-mask = <0x00000003 0x00000000>;
+ status = "disabled";
};
main_navss: bus@30000000 {
--
2.39.2
SDHCI nodes defined in the top-level J7200 SoC dtsi files are incomplete
and will not be functional unless they are extended.
As the attached SD/eMMC is only known about at the board integration level,
these nodes should only be enabled when provided with this information.
Disable the SDHCI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 2 ++
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 92a5414911729..dee9056f56051 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -326,6 +326,7 @@ exp3: gpio@20 {
&main_sdhci0 {
/* eMMC */
+ status = "okay";
non-removable;
ti,driver-strength-ohm = <50>;
disable-wp;
@@ -333,6 +334,7 @@ &main_sdhci0 {
&main_sdhci1 {
/* SD card */
+ status = "okay";
pinctrl-0 = <&main_mmc1_pins_default>;
pinctrl-names = "default";
vmmc-supply = <&vdd_mmc1>;
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 6eaade5aeb423..5d7542ba41b93 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -654,6 +654,7 @@ main_sdhci0: mmc@4f80000 {
mmc-hs200-1_8v;
mmc-hs400-1_8v;
dma-coherent;
+ status = "disabled";
};
main_sdhci1: mmc@4fb0000 {
@@ -677,6 +678,7 @@ main_sdhci1: mmc@4fb0000 {
ti,clkbuf-sel = <0x7>;
ti,trm-icp = <0x8>;
dma-coherent;
+ status = "disabled";
};
serdes_wiz0: wiz@5060000 {
--
2.39.2
GPIO nodes defined in the top-level J7200 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.
Disable the GPIO nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <[email protected]>
---
.../boot/dts/ti/k3-j7200-common-proc-board.dts | 17 +++--------------
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 4 ++++
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 2 ++
3 files changed, 9 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index dee9056f56051..cee2b4b0eb87d 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -240,27 +240,16 @@ &main_uart3 {
pinctrl-0 = <&main_uart3_pins_default>;
};
-&main_gpio2 {
- status = "disabled";
-};
-
-&main_gpio4 {
- status = "disabled";
-};
-
-&main_gpio6 {
- status = "disabled";
+&main_gpio0 {
+ status = "okay";
};
&wkup_gpio0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&wkup_gpio_pins_default>;
};
-&wkup_gpio1 {
- status = "disabled";
-};
-
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 5d7542ba41b93..6a776f3bbcb19 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -832,6 +832,7 @@ main_gpio0: gpio@600000 {
power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 105 0>;
clock-names = "gpio";
+ status = "disabled";
};
main_gpio2: gpio@610000 {
@@ -849,6 +850,7 @@ main_gpio2: gpio@610000 {
power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 107 0>;
clock-names = "gpio";
+ status = "disabled";
};
main_gpio4: gpio@620000 {
@@ -866,6 +868,7 @@ main_gpio4: gpio@620000 {
power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 109 0>;
clock-names = "gpio";
+ status = "disabled";
};
main_gpio6: gpio@630000 {
@@ -883,6 +886,7 @@ main_gpio6: gpio@630000 {
power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 111 0>;
clock-names = "gpio";
+ status = "disabled";
};
main_spi0: spi@2100000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 571eb0e2eac92..5ae7320efad7b 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -297,6 +297,7 @@ wkup_gpio0: gpio@42110000 {
power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 113 0>;
clock-names = "gpio";
+ status = "disabled";
};
wkup_gpio1: gpio@42100000 {
@@ -313,6 +314,7 @@ wkup_gpio1: gpio@42100000 {
power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 114 0>;
clock-names = "gpio";
+ status = "disabled";
};
mcu_navss: bus@28380000 {
--
2.39.2
TSCADC nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and/or
device information.
Disable the TSCADC nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 2 ++
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 2 ++
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 2 ++
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 10 ----------
4 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index f06e7bda46f01..9f3a809ddf90b 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -747,6 +747,7 @@ &usb1 {
};
&tscadc0 {
+ status = "okay";
/* BBB Header: P9.39, P9.40, P9.37, P9.38, P9.33, P9.36, P9.35 */
adc {
ti,adc-channels = <0 1 2 3 4 5 6>;
@@ -754,6 +755,7 @@ adc {
};
&tscadc1 {
+ status = "okay";
/* MCU mikroBUS Header J10.1 - MCU_ADC1_AIN0 */
adc {
ti,adc-channels = <0>;
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 824874a7dcb95..fe5207ac7d85d 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -619,12 +619,14 @@ partition@3fe0000 {
};
&tscadc0 {
+ status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
};
&tscadc1 {
+ status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index 4d107eee9b341..37a8c80de3bc5 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -411,6 +411,7 @@ tscadc0: tscadc@40200000 {
dmas = <&main_udmap 0x7400>,
<&main_udmap 0x7401>;
dma-names = "fifo0", "fifo1";
+ status = "disabled";
adc {
#io-channel-cells = <1>;
@@ -430,6 +431,7 @@ tscadc1: tscadc@40210000 {
dmas = <&main_udmap 0x7402>,
<&main_udmap 0x7403>;
dma-names = "fifo0", "fifo1";
+ status = "disabled";
adc {
#io-channel-cells = <1>;
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index ed4994d264f26..4032601fd53fa 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -828,16 +828,6 @@ &usb1 {
phy-names = "cdns3,usb3-phy";
};
-&tscadc0 {
- /* Unused */
- status = "disabled";
-};
-
-&tscadc1 {
- /* Unused */
- status = "disabled";
-};
-
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
--
2.39.2
OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.
As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.
Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 2 ++
arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 1 +
3 files changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
index e26bd988e5224..6041862d5aa75 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
@@ -593,6 +593,7 @@ adc {
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
index 7b1f94a89eca8..2c9c20a9d9179 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
@@ -295,6 +295,7 @@ ospi0: spi@47040000 {
power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
ospi1: spi@47050000 {
@@ -309,6 +310,7 @@ ospi1: spi@47050000 {
power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index 734b051c97000..aac243bacfeea 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -530,6 +530,7 @@ &mcu_r5fss0_core1 {
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
--
2.39.2
SDHCI nodes defined in the top-level J721e SoC dtsi files are incomplete
and will not be functional unless they are extended.
As the attached SD/eMMC is only known about at the board integration level,
these nodes should only be enabled when provided with this information.
Disable the SDHCI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <[email protected]>
Reviewed-by: Dhruva Gole <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 7 ++-----
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 7 ++-----
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 3 +++
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 11 +----------
4 files changed, 8 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index 66aac145e7530..64eed76bbb7a3 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -563,6 +563,7 @@ &main_uart0 {
&main_sdhci0 {
/* eMMC */
+ status = "okay";
non-removable;
ti,driver-strength-ohm = <50>;
disable-wp;
@@ -570,6 +571,7 @@ &main_sdhci0 {
&main_sdhci1 {
/* SD Card */
+ status = "okay";
vmmc-supply = <&vdd_mmc1>;
vqmmc-supply = <&vdd_sd_dv_alt>;
pinctrl-names = "default";
@@ -578,11 +580,6 @@ &main_sdhci1 {
disable-wp;
};
-&main_sdhci2 {
- /* Unused */
- status = "disabled";
-};
-
&ospi0 {
/* Unused */
status = "disabled";
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index c1cbbae761827..e9b84d2c64b26 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -504,6 +504,7 @@ &wkup_gpio1 {
&main_sdhci0 {
/* eMMC */
+ status = "okay";
non-removable;
ti,driver-strength-ohm = <50>;
disable-wp;
@@ -511,6 +512,7 @@ &main_sdhci0 {
&main_sdhci1 {
/* SD/MMC */
+ status = "okay";
vmmc-supply = <&vdd_mmc1>;
vqmmc-supply = <&vdd_sd_dv_alt>;
pinctrl-names = "default";
@@ -519,11 +521,6 @@ &main_sdhci1 {
disable-wp;
};
-&main_sdhci2 {
- /* Unused */
- status = "disabled";
-};
-
&usb_serdes_mux {
idle-states = <1>, <0>; /* USB0 to SERDES3, USB1 to SERDES1 */
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 3acd55ffd4ffc..0ca31186b9b74 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -1478,6 +1478,7 @@ main_sdhci0: mmc@4f80000 {
ti,itap-del-sel-ddr52 = <0x3>;
ti,trm-icp = <0x8>;
dma-coherent;
+ status = "disabled";
};
main_sdhci1: mmc@4fb0000 {
@@ -1505,6 +1506,7 @@ main_sdhci1: mmc@4fb0000 {
ti,clkbuf-sel = <0x7>;
dma-coherent;
sdhci-caps-mask = <0x2 0x0>;
+ status = "disabled";
};
main_sdhci2: mmc@4f98000 {
@@ -1532,6 +1534,7 @@ main_sdhci2: mmc@4f98000 {
ti,clkbuf-sel = <0x7>;
dma-coherent;
sdhci-caps-mask = <0x2 0x0>;
+ status = "disabled";
};
usbss0: cdns-usb@4104000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index 0ee4f38ec8f03..bd1bd1b746056 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -582,13 +582,9 @@ &main_uart1 {
pinctrl-0 = <&main_uart1_pins_default>;
};
-&main_sdhci0 {
- /* Unused */
- status = "disabled";
-};
-
&main_sdhci1 {
/* SD Card */
+ status = "okay";
vmmc-supply = <&vdd_mmc1>;
vqmmc-supply = <&vdd_sd_dv_alt>;
pinctrl-names = "default";
@@ -597,11 +593,6 @@ &main_sdhci1 {
disable-wp;
};
-&main_sdhci2 {
- /* Unused */
- status = "disabled";
-};
-
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
--
2.39.2
Hi Andrew Davis,
On Wed, 9 Aug 2023 19:38:01 -0500, Andrew Davis wrote:
> Similar to a couple previous series on this, we disable by default
> nodes that cannot function standalone.
>
> This helps prevent folks from forgetting to disable unused nodes
> in their boards. One benefit of that is you can start out with
> an almost empty DTS file for a new board and have it still
> function without warnings or misbehaving hardware. Adding as you
> go, this helps ease bringup and upstreaming of new boards.
>
> [...]
Thank you for doing the cleanup.
I have applied the following to branch ti-k3-dts-next on [1].
Thank you!
[01/13] arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level
commit: 6fbd1310f99fc95d063b64d42addf701309663d6
[02/13] arm64: dts: ti: k3-j7200: Enable SDHCI nodes at the board level
commit: 013b7dd32c75ad3db218aa7a2d63f541304ac3b6
[03/13] arm64: dts: ti: k3-j721s2: Enable SDHCI nodes at the board level
commit: 5f715be31638b62de560acab7fdc7ff3d9e01bf9
[04/13] arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level
commit: 46d0c519e44bf31f45dd0a62654c75cae76215b8
[05/13] arm64: dts: ti: k3-j721e: Enable OSPI nodes at the board level
commit: 73676c480b7286cb528170de73a7c03e19a5ade2
[06/13] arm64: dts: ti: k3-j7200: Enable OSPI nodes at the board level
commit: 1a576c89168422b0658f7831d6e1bad63252eaea
[07/13] arm64: dts: ti: k3-am64: Enable OSPI nodes at the board level
commit: cd9f6b324277d324ae056ffd8dda6287bcb649ab
[08/13] arm64: dts: ti: k3-j721e: Enable GPIO nodes at the board level
commit: 8757108b59e1490062d3c6a55ceccbafbee50e35
[09/13] arm64: dts: ti: k3-j721s2: Enable GPIO nodes at the board level
commit: 578bf4d09ef5d6e6707682ef0ae9d954ef77b8fb
[10/13] arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level
commit: d9fe476d39f62719adb805fc8c5668a3e21570d0
[11/13] arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level
commit: a5a4cddad9ff71c55494328d0e39f051fe5905c2
[12/13] arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level
commit: 1228242df12ec1b7cd099c8e57a35940f32b89c3
[13/13] arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level
commit: bcd8a3f28ad6baec7f4d8cbb0fe7cbaf6e351567
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D