This patch series adds R5F and C7x dsp processor nodes for AM62A SoC.
The first patch amends the dsp node binding doc file and the remaining
patches configure the remote processor device nodes.
v1: https://lore.kernel.org/all/[email protected]/
Devarsh Thakkar (2):
arm64: dts: k3-am62a-wakeup: Add R5F device node
arm64: dts: ti: k3-am62a7-sk: Enable ipc with remote proc nodes
Hari Nagalla (2):
dt-bindings: remoteproc: k3-dsp: correct optional sram properties for
AM62A SoCs
arm64: dts: k3-am62a-mcu: Add R5F remote proc node
Jai Luthra (1):
arm64: dts: k3-am62a-main: Add C7xv device node
.../bindings/remoteproc/ti,k3-dsp-rproc.yaml | 16 ++++-
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 11 +++
arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 35 ++++++++++
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 23 +++++++
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 68 +++++++++++++++++++
5 files changed, 151 insertions(+), 2 deletions(-)
--
2.34.1
AM62A SoCs have a single R5F core in the MCU voltage domain. The MCU
domain also has a 512KB sram memory, the R5F core can use for
applications needing fast memory access.
Signed-off-by: Hari Nagalla <[email protected]>
---
Changes since v1:
- Divided the remote proc patch into separate per domain patch
arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 35 ++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
index a6d16a94088c..cce08a85ad3b 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
@@ -6,6 +6,17 @@
*/
&cbass_mcu {
+ mcu_ram: sram@79100000 {
+ compatible = "mmio-sram";
+ reg = <0x00 0x79100000 0x00 0x80000>;
+ ranges = <0x00 0x00 0x79100000 0x80000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mcu_sram1@0 {
+ reg = <0x0 0x80000>;
+ };
+ };
mcu_pmx0: pinctrl@4084000 {
compatible = "pinctrl-single";
reg = <0x00 0x04084000 0x00 0x88>;
@@ -167,4 +178,28 @@ mcu_mcan1: can@4e18000 {
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
status = "disabled";
};
+
+ mcu_r5fss0: r5fss@79000000 {
+ compatible = "ti,am62-r5fss";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x79000000 0x00 0x79000000 0x8000>,
+ <0x79020000 0x00 0x79020000 0x8000>;
+ power-domains = <&k3_pds 7 TI_SCI_PD_EXCLUSIVE>;
+ mcu_r5fss0_core0: r5f@79000000 {
+ compatible = "ti,am62-r5f";
+ reg = <0x79000000 0x00008000>,
+ <0x79020000 0x00008000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <9>;
+ ti,sci-proc-ids = <0x03 0xff>;
+ resets = <&k3_reset 9 1>;
+ firmware-name = "am62a-mcu-r5f0_0-fw";
+ ti,atcm-enable = <0>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <0>;
+ sram = <&mcu_ram>;
+ };
+ };
};
--
2.34.1
From: Devarsh Thakkar <[email protected]>
AM62A SoCs have a single R5F core in waekup domain. This core is also
used as a device manager for the SoC.
Signed-off-by: Devarsh Thakkar <[email protected]>
Signed-off-by: Hari Nagalla <[email protected]>
---
Changes since v1:
- Divided the remote proc patch into separate per domain patch
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 23 +++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
index 4e8279fa01e1..fd23d3de368f 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
@@ -63,6 +63,29 @@ wkup_rti0: watchdog@2b000000 {
status = "reserved";
};
+ wkup_r5fss0: r5fss@78000000 {
+ compatible = "ti,am62-r5fss";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x78000000 0x00 0x78000000 0x8000>,
+ <0x78100000 0x00 0x78100000 0x8000>;
+ power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
+ wkup_r5fss0_core0: r5f@78000000 {
+ compatible = "ti,am62-r5f";
+ reg = <0x78000000 0x00008000>,
+ <0x78100000 0x00008000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <121>;
+ ti,sci-proc-ids = <0x01 0xff>;
+ resets = <&k3_reset 121 1>;
+ firmware-name = "am62-wkup-r5f0_0-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+ };
+
wkup_vtm0: temperature-sensor@b00000 {
compatible = "ti,j7200-vtm";
reg = <0x00 0xb00000 0x00 0x400>,
--
2.34.1
On 19:58-20230809, Hari Nagalla wrote:
> This patch series adds R5F and C7x dsp processor nodes for AM62A SoC.
> The first patch amends the dsp node binding doc file and the remaining
> patches configure the remote processor device nodes.
>
> v1: https://lore.kernel.org/all/[email protected]/
>
> Devarsh Thakkar (2):
> arm64: dts: k3-am62a-wakeup: Add R5F device node
> arm64: dts: ti: k3-am62a7-sk: Enable ipc with remote proc nodes
>
> Hari Nagalla (2):
> dt-bindings: remoteproc: k3-dsp: correct optional sram properties for
> AM62A SoCs
> arm64: dts: k3-am62a-mcu: Add R5F remote proc node
>
> Jai Luthra (1):
> arm64: dts: k3-am62a-main: Add C7xv device node
please send the binding fix to the remoteproc maintainer, SoC TI
can pick the dts fixes in the next kernel rc1 rev.
>
> .../bindings/remoteproc/ti,k3-dsp-rproc.yaml | 16 ++++-
> arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 11 +++
> arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 35 ++++++++++
> arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 23 +++++++
> arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 68 +++++++++++++++++++
> 5 files changed, 151 insertions(+), 2 deletions(-)
>
> --
> 2.34.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
The C7xv-dsp on AM62A have 32KB L1 I-cache and a 64KB L1 D-cache. It
does not have an addressable l1dram . So, remove this optional sram
property from the bindings to fix device tree build warnings.
Also set the 'memory-regions' property as optional. This is because
the remote processors can function without carveout regions.
Signed-off-by: Hari Nagalla <[email protected]>
---
Changes since v1:
- Corrected dsp node binding doc file to fix yamllint warnings for am62a.
.../bindings/remoteproc/ti,k3-dsp-rproc.yaml | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
index f16e90380df1..8dd22c57e22d 100644
--- a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
@@ -111,7 +111,6 @@ else:
properties:
compatible:
enum:
- - ti,am62a-c7xv-dsp
- ti,j721e-c71-dsp
- ti,j721s2-c71-dsp
then:
@@ -124,6 +123,20 @@ else:
items:
- const: l2sram
- const: l1dram
+ else:
+ if:
+ properties:
+ compatible:
+ enum:
+ - ti,am62a-c7xv-dsp
+ then:
+ properties:
+ reg:
+ items:
+ - description: Address and Size of the L2 SRAM internal memory region
+ reg-names:
+ items:
+ - const: l2sram
required:
- compatible
@@ -135,7 +148,6 @@ required:
- resets
- firmware-name
- mboxes
- - memory-region
unevaluatedProperties: false
--
2.34.1
On Wed, Aug 09, 2023 at 07:58:46PM -0500, Hari Nagalla wrote:
> The C7xv-dsp on AM62A have 32KB L1 I-cache and a 64KB L1 D-cache. It
> does not have an addressable l1dram . So, remove this optional sram
> property from the bindings to fix device tree build warnings.
>
> Also set the 'memory-regions' property as optional. This is because
> the remote processors can function without carveout regions.
That seems like an unrelated change that deserves its own commit..
>
> Signed-off-by: Hari Nagalla <[email protected]>
> ---
> Changes since v1:
> - Corrected dsp node binding doc file to fix yamllint warnings for am62a.
>
> .../bindings/remoteproc/ti,k3-dsp-rproc.yaml | 16 ++++++++++++++--
> 1 file changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
> index f16e90380df1..8dd22c57e22d 100644
> --- a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
> +++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
> @@ -111,7 +111,6 @@ else:
> properties:
> compatible:
> enum:
> - - ti,am62a-c7xv-dsp
> - ti,j721e-c71-dsp
> - ti,j721s2-c71-dsp
> then:
> @@ -124,6 +123,20 @@ else:
> items:
> - const: l2sram
> - const: l1dram
> + else:
> + if:
> + properties:
> + compatible:
> + enum:
> + - ti,am62a-c7xv-dsp
> + then:
> + properties:
> + reg:
> + items:
> + - description: Address and Size of the L2 SRAM internal memory region
> + reg-names:
> + items:
> + - const: l2sram
>
> required:
> - compatible
> @@ -135,7 +148,6 @@ required:
> - resets
> - firmware-name
> - mboxes
> - - memory-region
>
> unevaluatedProperties: false
>
> --
> 2.34.1
>