2023-08-11 04:52:47

by Anshuman Khandual

Subject: [PATCH V3 3/3] Documentation: coresight: Add cc_threshold tunable

This updates config option to include 'cc_threshold' tunable value.

Cc: Suzuki K Poulose <[email protected]>
Cc: Mike Leach <[email protected]>
Cc: James Clark <[email protected]>
Cc: Jonathan Corbet <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Anshuman Khandual <[email protected]>
---
Documentation/trace/coresight/coresight.rst | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/Documentation/trace/coresight/coresight.rst b/Documentation/trace/coresight/coresight.rst
index 4a71ea6cb390..ce55adb80b82 100644
--- a/Documentation/trace/coresight/coresight.rst
+++ b/Documentation/trace/coresight/coresight.rst
@@ -624,6 +624,10 @@ They are also listed in the folder /sys/bus/event_source/devices/cs_etm/format/
* - timestamp
- Session local version of the system wide setting: :ref:`ETMv4_MODE_TIMESTAMP
<coresight-timestamp>`
+ * - cc_threshold
+ - Cycle count threshold value. If nothing is provided here or the provided value is 0, then the
+ default value i.e 0x100 will be used. If provided value is less than minimum cycles threshold
+ value, as indicated via TRCIDR3.CCITMIN, then the minimum value will be used instead.

How to use the STM module
-------------------------
--
2.25.1

2023-08-11 10:10:15

by Mike Leach

Subject: Re: [PATCH V3 3/3] Documentation: coresight: Add cc_threshold tunable

On Fri, 11 Aug 2023 at 04:46, Anshuman Khandual
<[email protected]> wrote:
>
> This updates config option to include 'cc_threshold' tunable value.
>
> Cc: Suzuki K Poulose <[email protected]>
> Cc: Mike Leach <[email protected]>
> Cc: James Clark <[email protected]>
> Cc: Jonathan Corbet <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Anshuman Khandual <[email protected]>
> ---
> Documentation/trace/coresight/coresight.rst | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/trace/coresight/coresight.rst b/Documentation/trace/coresight/coresight.rst
> index 4a71ea6cb390..ce55adb80b82 100644
> --- a/Documentation/trace/coresight/coresight.rst
> +++ b/Documentation/trace/coresight/coresight.rst
> @@ -624,6 +624,10 @@ They are also listed in the folder /sys/bus/event_source/devices/cs_etm/format/
> * - timestamp
> - Session local version of the system wide setting: :ref:`ETMv4_MODE_TIMESTAMP
> <coresight-timestamp>`
> + * - cc_threshold
> + - Cycle count threshold value. If nothing is provided here or the provided value is 0, then the
> + default value i.e 0x100 will be used. If provided value is less than minimum cycles threshold
> + value, as indicated via TRCIDR3.CCITMIN, then the minimum value will be used instead.
>
> How to use the STM module
> -------------------------
> --
> 2.25.1
>
Reviewed by: Mike Leach <[email protected]>
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK