Intel Alder Lake-P has the same pin layout as the Tiget Lake-LP
so add support for this to the existing Tiger Lake driver.
Signed-off-by: Alexander Ofitserov <[email protected]>
---
drivers/pinctrl/intel/pinctrl-tigerlake.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/intel/pinctrl-tigerlake.c b/drivers/pinctrl/intel/pinctrl-tigerlake.c
index bed769d99b8be0..3ddaeffc04150a 100644
--- a/drivers/pinctrl/intel/pinctrl-tigerlake.c
+++ b/drivers/pinctrl/intel/pinctrl-tigerlake.c
@@ -748,6 +748,7 @@ static const struct intel_pinctrl_soc_data tglh_soc_data = {
static const struct acpi_device_id tgl_pinctrl_acpi_match[] = {
{ "INT34C5", (kernel_ulong_t)&tgllp_soc_data },
{ "INT34C6", (kernel_ulong_t)&tglh_soc_data },
+ { "INTC1055", (kernel_ulong_t)&tgllp_soc_data },
{ }
};
MODULE_DEVICE_TABLE(acpi, tgl_pinctrl_acpi_match);
--
2.33.8
On Thu, Aug 10, 2023 at 02:59:38PM +0300, Alexander Ofitserov wrote:
> Intel Alder Lake-P has the same pin layout as the Tiget Lake-LP
> so add support for this to the existing Tiger Lake driver.
Isn't it the same as Alder Lake-N so this ID should be added to the
pinctrl-alderlake.c instead? Andy, do you know?
On Fri, Aug 11, 2023 at 08:07:28AM +0300, Mika Westerberg wrote:
> On Thu, Aug 10, 2023 at 02:59:38PM +0300, Alexander Ofitserov wrote:
> > Intel Alder Lake-P has the same pin layout as the Tiget Lake-LP
> > so add support for this to the existing Tiger Lake driver.
>
> Isn't it the same as Alder Lake-N so this ID should be added to the
> pinctrl-alderlake.c instead? Andy, do you know?
This is for v5.10 stable kernel. We need not to worry :-)
--
With Best Regards,
Andy Shevchenko