2023-08-16 14:01:54

by Vineet Gupta

[permalink] [raw]
Subject: [PATCH 19/20] ARCv2: entry: rearrange pt_regs slightly

Instead of r26,fp,sp,r12,r30 order as fp,r30,r12,r26,sp

- keeps SP at well known position (right abive hardware autosave)
- r26,r12 saved specifically for ARCv2 (and not in ARCv3) kept
closer for easy ifdef'ry later

Signed-off-by: Vineet Gupta <[email protected]>
---
arch/arc/include/asm/entry-arcv2.h | 12 ++++++------
arch/arc/include/asm/ptrace.h | 9 +++++----
arch/arc/kernel/asm-offsets.c | 7 ++++---
3 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/arch/arc/include/asm/entry-arcv2.h b/arch/arc/include/asm/entry-arcv2.h
index a030eae93d35..4d13320e0c1b 100644
--- a/arch/arc/include/asm/entry-arcv2.h
+++ b/arch/arc/include/asm/entry-arcv2.h
@@ -149,10 +149,10 @@
*/
.macro __SAVE_REGFILE_SOFT

- ST2 gp, fp, PT_r26 ; gp (r26), fp (r27)
-
- st r12, [sp, PT_r12]
+ st fp, [sp, PT_fp] ; r27
st r30, [sp, PT_r30]
+ st r12, [sp, PT_r12]
+ st r26, [sp, PT_r26] ; gp

; Saving pt_regs->sp correctly requires some extra work due to the way
; Auto stack switch works
@@ -187,10 +187,10 @@
/*------------------------------------------------------------------------*/
.macro __RESTORE_REGFILE_SOFT

- LD2 gp, fp, PT_r26 ; gp (r26), fp (r27)
-
- ld r12, [sp, PT_r12]
+ ld fp, [sp, PT_fp]
ld r30, [sp, PT_r30]
+ ld r12, [sp, PT_r12]
+ ld r26, [sp, PT_r26]

; Restore SP (into AUX_USER_SP) only if returning to U mode
; - for K mode, it will be implicitly restored as stack is unwound
diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h
index 2bf8ea96ea21..3a054b695f28 100644
--- a/arch/arc/include/asm/ptrace.h
+++ b/arch/arc/include/asm/ptrace.h
@@ -77,11 +77,10 @@ struct pt_regs {

unsigned long bta; /* erbta */

- unsigned long r26; /* gp */
unsigned long fp;
- unsigned long sp; /* user/kernel sp depending on where we came from */
-
- unsigned long r12, r30;
+ unsigned long r30;
+ unsigned long r12;
+ unsigned long r26; /* gp */

#ifdef CONFIG_ARC_HAS_ACCL_REGS
unsigned long r58, r59; /* ACCL/ACCH used by FPU / DSP MPY */
@@ -90,6 +89,8 @@ struct pt_regs {
unsigned long DSP_CTRL;
#endif

+ unsigned long sp; /* user/kernel sp depending on entry */
+
/*------- Below list auto saved by h/w -----------*/
unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;

diff --git a/arch/arc/kernel/asm-offsets.c b/arch/arc/kernel/asm-offsets.c
index e46688975868..478768c88f46 100644
--- a/arch/arc/kernel/asm-offsets.c
+++ b/arch/arc/kernel/asm-offsets.c
@@ -62,11 +62,9 @@ int main(void)
DEFINE(PT_r26, offsetof(struct pt_regs, r26));
DEFINE(PT_ret, offsetof(struct pt_regs, ret));
DEFINE(PT_blink, offsetof(struct pt_regs, blink));
+ OFFSET(PT_fp, pt_regs, fp);
DEFINE(PT_lpe, offsetof(struct pt_regs, lp_end));
DEFINE(PT_lpc, offsetof(struct pt_regs, lp_count));
- DEFINE(SZ_CALLEE_REGS, sizeof(struct callee_regs));
- DEFINE(SZ_PT_REGS, sizeof(struct pt_regs));
-
#ifdef CONFIG_ISA_ARCV2
OFFSET(PT_r12, pt_regs, r12);
OFFSET(PT_r30, pt_regs, r30);
@@ -79,5 +77,8 @@ int main(void)
OFFSET(PT_DSP_CTRL, pt_regs, DSP_CTRL);
#endif

+ DEFINE(SZ_CALLEE_REGS, sizeof(struct callee_regs));
+ DEFINE(SZ_PT_REGS, sizeof(struct pt_regs));
+
return 0;
}
--
2.34.1