The patchset is to upstream NXP downstream i.MX8 clk misc patches which
has been stayed in NXP LTS release for quite some time.
There are a few fixes, but should be fine to put in next tree.
---
Peng Fan (4):
clk: imx: imx8qm-rsrc: drop VPU_UART/VPUCORE
clk: imx8: remove MLB support
clk: imx: scu: ignore clks not owned by Cortex-A partition
clk: imx: imx8qm/qxp: add more resources to whitelist
Robert Chiras (1):
clk: imx: imx8qxp: Fix elcdif_pll clock
Shenwei Wang (1):
clk: imx: imx8qxp: correct the enet clocks for i.MX8DXL
Viorel Suman (1):
clk: imx: imx8dxl-rsrc: keep sorted in the ascending order
drivers/clk/imx/clk-imx8-acm.c | 6 +++---
drivers/clk/imx/clk-imx8dxl-rsrc.c | 3 +--
drivers/clk/imx/clk-imx8qm-rsrc.c | 5 ++---
drivers/clk/imx/clk-imx8qxp-lpcg.h | 1 -
drivers/clk/imx/clk-imx8qxp-rsrc.c | 4 +++-
drivers/clk/imx/clk-imx8qxp.c | 13 ++++++++++---
drivers/clk/imx/clk-scu.c | 20 ++++++++++++++++++++
7 files changed, 39 insertions(+), 13 deletions(-)
---
base-commit: cd04b2fab5ee58862674e9bab3cbc8e9a8576845
change-id: 20230912-imx8-clk-v1-d2089920a23a
Best regards,
--
Peng Fan <[email protected]>
From: Peng Fan <[email protected]>
Add CAN_1/2 support for i.MX8QM
Add M4_0, PI_0_PWM_0 and PI_0_I2C_0 for i.MX8QXP
Signed-off-by: Peng Fan <[email protected]>
---
drivers/clk/imx/clk-imx8qm-rsrc.c | 2 ++
drivers/clk/imx/clk-imx8qxp-rsrc.c | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/clk/imx/clk-imx8qm-rsrc.c b/drivers/clk/imx/clk-imx8qm-rsrc.c
index 634bc3058657..dadfdd9a4541 100644
--- a/drivers/clk/imx/clk-imx8qm-rsrc.c
+++ b/drivers/clk/imx/clk-imx8qm-rsrc.c
@@ -43,6 +43,8 @@ static const u32 imx8qm_clk_scu_rsrc_table[] = {
IMX_SC_R_FTM_0,
IMX_SC_R_FTM_1,
IMX_SC_R_CAN_0,
+ IMX_SC_R_CAN_1,
+ IMX_SC_R_CAN_2,
IMX_SC_R_GPU_0_PID0,
IMX_SC_R_GPU_1_PID0,
IMX_SC_R_PWM_0,
diff --git a/drivers/clk/imx/clk-imx8qxp-rsrc.c b/drivers/clk/imx/clk-imx8qxp-rsrc.c
index 29868e686921..585c425524a4 100644
--- a/drivers/clk/imx/clk-imx8qxp-rsrc.c
+++ b/drivers/clk/imx/clk-imx8qxp-rsrc.c
@@ -58,10 +58,13 @@ static const u32 imx8qxp_clk_scu_rsrc_table[] = {
IMX_SC_R_NAND,
IMX_SC_R_LVDS_0,
IMX_SC_R_LVDS_1,
+ IMX_SC_R_M4_0_UART,
IMX_SC_R_M4_0_I2C,
IMX_SC_R_ELCDIF_PLL,
IMX_SC_R_AUDIO_PLL_0,
IMX_SC_R_PI_0,
+ IMX_SC_R_PI_0_PWM_0,
+ IMX_SC_R_PI_0_I2C_0,
IMX_SC_R_PI_0_PLL,
IMX_SC_R_MIPI_0,
IMX_SC_R_MIPI_0_PWM_0,
--
2.37.1
From: Robert Chiras <[email protected]>
Move the elcdif_pll clock initialization before the lcd_clk, since the
elcdif_clk needs to be initialized ahead of lcd_clk, being its parent.
This change fixes issues with the LCD clocks during suspend/resume.
Fixes: babfaa9556d7 ("clk: imx: scu: add more scu clocks")
Suggested-by: Ranjani Vaidyanathan <[email protected]>
Acked-by: Laurentiu Palcu <[email protected]>
Signed-off-by: Robert Chiras <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
drivers/clk/imx/clk-imx8qxp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c
index cadcbb318f5c..4020aa4b79bf 100644
--- a/drivers/clk/imx/clk-imx8qxp.c
+++ b/drivers/clk/imx/clk-imx8qxp.c
@@ -147,10 +147,10 @@ static int imx8qxp_clk_probe(struct platform_device *pdev)
imx_clk_scu("adc0_clk", IMX_SC_R_ADC_0, IMX_SC_PM_CLK_PER);
imx_clk_scu("adc1_clk", IMX_SC_R_ADC_1, IMX_SC_PM_CLK_PER);
imx_clk_scu("pwm_clk", IMX_SC_R_LCD_0_PWM_0, IMX_SC_PM_CLK_PER);
+ imx_clk_scu("elcdif_pll", IMX_SC_R_ELCDIF_PLL, IMX_SC_PM_CLK_PLL);
imx_clk_scu2("lcd_clk", lcd_sels, ARRAY_SIZE(lcd_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_PER);
imx_clk_scu2("lcd_pxl_clk", lcd_pxl_sels, ARRAY_SIZE(lcd_pxl_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_MISC0);
imx_clk_scu("lcd_pxl_bypass_div_clk", IMX_SC_R_LCD_0, IMX_SC_PM_CLK_BYPASS);
- imx_clk_scu("elcdif_pll", IMX_SC_R_ELCDIF_PLL, IMX_SC_PM_CLK_PLL);
/* Audio SS */
imx_clk_scu("audio_pll0_clk", IMX_SC_R_AUDIO_PLL_0, IMX_SC_PM_CLK_PLL);
--
2.37.1
From: Peng Fan <[email protected]>
Not register clks that not owned to current partition.
CPU resources are specical resources, it is assigned in ATF, not
non-secure OS, but we still need to allow cpu freq, so return
true for non-secure OS for cpu resources.
Otherwise there will be error log if the resources are owned by current
partition:
[ 19.387291] cm40_i2c_div: failed to attached the power domain -2
[ 19.389305] cm40_lpuart_div: failed to attached the power domain -2
Signed-off-by: Peng Fan <[email protected]>
---
drivers/clk/imx/clk-scu.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/clk/imx/clk-scu.c b/drivers/clk/imx/clk-scu.c
index cd83c52e9952..be89180dd19c 100644
--- a/drivers/clk/imx/clk-scu.c
+++ b/drivers/clk/imx/clk-scu.c
@@ -10,10 +10,12 @@
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/of.h>
+#include <linux/firmware/imx/svc/rm.h>
#include <linux/platform_device.h>
#include <linux/pm_domain.h>
#include <linux/pm_runtime.h>
#include <linux/slab.h>
+#include <xen/xen.h>
#include "clk-scu.h"
@@ -670,6 +672,18 @@ static int imx_clk_scu_attach_pd(struct device *dev, u32 rsrc_id)
return of_genpd_add_device(&genpdspec, dev);
}
+static bool imx_clk_is_resource_owned(u32 rsrc)
+{
+ /*
+ * A-core resources are special. SCFW reports they are not "owned" by
+ * current partition but linux can still adjust them for cpufreq.
+ */
+ if (rsrc == IMX_SC_R_A53 || rsrc == IMX_SC_R_A72 || rsrc == IMX_SC_R_A35)
+ return true;
+
+ return imx_sc_rm_is_resource_owned(ccm_ipc_handle, rsrc);
+}
+
struct clk_hw *imx_clk_scu_alloc_dev(const char *name,
const char * const *parents,
int num_parents, u32 rsrc_id, u8 clk_type)
@@ -687,6 +701,9 @@ struct clk_hw *imx_clk_scu_alloc_dev(const char *name,
if (!imx_scu_clk_is_valid(rsrc_id))
return ERR_PTR(-EINVAL);
+ if (!imx_clk_is_resource_owned(rsrc_id))
+ return NULL;
+
pdev = platform_device_alloc(name, PLATFORM_DEVID_NONE);
if (!pdev) {
pr_err("%s: failed to allocate scu clk dev rsrc %d type %d\n",
@@ -869,6 +886,9 @@ struct clk_hw *__imx_clk_gpr_scu(const char *name, const char * const *parent_na
return ERR_PTR(-EINVAL);
}
+ if (!imx_clk_is_resource_owned(rsrc_id))
+ return NULL;
+
clk = kzalloc(sizeof(*clk), GFP_KERNEL);
if (!clk) {
kfree(clk_node);
--
2.37.1
From: Peng Fan <[email protected]>
MLB was de-featured, so drop MLB clk for i.MX8QM/QXP/DXL
Signed-off-by: Peng Fan <[email protected]>
---
drivers/clk/imx/clk-imx8-acm.c | 6 +++---
drivers/clk/imx/clk-imx8dxl-rsrc.c | 1 -
drivers/clk/imx/clk-imx8qm-rsrc.c | 1 -
drivers/clk/imx/clk-imx8qxp-lpcg.h | 1 -
drivers/clk/imx/clk-imx8qxp-rsrc.c | 1 -
5 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8-acm.c b/drivers/clk/imx/clk-imx8-acm.c
index 1e82f72b75c6..b96fdf5f84d0 100644
--- a/drivers/clk/imx/clk-imx8-acm.c
+++ b/drivers/clk/imx/clk-imx8-acm.c
@@ -77,7 +77,7 @@ struct imx8_acm_priv {
static const struct clk_parent_data imx8qm_aud_clk_sels[] = {
{ .fw_name = "aud_rec_clk0_lpcg_clk" },
{ .fw_name = "aud_rec_clk1_lpcg_clk" },
- { .fw_name = "mlb_clk" },
+ { .fw_name = "dummy" },
{ .fw_name = "hdmi_rx_mclk" },
{ .fw_name = "ext_aud_mclk0" },
{ .fw_name = "ext_aud_mclk1" },
@@ -103,7 +103,7 @@ static const struct clk_parent_data imx8qm_aud_clk_sels[] = {
static const struct clk_parent_data imx8qm_mclk_out_sels[] = {
{ .fw_name = "aud_rec_clk0_lpcg_clk" },
{ .fw_name = "aud_rec_clk1_lpcg_clk" },
- { .fw_name = "mlb_clk" },
+ { .fw_name = "dummy" },
{ .fw_name = "hdmi_rx_mclk" },
{ .fw_name = "spdif0_rx" },
{ .fw_name = "spdif1_rx" },
@@ -122,7 +122,7 @@ static const struct clk_parent_data imx8qm_asrc_mux_clk_sels[] = {
{ .fw_name = "sai4_rx_bclk" },
{ .fw_name = "sai5_tx_bclk" },
{ .index = -1 },
- { .fw_name = "mlb_clk" },
+ { .fw_name = "dummy" },
};
diff --git a/drivers/clk/imx/clk-imx8dxl-rsrc.c b/drivers/clk/imx/clk-imx8dxl-rsrc.c
index a36e821ba807..0f940335d83c 100644
--- a/drivers/clk/imx/clk-imx8dxl-rsrc.c
+++ b/drivers/clk/imx/clk-imx8dxl-rsrc.c
@@ -47,7 +47,6 @@ static u32 imx8dxl_clk_scu_rsrc_table[] = {
IMX_SC_R_SDHC_2,
IMX_SC_R_ENET_0,
IMX_SC_R_ENET_1,
- IMX_SC_R_MLB_0,
IMX_SC_R_USB_1,
IMX_SC_R_NAND,
IMX_SC_R_M4_0_UART,
diff --git a/drivers/clk/imx/clk-imx8qm-rsrc.c b/drivers/clk/imx/clk-imx8qm-rsrc.c
index 8412fa349569..634bc3058657 100644
--- a/drivers/clk/imx/clk-imx8qm-rsrc.c
+++ b/drivers/clk/imx/clk-imx8qm-rsrc.c
@@ -65,7 +65,6 @@ static const u32 imx8qm_clk_scu_rsrc_table[] = {
IMX_SC_R_SDHC_2,
IMX_SC_R_ENET_0,
IMX_SC_R_ENET_1,
- IMX_SC_R_MLB_0,
IMX_SC_R_USB_2,
IMX_SC_R_NAND,
IMX_SC_R_LVDS_0,
diff --git a/drivers/clk/imx/clk-imx8qxp-lpcg.h b/drivers/clk/imx/clk-imx8qxp-lpcg.h
index 2a37ce57c500..ebca8fa9268f 100644
--- a/drivers/clk/imx/clk-imx8qxp-lpcg.h
+++ b/drivers/clk/imx/clk-imx8qxp-lpcg.h
@@ -42,7 +42,6 @@
#define CONN_ENET_0_LPCG 0x30000
#define CONN_ENET_1_LPCG 0x40000
#define CONN_DTCP_LPCG 0x50000
-#define CONN_MLB_LPCG 0x60000
#define CONN_USB_2_LPCG 0x70000
#define CONN_USB_3_LPCG 0x80000
#define CONN_NAND_LPCG 0x90000
diff --git a/drivers/clk/imx/clk-imx8qxp-rsrc.c b/drivers/clk/imx/clk-imx8qxp-rsrc.c
index df09f2a7996d..29868e686921 100644
--- a/drivers/clk/imx/clk-imx8qxp-rsrc.c
+++ b/drivers/clk/imx/clk-imx8qxp-rsrc.c
@@ -54,7 +54,6 @@ static const u32 imx8qxp_clk_scu_rsrc_table[] = {
IMX_SC_R_SDHC_2,
IMX_SC_R_ENET_0,
IMX_SC_R_ENET_1,
- IMX_SC_R_MLB_0,
IMX_SC_R_USB_2,
IMX_SC_R_NAND,
IMX_SC_R_LVDS_0,
--
2.37.1
From: Peng Fan <[email protected]>
IMX_SC_R_VPU_UART and IMX_SC_R_VPUCORE was used in i.MX8QM A0 which
not for mass production. i.MX8QM B0 not have the two resources, so drop
it.
Signed-off-by: Peng Fan <[email protected]>
---
drivers/clk/imx/clk-imx8qm-rsrc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8qm-rsrc.c b/drivers/clk/imx/clk-imx8qm-rsrc.c
index 87e0b6ac027e..8412fa349569 100644
--- a/drivers/clk/imx/clk-imx8qm-rsrc.c
+++ b/drivers/clk/imx/clk-imx8qm-rsrc.c
@@ -79,8 +79,6 @@ static const u32 imx8qm_clk_scu_rsrc_table[] = {
IMX_SC_R_M4_0_I2C,
IMX_SC_R_M4_1_I2C,
IMX_SC_R_AUDIO_PLL_0,
- IMX_SC_R_VPU_UART,
- IMX_SC_R_VPUCORE,
IMX_SC_R_MIPI_0,
IMX_SC_R_MIPI_0_PWM_0,
IMX_SC_R_MIPI_0_I2C_0,
--
2.37.1
From: Shenwei Wang <[email protected]>
The SC_PM_CLK_MISC0 clock is not available for the resources of ENET0/1 on
i.MX8DXL. Using the clock device compatible string to identify the platform
and only initialize the enetX_rgmii_rx_clk clock for non i.MX8DXL platform.
Signed-off-by: Shenwei Wang <[email protected]>
Reviewed-by: Ranjani Vaidyanathan <[email protected]>
Reviewed-by: Jacky Bai <[email protected]>
Acked-by: Jason Liu <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
drivers/clk/imx/clk-imx8qxp.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c
index 4020aa4b79bf..41f0a45aa162 100644
--- a/drivers/clk/imx/clk-imx8qxp.c
+++ b/drivers/clk/imx/clk-imx8qxp.c
@@ -90,6 +90,11 @@ static const char * const pi_pll0_sels[] = {
"clk_dummy",
};
+static inline bool clk_on_imx8dxl(struct device_node *node)
+{
+ return of_device_is_compatible(node, "fsl,imx8dxl-clk");
+}
+
static int imx8qxp_clk_probe(struct platform_device *pdev)
{
struct device_node *ccm_node = pdev->dev.of_node;
@@ -169,13 +174,15 @@ static int imx8qxp_clk_probe(struct platform_device *pdev)
imx_clk_mux_gpr_scu("enet0_rgmii_txc_sel", enet0_rgmii_txc_sels, ARRAY_SIZE(enet0_rgmii_txc_sels), IMX_SC_R_ENET_0, IMX_SC_C_TXCLK);
imx_clk_scu("enet0_bypass_clk", IMX_SC_R_ENET_0, IMX_SC_PM_CLK_BYPASS);
imx_clk_gate_gpr_scu("enet0_ref_50_clk", "clk_dummy", IMX_SC_R_ENET_0, IMX_SC_C_DISABLE_50, true);
- imx_clk_scu("enet0_rgmii_rx_clk", IMX_SC_R_ENET_0, IMX_SC_PM_CLK_MISC0);
+ if (!clk_on_imx8dxl(ccm_node)) {
+ imx_clk_scu("enet0_rgmii_rx_clk", IMX_SC_R_ENET_0, IMX_SC_PM_CLK_MISC0);
+ imx_clk_scu("enet1_rgmii_rx_clk", IMX_SC_R_ENET_1, IMX_SC_PM_CLK_MISC0);
+ }
imx_clk_scu("enet1_root_clk", IMX_SC_R_ENET_1, IMX_SC_PM_CLK_PER);
imx_clk_divider_gpr_scu("enet1_ref_div", "enet1_root_clk", IMX_SC_R_ENET_1, IMX_SC_C_CLKDIV);
imx_clk_mux_gpr_scu("enet1_rgmii_txc_sel", enet1_rgmii_txc_sels, ARRAY_SIZE(enet1_rgmii_txc_sels), IMX_SC_R_ENET_1, IMX_SC_C_TXCLK);
imx_clk_scu("enet1_bypass_clk", IMX_SC_R_ENET_1, IMX_SC_PM_CLK_BYPASS);
imx_clk_gate_gpr_scu("enet1_ref_50_clk", "clk_dummy", IMX_SC_R_ENET_1, IMX_SC_C_DISABLE_50, true);
- imx_clk_scu("enet1_rgmii_rx_clk", IMX_SC_R_ENET_1, IMX_SC_PM_CLK_MISC0);
imx_clk_scu("gpmi_io_clk", IMX_SC_R_NAND, IMX_SC_PM_CLK_MST_BUS);
imx_clk_scu("gpmi_bch_clk", IMX_SC_R_NAND, IMX_SC_PM_CLK_PER);
imx_clk_scu("usb3_aclk_div", IMX_SC_R_USB_2, IMX_SC_PM_CLK_PER);
--
2.37.1
From: Viorel Suman <[email protected]>
Entries in imx8dxl_clk_scu_rsrc_table must be kept in the ascending
order, and IMX_SC_R_M4_0_UART < IMX_SC_R_M4_0_I2C.
Fixes: 036a4b4b4dfa ("clk: imx: Add imx8dxl clk driver")
Signed-off-by: Viorel Suman <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
drivers/clk/imx/clk-imx8dxl-rsrc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx8dxl-rsrc.c b/drivers/clk/imx/clk-imx8dxl-rsrc.c
index 69b7aa34fff5..a36e821ba807 100644
--- a/drivers/clk/imx/clk-imx8dxl-rsrc.c
+++ b/drivers/clk/imx/clk-imx8dxl-rsrc.c
@@ -50,8 +50,8 @@ static u32 imx8dxl_clk_scu_rsrc_table[] = {
IMX_SC_R_MLB_0,
IMX_SC_R_USB_1,
IMX_SC_R_NAND,
- IMX_SC_R_M4_0_I2C,
IMX_SC_R_M4_0_UART,
+ IMX_SC_R_M4_0_I2C,
IMX_SC_R_ELCDIF_PLL,
IMX_SC_R_AUDIO_PLL_0,
IMX_SC_R_AUDIO_PLL_1,
--
2.37.1
On 23-09-12 17:18:58, Peng Fan (OSS) wrote:
> The patchset is to upstream NXP downstream i.MX8 clk misc patches which
> has been stayed in NXP LTS release for quite some time.
>
> There are a few fixes, but should be fine to put in next tree.
>
Whole series LGTM.
Reviewed-by: Abel Vesa <[email protected]>
> ---
> Peng Fan (4):
> clk: imx: imx8qm-rsrc: drop VPU_UART/VPUCORE
> clk: imx8: remove MLB support
> clk: imx: scu: ignore clks not owned by Cortex-A partition
> clk: imx: imx8qm/qxp: add more resources to whitelist
>
> Robert Chiras (1):
> clk: imx: imx8qxp: Fix elcdif_pll clock
>
> Shenwei Wang (1):
> clk: imx: imx8qxp: correct the enet clocks for i.MX8DXL
>
> Viorel Suman (1):
> clk: imx: imx8dxl-rsrc: keep sorted in the ascending order
>
> drivers/clk/imx/clk-imx8-acm.c | 6 +++---
> drivers/clk/imx/clk-imx8dxl-rsrc.c | 3 +--
> drivers/clk/imx/clk-imx8qm-rsrc.c | 5 ++---
> drivers/clk/imx/clk-imx8qxp-lpcg.h | 1 -
> drivers/clk/imx/clk-imx8qxp-rsrc.c | 4 +++-
> drivers/clk/imx/clk-imx8qxp.c | 13 ++++++++++---
> drivers/clk/imx/clk-scu.c | 20 ++++++++++++++++++++
> 7 files changed, 39 insertions(+), 13 deletions(-)
> ---
> base-commit: cd04b2fab5ee58862674e9bab3cbc8e9a8576845
> change-id: 20230912-imx8-clk-v1-d2089920a23a
>
> Best regards,
> --
> Peng Fan <[email protected]>
>
On Tue, 12 Sep 2023 17:18:58 +0800, Peng Fan (OSS) wrote:
> The patchset is to upstream NXP downstream i.MX8 clk misc patches which
> has been stayed in NXP LTS release for quite some time.
>
> There are a few fixes, but should be fine to put in next tree.
>
Applied, thanks!
[1/7] clk: imx: imx8dxl-rsrc: keep sorted in the ascending order
commit: ab2c30f6bbe34dbf13ff2cc0cf7bc237de2df013
[2/7] clk: imx: imx8qxp: Fix elcdif_pll clock
commit: 15cee75dacb82ade710d61bfd536011933ef9bf2
[3/7] clk: imx: imx8qxp: correct the enet clocks for i.MX8DXL
commit: 8568b3c499268456b76cdc2e9e1b9d86d8b08837
[4/7] clk: imx: imx8qm-rsrc: drop VPU_UART/VPUCORE
commit: 4fcb51fb0e3084ee81edaf8aea98ac01e456a871
[5/7] clk: imx8: remove MLB support
commit: a699148b8704aa11600321b9f6b6b21f09418c42
[6/7] clk: imx: scu: ignore clks not owned by Cortex-A partition
commit: eaefd1cf36a6507ff7dd2d30f68201de259eec63
[7/7] clk: imx: imx8qm/qxp: add more resources to whitelist
commit: 2838820800dcaa60f32bef715c7e2e87e049aebc
Best regards,
--
Abel Vesa <[email protected]>