K3 AM64x SoC has a Cortex M4F subsystem in the MCU voltage domain.
The remote processor's life cycle management and IPC mechanisms are
similar across the R5F and M4F cores from remote processor driver
point of view. However, there are subtle differences in image loading
and starting the M4F subsystems.
The YAML binding document provides the various node properties to be
configured by the consumers of the M4F subsystem.
Signed-off-by: Martyn Welch <[email protected]>
Signed-off-by: Hari Nagalla <[email protected]>
---
Changes since v1:
- Spelling corrections
- Corrected to pass DT checks
Changes since v2:
- Missed spelling correction to commit message
Changes since v3:
- Removed unnecessary descriptions and used generic memory region names
- Made mboxes and memory-region optional
- Removed unrelated items from examples
Changes since v4:
- Rebased to the latest kernel-next tree
- Added optional sram memory region for m4f device node
Changes since v5:
- None
.../bindings/remoteproc/ti,k3-m4f-rproc.yaml | 136 ++++++++++++++++++
1 file changed, 136 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/ti,k3-m4f-rproc.yaml
diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-m4f-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-m4f-rproc.yaml
new file mode 100644
index 000000000000..21b7f14d9dc4
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-m4f-rproc.yaml
@@ -0,0 +1,136 @@
+# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/ti,k3-m4f-rproc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TI K3 M4F processor subsystems
+
+maintainers:
+ - Hari Nagalla <[email protected]>
+ - Mathieu Poirier <[email protected]>
+
+description: |
+ Some K3 family SoCs have Arm Cortex M4F cores. AM64x is a SoC in K3
+ family with a M4F core. Typically safety oriented applications may use
+ the M4F core in isolation without an IPC. Where as some industrial and
+ home automation applications, may use the M4F core as a remote processor
+ with IPC communications.
+
+$ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
+
+properties:
+
+ compatible:
+ enum:
+ - ti,am64-m4fss
+
+ power-domains:
+ maxItems: 1
+
+ "#address-cells":
+ const: 2
+
+ "#size-cells":
+ const: 2
+
+ reg:
+ items:
+ - description: IRAM internal memory region
+ - description: DRAM internal memory region
+
+ reg-names:
+ items:
+ - const: iram
+ - const: dram
+
+ resets:
+ maxItems: 1
+
+ firmware-name:
+ $ref: /schemas/types.yaml#/definitions/string
+ description: Name of firmware to load for the M4F core
+
+ mboxes:
+ description: |
+ Mailbox specifier denoting the sub-mailbox, to be used for communication
+ with the remote processor. This property should match with the
+ sub-mailbox node used in the firmware image.
+ maxItems: 2
+
+ memory-region:
+ description: |
+ phandle to the reserved memory nodes to be associated with the
+ remoteproc device. The reserved memory nodes should be carveout nodes,
+ and should be defined with a "no-map" property as per the bindings in
+ Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml
+ Optional memory regions available for firmware specific purposes.
+ maxItems: 8
+ items:
+ - description: regions used for DMA allocations like vrings, vring buffers
+ and memory dedicated to firmware's specific purposes.
+ additionalItems: true
+
+ sram:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ minItems: 1
+ maxItems: 4
+ items:
+ maxItems: 4
+ description: |
+ phandles to one or more reserved on-chip SRAM regions. The regions
+ should be defined as child nodes of the respective SRAM node, and
+ should be defined as per the generic bindings in,
+ Documentation/devicetree/bindings/sram/sram.yaml
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - ti,sci
+ - ti,sci-dev-id
+ - ti,sci-proc-ids
+ - resets
+ - firmware-name
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9cb00000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_m4fss_memory_region: m4f-memory@9cc00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9cc00000 0x00 0xe00000>;
+ no-map;
+ };
+ };
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ remoteproc@5000000 {
+ compatible = "ti,am64-m4fss";
+ reg = <0x00 0x5000000 0x00 0x30000>,
+ <0x00 0x5040000 0x00 0x10000>;
+ reg-names = "iram", "dram";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <9>;
+ ti,sci-proc-ids = <0x18 0xff>;
+ resets = <&k3_reset 9 1>;
+ firmware-name = "am62-mcu-m4f0_0-fw";
+ mboxes = <&mailbox0_cluster0>, <&mbox_m4_0>;
+ memory-region = <&mcu_m4fss_dma_memory_region>,
+ <&mcu_m4fss_memory_region>;
+ sram = <&oc_sram>;
+ };
+ };
--
2.34.1
On Wed, Sep 13, 2023 at 6:17 AM Hari Nagalla <[email protected]> wrote:
>
> K3 AM64x SoC has a Cortex M4F subsystem in the MCU voltage domain.
> The remote processor's life cycle management and IPC mechanisms are
> similar across the R5F and M4F cores from remote processor driver
> point of view. However, there are subtle differences in image loading
> and starting the M4F subsystems.
>
> The YAML binding document provides the various node properties to be
> configured by the consumers of the M4F subsystem.
>
> Signed-off-by: Martyn Welch <[email protected]>
> Signed-off-by: Hari Nagalla <[email protected]>
> ---
> Changes since v1:
> - Spelling corrections
> - Corrected to pass DT checks
>
> Changes since v2:
> - Missed spelling correction to commit message
>
> Changes since v3:
> - Removed unnecessary descriptions and used generic memory region names
> - Made mboxes and memory-region optional
> - Removed unrelated items from examples
>
> Changes since v4:
> - Rebased to the latest kernel-next tree
> - Added optional sram memory region for m4f device node
>
> Changes since v5:
> - None
>
> .../bindings/remoteproc/ti,k3-m4f-rproc.yaml | 136 ++++++++++++++++++
> 1 file changed, 136 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/remoteproc/ti,k3-m4f-rproc.yaml
>
> diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-m4f-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-m4f-rproc.yaml
> new file mode 100644
> index 000000000000..21b7f14d9dc4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-m4f-rproc.yaml
> @@ -0,0 +1,136 @@
> +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/remoteproc/ti,k3-m4f-rproc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: TI K3 M4F processor subsystems
> +
> +maintainers:
> + - Hari Nagalla <[email protected]>
> + - Mathieu Poirier <[email protected]>
> +
> +description: |
> + Some K3 family SoCs have Arm Cortex M4F cores. AM64x is a SoC in K3
> + family with a M4F core. Typically safety oriented applications may use
> + the M4F core in isolation without an IPC. Where as some industrial and
> + home automation applications, may use the M4F core as a remote processor
> + with IPC communications.
> +
> +$ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
> +
> +properties:
> +
> + compatible:
> + enum:
> + - ti,am64-m4fss
> +
> + power-domains:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 2
> +
> + "#size-cells":
> + const: 2
> +
> + reg:
> + items:
> + - description: IRAM internal memory region
> + - description: DRAM internal memory region
> +
> + reg-names:
> + items:
> + - const: iram
> + - const: dram
> +
> + resets:
> + maxItems: 1
> +
> + firmware-name:
> + $ref: /schemas/types.yaml#/definitions/string
> + description: Name of firmware to load for the M4F core
> +
> + mboxes:
> + description: |
> + Mailbox specifier denoting the sub-mailbox, to be used for communication
> + with the remote processor. This property should match with the
> + sub-mailbox node used in the firmware image.
> + maxItems: 2
> +
> + memory-region:
> + description: |
> + phandle to the reserved memory nodes to be associated with the
> + remoteproc device. The reserved memory nodes should be carveout nodes,
> + and should be defined with a "no-map" property as per the bindings in
> + Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml
> + Optional memory regions available for firmware specific purposes.
> + maxItems: 8
> + items:
> + - description: regions used for DMA allocations like vrings, vring buffers
> + and memory dedicated to firmware's specific purposes.
> + additionalItems: true
> +
> + sram:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + minItems: 1
> + maxItems: 4
> + items:
> + maxItems: 4
You are saying there are 1-4 entries and each entry is 4 cells. What's
in the 4 cells?
From the description and example, looks like you only have 1 cell (a
phandle) so maxItems should be 1.
Your example should fail, but I'm not sure why it doesn't.
Rob