2023-09-20 04:16:13

by Om Prakash Singh

[permalink] [raw]
Subject: [PATCH V2] crypto: qcom-rng - Add hw_random interface support

Add hw_random interface support in qcom-rng driver as new IP block
in Qualcomm SoC has inbuilt NIST SP800 90B compliant entropic source
to generate true random number.

Keeping current rng_alg interface as well for random number generation
using Kernel Crypto API.

Signed-off-by: Om Prakash Singh <[email protected]>
---

Changes in V2:
- Updated patch to fix the return value from qcom_rng_generate() to be
consistent with current implementation
- Updated patch to make it more concise
- Removed unnecessary use local variable and it's initialization
- Updated patch to use devm_hwrng_register() instead of hwrng_register()
- Updated subject line of the patch

This patch is depends on [1]
[1] https://lore.kernel.org/lkml/[email protected]/

drivers/crypto/qcom-rng.c | 65 ++++++++++++++++++++++++++++++++++-----
1 file changed, 58 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/qcom-rng.c b/drivers/crypto/qcom-rng.c
index fb54b8cfc35f..e5a574a3cc59 100644
--- a/drivers/crypto/qcom-rng.c
+++ b/drivers/crypto/qcom-rng.c
@@ -7,6 +7,7 @@
#include <linux/acpi.h>
#include <linux/clk.h>
#include <linux/crypto.h>
+#include <linux/hw_random.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/kernel.h>
@@ -32,13 +33,18 @@ struct qcom_rng {
struct mutex lock;
void __iomem *base;
struct clk *clk;
- unsigned int skip_init;
+ struct qcom_rng_of_data *of_data;
};

struct qcom_rng_ctx {
struct qcom_rng *rng;
};

+struct qcom_rng_of_data {
+ bool skip_init;
+ bool hwrng_support;
+};
+
static struct qcom_rng *qcom_rng_dev;

static int qcom_rng_read(struct qcom_rng *rng, u8 *data, unsigned int max)
@@ -70,7 +76,7 @@ static int qcom_rng_read(struct qcom_rng *rng, u8 *data, unsigned int max)
}
} while (currsize < max);

- return 0;
+ return currsize;
}

static int qcom_rng_generate(struct crypto_rng *tfm,
@@ -92,6 +98,9 @@ static int qcom_rng_generate(struct crypto_rng *tfm,
mutex_unlock(&rng->lock);
clk_disable_unprepare(rng->clk);

+ if (ret == dlen)
+ ret = 0;
+
return ret;
}

@@ -101,6 +110,13 @@ static int qcom_rng_seed(struct crypto_rng *tfm, const u8 *seed,
return 0;
}

+static int qcom_hwrng_read(struct hwrng *rng, void *data, size_t max, bool wait)
+{
+ struct qcom_rng *qrng = (struct qcom_rng *)rng->priv;
+
+ return qcom_rng_read(qrng, data, max);
+}
+
static int qcom_rng_enable(struct qcom_rng *rng)
{
u32 val;
@@ -136,7 +152,7 @@ static int qcom_rng_init(struct crypto_tfm *tfm)

ctx->rng = qcom_rng_dev;

- if (!ctx->rng->skip_init)
+ if (!ctx->rng->of_data->skip_init)
return qcom_rng_enable(ctx->rng);

return 0;
@@ -157,6 +173,12 @@ static struct rng_alg qcom_rng_alg = {
}
};

+static struct hwrng qcom_hwrng = {
+ .name = "qcom-hwrng",
+ .read = qcom_hwrng_read,
+ .quality = 1024,
+};
+
static int qcom_rng_probe(struct platform_device *pdev)
{
struct qcom_rng *rng;
@@ -177,15 +199,29 @@ static int qcom_rng_probe(struct platform_device *pdev)
if (IS_ERR(rng->clk))
return PTR_ERR(rng->clk);

- rng->skip_init = (unsigned long)device_get_match_data(&pdev->dev);
+ rng->of_data = (struct qcom_rng_of_data *)of_device_get_match_data(&pdev->dev);

qcom_rng_dev = rng;
ret = crypto_register_rng(&qcom_rng_alg);
if (ret) {
dev_err(&pdev->dev, "Register crypto rng failed: %d\n", ret);
qcom_rng_dev = NULL;
+ return ret;
+ }
+
+ if (rng->of_data->hwrng_support) {
+ qcom_hwrng.priv = (unsigned long)qcom_rng_dev;
+ ret = devm_hwrng_register(&pdev->dev, &qcom_hwrng);
+ if (ret) {
+ dev_err(&pdev->dev, "Register hwrng failed: %d\n", ret);
+ qcom_rng_dev = NULL;
+ goto fail;
+ }
}

+ return ret;
+fail:
+ crypto_unregister_rng(&qcom_rng_alg);
return ret;
}

@@ -198,6 +234,21 @@ static int qcom_rng_remove(struct platform_device *pdev)
return 0;
}

+struct qcom_rng_of_data qcom_prng_of_data = {
+ .skip_init = false,
+ .hwrng_support = false,
+};
+
+struct qcom_rng_of_data qcom_prng_ee_of_data = {
+ .skip_init = true,
+ .hwrng_support = false,
+};
+
+struct qcom_rng_of_data qcom_trng_of_data = {
+ .skip_init = true,
+ .hwrng_support = true,
+};
+
static const struct acpi_device_id __maybe_unused qcom_rng_acpi_match[] = {
{ .id = "QCOM8160", .driver_data = 1 },
{}
@@ -205,9 +256,9 @@ static const struct acpi_device_id __maybe_unused qcom_rng_acpi_match[] = {
MODULE_DEVICE_TABLE(acpi, qcom_rng_acpi_match);

static const struct of_device_id __maybe_unused qcom_rng_of_match[] = {
- { .compatible = "qcom,prng", .data = (void *)0},
- { .compatible = "qcom,prng-ee", .data = (void *)1},
- { .compatible = "qcom,trng", .data = (void *)1},
+ { .compatible = "qcom,prng", .data = &qcom_prng_of_data },
+ { .compatible = "qcom,prng-ee", .data = &qcom_prng_ee_of_data },
+ { .compatible = "qcom,trng", .data = &qcom_trng_of_data },
{}
};
MODULE_DEVICE_TABLE(of, qcom_rng_of_match);
--
2.25.1


2023-09-22 18:54:02

by Bjorn Andersson

[permalink] [raw]
Subject: Re: [PATCH V2] crypto: qcom-rng - Add hw_random interface support

On Wed, Sep 20, 2023 at 08:34:08AM +0530, Om Prakash Singh wrote:
> Add hw_random interface support in qcom-rng driver as new IP block
> in Qualcomm SoC has inbuilt NIST SP800 90B compliant entropic source
> to generate true random number.
>
> Keeping current rng_alg interface as well for random number generation
> using Kernel Crypto API.
>
> Signed-off-by: Om Prakash Singh <[email protected]>
> ---
>
> Changes in V2:
> - Updated patch to fix the return value from qcom_rng_generate() to be
> consistent with current implementation

As far as I can tell you didn't change this, see below.

> - Updated patch to make it more concise
> - Removed unnecessary use local variable and it's initialization
> - Updated patch to use devm_hwrng_register() instead of hwrng_register()
> - Updated subject line of the patch
>
> This patch is depends on [1]
> [1] https://lore.kernel.org/lkml/[email protected]/
>
> drivers/crypto/qcom-rng.c | 65 ++++++++++++++++++++++++++++++++++-----
> 1 file changed, 58 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/crypto/qcom-rng.c b/drivers/crypto/qcom-rng.c
> index fb54b8cfc35f..e5a574a3cc59 100644
> --- a/drivers/crypto/qcom-rng.c
> +++ b/drivers/crypto/qcom-rng.c
> @@ -7,6 +7,7 @@
> #include <linux/acpi.h>
> #include <linux/clk.h>
> #include <linux/crypto.h>
> +#include <linux/hw_random.h>
> #include <linux/io.h>
> #include <linux/iopoll.h>
> #include <linux/kernel.h>
> @@ -32,13 +33,18 @@ struct qcom_rng {
> struct mutex lock;
> void __iomem *base;
> struct clk *clk;
> - unsigned int skip_init;
> + struct qcom_rng_of_data *of_data;
> };
>
> struct qcom_rng_ctx {
> struct qcom_rng *rng;
> };
>
> +struct qcom_rng_of_data {
> + bool skip_init;
> + bool hwrng_support;
> +};
> +
> static struct qcom_rng *qcom_rng_dev;
>
> static int qcom_rng_read(struct qcom_rng *rng, u8 *data, unsigned int max)
> @@ -70,7 +76,7 @@ static int qcom_rng_read(struct qcom_rng *rng, u8 *data, unsigned int max)
> }
> } while (currsize < max);
>
> - return 0;
> + return currsize;

As I pointed out in my previous review, if the qcom_rng_read() is
requested to read a number of bytes (max) that is not evenly divisible
with 4 (WORD_SZ) the loop will exit without accounting for the last
bytes copied...

> }
>
> static int qcom_rng_generate(struct crypto_rng *tfm,
> @@ -92,6 +98,9 @@ static int qcom_rng_generate(struct crypto_rng *tfm,
> mutex_unlock(&rng->lock);
> clk_disable_unprepare(rng->clk);
>
> + if (ret == dlen)

...this means that if dlen % 4, you're changing the return value of this
function from 0 to dlen.

> + ret = 0;
> +
> return ret;
> }
>
> @@ -101,6 +110,13 @@ static int qcom_rng_seed(struct crypto_rng *tfm, const u8 *seed,
> return 0;
> }
>
> +static int qcom_hwrng_read(struct hwrng *rng, void *data, size_t max, bool wait)
> +{
> + struct qcom_rng *qrng = (struct qcom_rng *)rng->priv;

You missed Herbert's request in [1], which I presume implies that
qcom_hwrng should be moved into struct qcom_rng, which would mean that
you can get the qrng by container_of().

[1] https://lore.kernel.org/lkml/[email protected]/

> +
> + return qcom_rng_read(qrng, data, max);
> +}
> +
> static int qcom_rng_enable(struct qcom_rng *rng)
> {
> u32 val;
> @@ -136,7 +152,7 @@ static int qcom_rng_init(struct crypto_tfm *tfm)
>
> ctx->rng = qcom_rng_dev;
>
> - if (!ctx->rng->skip_init)
> + if (!ctx->rng->of_data->skip_init)
> return qcom_rng_enable(ctx->rng);
>
> return 0;
> @@ -157,6 +173,12 @@ static struct rng_alg qcom_rng_alg = {
> }
> };
>
> +static struct hwrng qcom_hwrng = {
> + .name = "qcom-hwrng",
> + .read = qcom_hwrng_read,
> + .quality = 1024,
> +};

Which would mean not adding this static global variable...

Regards,
Bjorn