2023-09-22 00:04:55

by David Lechner

[permalink] [raw]
Subject: [PATCH v2 00/19] iio: resolver: move ad2s1210 out of staging

Resending v2 with proper `PATCH v2` prefix.

Changes since v1:
* Address initial device tree patch feedback
* Drop "iio: sysfs: add IIO_DEVICE_ATTR_NAMED_RW macro" (related cleanups
also dropped for now, will address in a future series if needed)
* Apply improvements as a series as patches to the staging driver. It is not
quite ready for the move out of staging patch yet.

This series has been tested on actual hardware using a EVAL-AD2S1210 evaluation
board. (Note: not all device tree features have been implemented in the driver
since the eval board doesn't support them out of the box. We plan to add them
later if needed.)

One thing left over from the staging driver that probably needs more attention
still is the fault handling (both the fault threshold attributes and how
userspace gets notified of fault conditions). We considered adding these as
events, but the fault conditions are related to internal measurements in the
chip that aren't available as channels.

Since the chip is designed to read the fault register each time we read the
data registers for one of the two channels it seems like faults should be
associated with channels one way or another. Would it make sense to add extra
channels for the internal signals that only have fault events (mostly with
IIO_EV_TYPE_THRESH)? Or would it make sense to add a new "flags" channel type
where the "raw" value is bit flags? Or something else?

Here is the table of available faults for context. Sine/cosine inputs are
internal signals.

| Bit | Description
+-----+------------
| D7 | Sine/cosine inputs clipped
| D6 | Sine/cosine inputs below LOS threshold
| D5 | Sine/cosine inputs exceed DOS overrange threshold
| D4 | Sine/cosine inputs exceed DOS mismatch threshold
| D3 | Tracking error exceeds LOT threshold
| D2 | Velocity exceeds maximum tracking rate
| D1 | Phase error exceeds phase lock range
| D0 | Configuration parity error

David Lechner (19):
dt-bindings: iio: resolver: add devicetree bindings for ad2s1210
staging: iio: Documentation: document IIO resolver AD2S1210 sysfs
attributes
staging: iio: resolver: ad2s1210: fix ad2s1210_show_fault
staging: iio: resolver: ad2s1210: fix not restoring sample gpio in
channel read
staging: iio: resolver: ad2s1210: fix probe
staging: iio: resolver: ad2s1210: always use 16-bit value for raw read
staging: iio: resolver: ad2s1210: implement IIO_CHAN_INFO_SCALE
staging: iio: resolver: ad2s1210: use devicetree to get fclkin
staging: iio: resolver: ad2s1210: use regmap for config registers
staging: iio: resolver: ad2s1210: add debugfs reg access
staging: iio: resolver: ad2s1210: remove config attribute
staging: iio: resolver: ad2s1210: rework gpios
staging: iio: resolver: ad2s1210: implement hysteresis as channel attr
staging: iio: resolver: ad2s1210: refactor setting excitation
frequency
staging: iio: resolver: ad2s1210: read excitation frequency from
control register
staging: iio: resolver: ad2s1210: rename fexcit attribute
staging: iio: resolver: ad2s1210: convert resolution to devicetree
property
staging: iio: resolver: ad2s1210: add phase_lock_range attributes
staging: iio: resolver: ad2s1210: add triggered buffer support

.../bindings/iio/resolver/adi,ad2s1210.yaml | 150 +++
.../sysfs-bus-iio-resolver-ad2s1210 | 109 ++
drivers/staging/iio/resolver/Kconfig | 1 +
drivers/staging/iio/resolver/ad2s1210.c | 948 +++++++++++-------
4 files changed, 857 insertions(+), 351 deletions(-)
create mode 100644 Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml
create mode 100644 drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210

--
2.34.1


2023-09-22 00:09:48

by David Lechner

[permalink] [raw]
Subject: [PATCH v2 07/19] staging: iio: resolver: ad2s1210: implement IIO_CHAN_INFO_SCALE

This adds an implementation of IIO_CHAN_INFO_SCALE to the ad2s1210
resolver driver. This allows userspace to get the scale factor for the
raw values.

Signed-off-by: David Lechner <[email protected]>
---
drivers/staging/iio/resolver/ad2s1210.c | 107 ++++++++++++++++--------
1 file changed, 72 insertions(+), 35 deletions(-)

diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
index 985b8fecd65a..95d43b241a75 100644
--- a/drivers/staging/iio/resolver/ad2s1210.c
+++ b/drivers/staging/iio/resolver/ad2s1210.c
@@ -458,56 +458,91 @@ static ssize_t ad2s1210_store_reg(struct device *dev,
return ret < 0 ? ret : len;
}

+static const int ad2s1210_velocity_scale[] = {
+ 17089132, /* 8.192MHz / (2*pi * 2500 / 2^15) */
+ 42722830, /* 8.192MHz / (2*pi * 1000 / 2^15) */
+ 85445659, /* 8.192MHz / (2*pi * 500 / 2^15) */
+ 341782638, /* 8.192MHz / (2*pi * 125 / 2^15) */
+};
+
static int ad2s1210_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val,
int *val2,
- long m)
+ long mask)
{
struct ad2s1210_state *st = iio_priv(indio_dev);
int ret = 0;

- mutex_lock(&st->lock);
- gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
- /* delay (6 * tck + 20) nano seconds */
- udelay(1);
+ switch (mask) {
+ case IIO_CHAN_INFO_RAW:
+ mutex_lock(&st->lock);
+ gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
+ /* delay (6 * tck + 20) nano seconds */
+ udelay(1);
+
+ switch (chan->type) {
+ case IIO_ANGL:
+ ad2s1210_set_mode(MOD_POS, st);
+ break;
+ case IIO_ANGL_VEL:
+ ad2s1210_set_mode(MOD_VEL, st);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+ if (ret < 0)
+ goto error_info_raw;
+ ret = spi_read(st->sdev, st->rx, 2);
+ if (ret < 0)
+ goto error_info_raw;
+
+ switch (chan->type) {
+ case IIO_ANGL:
+ *val = be16_to_cpup((__be16 *)st->rx);
+ ret = IIO_VAL_INT;
+ break;
+ case IIO_ANGL_VEL:
+ *val = (s16)be16_to_cpup((__be16 *)st->rx);
+ ret = IIO_VAL_INT;
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }

- switch (chan->type) {
- case IIO_ANGL:
- ad2s1210_set_mode(MOD_POS, st);
- break;
- case IIO_ANGL_VEL:
- ad2s1210_set_mode(MOD_VEL, st);
- break;
- default:
- ret = -EINVAL;
+error_info_raw:
+ gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
+ /* delay (2 * tck + 20) nano seconds */
+ udelay(1);
+ mutex_unlock(&st->lock);
break;
- }
- if (ret < 0)
- goto error_ret;
- ret = spi_read(st->sdev, st->rx, 2);
- if (ret < 0)
- goto error_ret;

- switch (chan->type) {
- case IIO_ANGL:
- *val = be16_to_cpup((__be16 *)st->rx);
- ret = IIO_VAL_INT;
- break;
- case IIO_ANGL_VEL:
- *val = (s16)be16_to_cpup((__be16 *)st->rx);
- ret = IIO_VAL_INT;
+ case IIO_CHAN_INFO_SCALE:
+ switch (chan->type) {
+ case IIO_ANGL:
+ /* approx 0.3 arc min converted to radians */
+ *val = 0;
+ *val2 = 95874;
+ ret = IIO_VAL_INT_PLUS_NANO;
+ break;
+ case IIO_ANGL_VEL:
+ *val = st->fclkin;
+ *val2 = ad2s1210_velocity_scale[st->resolution];
+ ret = IIO_VAL_FRACTIONAL;
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
break;
+
default:
ret = -EINVAL;
break;
}

-error_ret:
- gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
- /* delay (2 * tck + 20) nano seconds */
- udelay(1);
- mutex_unlock(&st->lock);
return ret;
}

@@ -549,12 +584,14 @@ static const struct iio_chan_spec ad2s1210_channels[] = {
.type = IIO_ANGL,
.indexed = 1,
.channel = 0,
- .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
+ BIT(IIO_CHAN_INFO_SCALE),
}, {
.type = IIO_ANGL_VEL,
.indexed = 1,
.channel = 0,
- .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
+ BIT(IIO_CHAN_INFO_SCALE),
}
};

--
2.34.1

2023-09-22 00:27:42

by David Lechner

[permalink] [raw]
Subject: [PATCH v2 01/19] dt-bindings: iio: resolver: add devicetree bindings for ad2s1210

This adds new DeviceTree bindings for the Analog Devices, Inc. AD2S1210
resolver-to-digital converter.

Co-developed-by: Apelete Seketeli <[email protected]>
Signed-off-by: Apelete Seketeli <[email protected]>
Signed-off-by: David Lechner <[email protected]>
---

v2 changes:
* Add Co-developed-by:
* Remove extraneous quotes on strings
* Remove extraneous pipe on some multi-line descriptions

.../bindings/iio/resolver/adi,ad2s1210.yaml | 150 ++++++++++++++++++
1 file changed, 150 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml

diff --git a/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml b/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml
new file mode 100644
index 000000000000..f55c9652cfb7
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml
@@ -0,0 +1,150 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/resolver/adi,ad2s1210.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices AD2S1210 Resolver-to-Digital Converter
+
+maintainers:
+ - Michael Hennerich <[email protected]>
+
+description: |
+ The AD2S1210 is a complete 10-bit to 16-bit resolution tracking
+ resolver-to-digital converter, integrating an on-board programmable
+ sinusoidal oscillator that provides sine wave excitation for
+ resolvers.
+
+ The AD2S1210 allows the user to read the angular position or the
+ angular velocity data directly from the parallel outputs or through
+ the serial interface.
+
+ A1 A0 Result
+ 0 0 Normal mode - position output
+ 0 1 Normal mode - velocity output
+ 1 0 Reserved
+ 1 1 Configuration mode
+
+ In normal mode, the resolution of the digital output is selected using
+ the RES0 and RES1 input pins. In configuration mode, the resolution is
+ selected by setting the RES0 and RES1 bits in the control register.
+
+ RES1 RES0 Resolution (Bits)
+ 0 0 10
+ 0 1 12
+ 1 0 14
+ 1 1 16
+
+ Note on SPI connections: The CS line on the AD2S1210 should hard-wired to
+ logic low and the WR/FSYNC line on the AD2S1210 should be connected to the
+ SPI CSn output of the SPI controller.
+
+ Datasheet:
+ https://www.analog.com/media/en/technical-documentation/data-sheets/ad2s1210.pdf
+
+properties:
+ compatible:
+ const: adi,ad2s1210
+
+ reg:
+ maxItems: 1
+
+ spi-max-frequency:
+ maximum: 25000000
+
+ spi-cpha: true
+
+ clocks:
+ maxItems: 1
+ description: External oscillator clock (CLKIN).
+
+ reset-gpios:
+ description:
+ GPIO connected to the /RESET pin. As the line needs to be low for the
+ reset to be active, it should be configured as GPIO_ACTIVE_LOW.
+ maxItems: 1
+
+ sample-gpios:
+ description:
+ GPIO connected to the /SAMPLE pin. As the line needs to be low to trigger
+ a sample, it should be configured as GPIO_ACTIVE_LOW.
+ maxItems: 1
+
+ mode-gpios:
+ description:
+ GPIO lines connected to the A0 and A1 pins. These pins select the data
+ transfer mode.
+ minItems: 2
+ maxItems: 2
+
+ resolution-gpios:
+ description:
+ GPIO lines connected to the RES0 and RES1 pins. These pins select the
+ resolution of the digital output. If omitted, it is assumed that the
+ RES0 and RES1 pins are hard-wired to match the assigned-resolution-bits
+ property.
+ minItems: 2
+ maxItems: 2
+
+ fault-gpios:
+ description:
+ GPIO lines connected to the LOT and DOS pins. These pins combined indicate
+ the type of fault present, if any. As these pins a pulled low to indicate
+ a fault condition, they should be configured as GPIO_ACTIVE_LOW.
+ minItems: 2
+ maxItems: 2
+
+ adi,fixed-mode:
+ description:
+ This is used to indicate the selected mode if A0 and A1 are hard-wired
+ instead of connected to GPIOS (i.e. mode-gpios is omitted).
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [config, velocity, position]
+
+ assigned-resolution-bits:
+ description:
+ Resolution of the digital output required by the application. This
+ determines the precision of the angle and/or the maximum speed that can
+ be measured. If resolution-gpios is omitted, it is assumed that RES0 and
+ RES1 are hard-wired to match this value.
+ enum: [10, 12, 14, 16]
+
+required:
+ - compatible
+ - reg
+ - spi-cpha
+ - clocks
+ - sample-gpios
+ - assigned-resolution-bits
+
+oneOf:
+ - required:
+ - mode-gpios
+ - required:
+ - adi,fixed-mode
+
+allOf:
+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ resolver@0 {
+ compatible = "adi,ad2s1210";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ spi-cpha;
+ clocks = <&ext_osc>;
+ sample-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>;
+ mode-gpios = <&gpio0 86 0>, <&gpio0 87 0>;
+ resolution-gpios = <&gpio0 88 0>, <&gpio0 89 0>;
+ assigned-resolution-bits = <16>;
+ };
+ };
--
2.34.1

2023-09-22 00:37:50

by David Lechner

[permalink] [raw]
Subject: [PATCH v2 05/19] staging: iio: resolver: ad2s1210: fix probe

This fixes a number of issues in the ad2s1210_probe() function:
- Move call to ad2s1210_setup_gpios() after `st->sdev = spi;`. This
fixes use of this pointer before it is initialized.
- Check return value on ad2s1210_initial().
- Move devm_iio_device_register() to the end to avoid race of
registering before fully initialized.
- Remove call to spi_setup(). Note: MODE_3 was incorrect, it should be
MODE_1 but we can let the device tree select this.
- Change default value for fclkin. This is an external oscillator, not
the SPI bus clock. (Will use device tree to get the correct value
in a future patch. For now, using the eval board value.)
- Remove spi_set_drvdata().

Signed-off-by: David Lechner <[email protected]>
---
drivers/staging/iio/resolver/ad2s1210.c | 30 ++++++++++++-------------
1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
index 0bdd5a30d45d..9c7f76114360 100644
--- a/drivers/staging/iio/resolver/ad2s1210.c
+++ b/drivers/staging/iio/resolver/ad2s1210.c
@@ -3,6 +3,7 @@
* ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210
*
* Copyright (c) 2010-2010 Analog Devices Inc.
+ * Copyright (C) 2023 BayLibre, SAS
*/
#include <linux/types.h>
#include <linux/mutex.h>
@@ -657,12 +658,8 @@ static int ad2s1210_probe(struct spi_device *spi)
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
- st = iio_priv(indio_dev);
- ret = ad2s1210_setup_gpios(st);
- if (ret < 0)
- return ret;

- spi_set_drvdata(spi, indio_dev);
+ st = iio_priv(indio_dev);

mutex_init(&st->lock);
st->sdev = spi;
@@ -671,22 +668,25 @@ static int ad2s1210_probe(struct spi_device *spi)
st->resolution = 12;
st->fexcit = AD2S1210_DEF_EXCIT;

+ ret = ad2s1210_setup_clocks(st);
+ if (ret < 0)
+ return ret;
+
+ ret = ad2s1210_setup_gpios(st);
+ if (ret < 0)
+ return ret;
+
+ ret = ad2s1210_initial(st);
+ if (ret < 0)
+ return ret;
+
indio_dev->info = &ad2s1210_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = ad2s1210_channels;
indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels);
indio_dev->name = spi_get_device_id(spi)->name;

- ret = devm_iio_device_register(&spi->dev, indio_dev);
- if (ret)
- return ret;
-
- st->fclkin = spi->max_speed_hz;
- spi->mode = SPI_MODE_3;
- spi_setup(spi);
- ad2s1210_initial(st);
-
- return 0;
+ return devm_iio_device_register(&spi->dev, indio_dev);
}

static const struct of_device_id ad2s1210_of_match[] = {
--
2.34.1

2023-09-22 01:18:06

by David Lechner

[permalink] [raw]
Subject: [PATCH v2 12/19] staging: iio: resolver: ad2s1210: rework gpios

- Remove "adi," prefix from gpio names.
- Sample gpio is now expected to be active low.
- Convert A0 and A1 gpios to "mode-gpios" gpio array.
- Convert RES0 and RES1 gpios to "resolution-gpios" gpio array.
- Remove extraneous lookup tables.
- Remove unused mode field from state struct.
- Swap argument order of ad2s1210_set_mode() while we are touching this.

Signed-off-by: David Lechner <[email protected]>
---
drivers/staging/iio/resolver/ad2s1210.c | 162 ++++++++++++------------
1 file changed, 84 insertions(+), 78 deletions(-)

diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
index 223cc4702188..7a1069d948eb 100644
--- a/drivers/staging/iio/resolver/ad2s1210.c
+++ b/drivers/staging/iio/resolver/ad2s1210.c
@@ -60,39 +60,21 @@
#define AD2S1210_DEF_EXCIT 10000

enum ad2s1210_mode {
- MOD_POS = 0,
- MOD_VEL,
- MOD_CONFIG,
- MOD_RESERVED,
+ MOD_POS = 0b00,
+ MOD_VEL = 0b01,
+ MOD_RESERVED = 0b10,
+ MOD_CONFIG = 0b11,
};

-enum ad2s1210_gpios {
- AD2S1210_SAMPLE,
- AD2S1210_A0,
- AD2S1210_A1,
- AD2S1210_RES0,
- AD2S1210_RES1,
-};
-
-struct ad2s1210_gpio {
- const char *name;
- unsigned long flags;
-};
-
-static const struct ad2s1210_gpio gpios[] = {
- [AD2S1210_SAMPLE] = { .name = "adi,sample", .flags = GPIOD_OUT_LOW },
- [AD2S1210_A0] = { .name = "adi,a0", .flags = GPIOD_OUT_LOW },
- [AD2S1210_A1] = { .name = "adi,a1", .flags = GPIOD_OUT_LOW },
- [AD2S1210_RES0] = { .name = "adi,res0", .flags = GPIOD_OUT_LOW },
- [AD2S1210_RES1] = { .name = "adi,res1", .flags = GPIOD_OUT_LOW },
-};
-
-static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 };
-
struct ad2s1210_state {
struct mutex lock;
struct spi_device *sdev;
- struct gpio_desc *gpios[5];
+ /** GPIO pin connected to SAMPLE line. */
+ struct gpio_desc *sample_gpio;
+ /** GPIO pins connected to A0 and A1 lines. */
+ struct gpio_descs *mode_gpios;
+ /** GPIO pins connected to RES0 and RES1 lines. */
+ struct gpio_descs *resolution_gpios;
/** Used to access config registers. */
struct regmap *regmap;
/** The external oscillator frequency in Hz. */
@@ -100,23 +82,19 @@ struct ad2s1210_state {
unsigned int fexcit;
bool hysteresis;
u8 resolution;
- enum ad2s1210_mode mode;
u8 rx[2] __aligned(IIO_DMA_MINALIGN);
u8 tx[2];
};

-static const int ad2s1210_mode_vals[4][2] = {
- [MOD_POS] = { 0, 0 },
- [MOD_VEL] = { 0, 1 },
- [MOD_CONFIG] = { 1, 1 },
-};
-
-static inline void ad2s1210_set_mode(enum ad2s1210_mode mode,
- struct ad2s1210_state *st)
+static int ad2s1210_set_mode(struct ad2s1210_state *st, enum ad2s1210_mode mode)
{
- gpiod_set_value(st->gpios[AD2S1210_A0], ad2s1210_mode_vals[mode][0]);
- gpiod_set_value(st->gpios[AD2S1210_A1], ad2s1210_mode_vals[mode][1]);
- st->mode = mode;
+ struct gpio_descs *gpios = st->mode_gpios;
+ DECLARE_BITMAP(bitmap, 2);
+
+ bitmap[0] = mode;
+
+ return gpiod_set_array_value(gpios->ndescs, gpios->desc, gpios->info,
+ bitmap);
}

/*
@@ -141,6 +119,7 @@ static int ad2s1210_regmap_reg_write(void *context, unsigned int reg,
.tx_buf = &st->tx[1],
},
};
+ int ret;

/* values can only be 7 bits, the MSB indicates an address */
if (val & ~0x7F)
@@ -149,7 +128,9 @@ static int ad2s1210_regmap_reg_write(void *context, unsigned int reg,
st->tx[0] = reg;
st->tx[1] = val;

- ad2s1210_set_mode(MOD_CONFIG, st);
+ ret = ad2s1210_set_mode(st, MOD_CONFIG);
+ if (ret < 0)
+ return ret;

return spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers));
}
@@ -178,7 +159,10 @@ static int ad2s1210_regmap_reg_read(void *context, unsigned int reg,
};
int ret;

- ad2s1210_set_mode(MOD_CONFIG, st);
+ ret = ad2s1210_set_mode(st, MOD_CONFIG);
+ if (ret < 0)
+ return ret;
+
st->tx[0] = reg;
/* Must be valid register address here otherwise this could write data.
* It doesn't matter which one.
@@ -215,16 +199,16 @@ int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
return regmap_write(st->regmap, AD2S1210_REG_EXCIT_FREQ, fcw);
}

-static const int ad2s1210_res_pins[4][2] = {
- { 0, 0 }, {0, 1}, {1, 0}, {1, 1}
-};
-
-static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st)
+static int ad2s1210_set_resolution_gpios(struct ad2s1210_state *st,
+ u8 resolution)
{
- gpiod_set_value(st->gpios[AD2S1210_RES0],
- ad2s1210_res_pins[(st->resolution - 10) / 2][0]);
- gpiod_set_value(st->gpios[AD2S1210_RES1],
- ad2s1210_res_pins[(st->resolution - 10) / 2][1]);
+ struct gpio_descs *gpios = st->resolution_gpios;
+ DECLARE_BITMAP(bitmap, 2);
+
+ bitmap[0] = (resolution - 10) >> 1;
+
+ return gpiod_set_array_value(gpios->ndescs, gpios->desc, gpios->info,
+ bitmap);
}

static inline int ad2s1210_soft_reset(struct ad2s1210_state *st)
@@ -301,10 +285,13 @@ static ssize_t ad2s1210_store_resolution(struct device *dev,
if (ret < 0)
goto error_ret;

- st->resolution =
- ad2s1210_resolution_value[data & AD2S1210_SET_RES];
- ad2s1210_set_resolution_pin(st);
+ ret = ad2s1210_set_resolution_gpios(st, udata);
+ if (ret < 0)
+ goto error_ret;
+
+ st->resolution = udata;
ret = len;
+
error_ret:
mutex_unlock(&st->lock);
return ret;
@@ -335,15 +322,19 @@ static ssize_t ad2s1210_clear_fault(struct device *dev,
int ret;

mutex_lock(&st->lock);
- gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
+
+ gpiod_set_value(st->sample_gpio, 1);
/* delay (2 * tck + 20) nano seconds */
udelay(1);
- gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
+ gpiod_set_value(st->sample_gpio, 0);
+
ret = regmap_read(st->regmap, AD2S1210_REG_FAULT, &value);
if (ret < 0)
goto error_ret;
- gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
- gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
+
+ gpiod_set_value(st->sample_gpio, 1);
+ gpiod_set_value(st->sample_gpio, 0);
+
error_ret:
mutex_unlock(&st->lock);

@@ -404,16 +395,16 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev,
switch (mask) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&st->lock);
- gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
+ gpiod_set_value(st->sample_gpio, 1);
/* delay (6 * tck + 20) nano seconds */
udelay(1);

switch (chan->type) {
case IIO_ANGL:
- ad2s1210_set_mode(MOD_POS, st);
+ ret = ad2s1210_set_mode(st, MOD_POS);
break;
case IIO_ANGL_VEL:
- ad2s1210_set_mode(MOD_VEL, st);
+ ret = ad2s1210_set_mode(st, MOD_VEL);
break;
default:
ret = -EINVAL;
@@ -440,7 +431,7 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev,
}

error_info_raw:
- gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
+ gpiod_set_value(st->sample_gpio, 0);
/* delay (2 * tck + 20) nano seconds */
udelay(1);
mutex_unlock(&st->lock);
@@ -542,7 +533,9 @@ static int ad2s1210_initial(struct ad2s1210_state *st)
int ret;

mutex_lock(&st->lock);
- ad2s1210_set_resolution_pin(st);
+ ret = ad2s1210_set_resolution_gpios(st, st->resolution);
+ if (ret < 0)
+ return ret;

data = AD2S1210_DEF_CONTROL & ~AD2S1210_SET_RES;
data |= (st->resolution - 10) >> 1;
@@ -604,20 +597,34 @@ static int ad2s1210_setup_clocks(struct ad2s1210_state *st)

static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
{
- struct spi_device *spi = st->sdev;
- int i, ret;
-
- for (i = 0; i < ARRAY_SIZE(gpios); i++) {
- st->gpios[i] = devm_gpiod_get(&spi->dev, gpios[i].name,
- gpios[i].flags);
- if (IS_ERR(st->gpios[i])) {
- ret = PTR_ERR(st->gpios[i]);
- dev_err(&spi->dev,
- "ad2s1210: failed to request %s GPIO: %d\n",
- gpios[i].name, ret);
- return ret;
- }
- }
+ struct device *dev = &st->sdev->dev;
+
+ /* should not be sampling on startup */
+ st->sample_gpio = devm_gpiod_get(dev, "sample", GPIOD_OUT_LOW);
+ if (IS_ERR(st->sample_gpio))
+ return dev_err_probe(dev, PTR_ERR(st->sample_gpio),
+ "failed to request sample GPIO\n");
+
+ /* both pins high means that we start in config mode */
+ st->mode_gpios = devm_gpiod_get_array(dev, "mode", GPIOD_OUT_HIGH);
+ if (IS_ERR(st->mode_gpios))
+ return dev_err_probe(dev, PTR_ERR(st->mode_gpios),
+ "failed to request mode GPIOs\n");
+
+ if (st->mode_gpios->ndescs != 2)
+ return dev_err_probe(dev, -EINVAL,
+ "requires exactly 2 mode-gpios\n");
+
+ /* both pins high means that we start with 16-bit resolution */
+ st->resolution_gpios = devm_gpiod_get_array(dev, "resolution",
+ GPIOD_OUT_HIGH);
+ if (IS_ERR(st->resolution_gpios))
+ return dev_err_probe(dev, PTR_ERR(st->resolution_gpios),
+ "failed to request resolution GPIOs\n");
+
+ if (st->resolution_gpios->ndescs != 2)
+ return dev_err_probe(dev, -EINVAL,
+ "requires exactly 2 resolution-gpios\n");

return 0;
}
@@ -683,7 +690,6 @@ static int ad2s1210_probe(struct spi_device *spi)
mutex_init(&st->lock);
st->sdev = spi;
st->hysteresis = true;
- st->mode = MOD_CONFIG;
st->resolution = 12;
st->fexcit = AD2S1210_DEF_EXCIT;

--
2.34.1

2023-09-22 01:35:12

by David Lechner

[permalink] [raw]
Subject: [PATCH v2 10/19] staging: iio: resolver: ad2s1210: add debugfs reg access

This add an implementation of debugfs_reg_access for the AD2S1210
driver.

Signed-off-by: David Lechner <[email protected]>
---
drivers/staging/iio/resolver/ad2s1210.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)

diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
index 3c81ee61b897..b99928394e3f 100644
--- a/drivers/staging/iio/resolver/ad2s1210.c
+++ b/drivers/staging/iio/resolver/ad2s1210.c
@@ -606,9 +606,29 @@ static int ad2s1210_initial(struct ad2s1210_state *st)
return ret;
}

+static int ad2s1210_debugfs_reg_access(struct iio_dev *indio_dev,
+ unsigned int reg, unsigned int writeval,
+ unsigned int *readval)
+{
+ struct ad2s1210_state *st = iio_priv(indio_dev);
+ int ret;
+
+ mutex_lock(&st->lock);
+
+ if (readval)
+ ret = regmap_read(st->regmap, reg, readval);
+ else
+ ret = regmap_write(st->regmap, reg, writeval);
+
+ mutex_unlock(&st->lock);
+
+ return ret;
+}
+
static const struct iio_info ad2s1210_info = {
.read_raw = ad2s1210_read_raw,
.attrs = &ad2s1210_attribute_group,
+ .debugfs_reg_access = &ad2s1210_debugfs_reg_access,
};

static int ad2s1210_setup_clocks(struct ad2s1210_state *st)
--
2.34.1

2023-09-22 01:53:32

by David Lechner

[permalink] [raw]
Subject: [PATCH v2 09/19] staging: iio: resolver: ad2s1210: use regmap for config registers

This makes use of the regmap API to read and write the configuration
registers. This simplifies code quite a bit and makes it safer
(previously, it was easy to write a bad value to the config registers
which causes the chip to lock up and need to be reset).

Signed-off-by: David Lechner <[email protected]>
---
drivers/staging/iio/resolver/ad2s1210.c | 251 ++++++++++++++----------
1 file changed, 149 insertions(+), 102 deletions(-)

diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
index 153ac7704ad7..3c81ee61b897 100644
--- a/drivers/staging/iio/resolver/ad2s1210.c
+++ b/drivers/staging/iio/resolver/ad2s1210.c
@@ -5,6 +5,7 @@
* Copyright (c) 2010-2010 Analog Devices Inc.
* Copyright (C) 2023 BayLibre, SAS
*/
+#include <linux/bits.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/device.h>
@@ -12,6 +13,7 @@
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
+#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/spi/spi.h>
#include <linux/sysfs.h>
@@ -22,21 +24,20 @@

#define DRV_NAME "ad2s1210"

+/* default value of control register on powerup */
#define AD2S1210_DEF_CONTROL 0x7E

-#define AD2S1210_MSB_IS_HIGH 0x80
-#define AD2S1210_MSB_IS_LOW 0x7F
-#define AD2S1210_PHASE_LOCK_RANGE_44 0x20
-#define AD2S1210_ENABLE_HYSTERESIS 0x10
-#define AD2S1210_SET_ENRES1 0x08
-#define AD2S1210_SET_ENRES0 0x04
-#define AD2S1210_SET_RES1 0x02
-#define AD2S1210_SET_RES0 0x01
-
-#define AD2S1210_SET_RESOLUTION (AD2S1210_SET_RES1 | AD2S1210_SET_RES0)
-
-#define AD2S1210_REG_POSITION 0x80
-#define AD2S1210_REG_VELOCITY 0x82
+/* control register flags */
+#define AD2S1210_ADDRESS_DATA BIT(7)
+#define AD2S1210_PHASE_LOCK_RANGE_44 BIT(5)
+#define AD2S1210_ENABLE_HYSTERESIS BIT(4)
+#define AD2S1210_SET_ENRES GENMASK(3, 2)
+#define AD2S1210_SET_RES GENMASK(1, 0)
+
+#define AD2S1210_REG_POSITION_MSB 0x80
+#define AD2S1210_REG_POSITION_LSB 0x81
+#define AD2S1210_REG_VELOCITY_MSB 0x82
+#define AD2S1210_REG_VELOCITY_LSB 0x83
#define AD2S1210_REG_LOS_THRD 0x88
#define AD2S1210_REG_DOS_OVR_THRD 0x89
#define AD2S1210_REG_DOS_MIS_THRD 0x8A
@@ -92,6 +93,8 @@ struct ad2s1210_state {
struct mutex lock;
struct spi_device *sdev;
struct gpio_desc *gpios[5];
+ /** Used to access config registers. */
+ struct regmap *regmap;
/** The external oscillator frequency in Hz. */
unsigned long fclkin;
unsigned int fexcit;
@@ -116,24 +119,51 @@ static inline void ad2s1210_set_mode(enum ad2s1210_mode mode,
st->mode = mode;
}

-/* write 1 bytes (address or data) to the chip */
-static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data)
+/*
+ * Writes the given data to the given register address.
+ *
+ * If the mode is configurable, the device will first be placed in
+ * configuration mode.
+ */
+static int ad2s1210_regmap_reg_write(void *context, unsigned int reg,
+ unsigned int val)
{
- int ret;
+ struct ad2s1210_state *st = context;
+ struct spi_transfer xfers[] = {
+ {
+ .len = 1,
+ .rx_buf = &st->rx[0],
+ .tx_buf = &st->tx[0],
+ .cs_change = 1,
+ }, {
+ .len = 1,
+ .rx_buf = &st->rx[1],
+ .tx_buf = &st->tx[1],
+ },
+ };
+
+ /* values can only be 7 bits, the MSB indicates an address */
+ if (val & ~0x7F)
+ return -EINVAL;
+
+ st->tx[0] = reg;
+ st->tx[1] = val;

ad2s1210_set_mode(MOD_CONFIG, st);
- st->tx[0] = data;
- ret = spi_write(st->sdev, st->tx, 1);
- if (ret < 0)
- return ret;

- return 0;
+ return spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers));
}

-/* read value from one of the registers */
-static int ad2s1210_config_read(struct ad2s1210_state *st,
- unsigned char address)
+/*
+ * Reads value from one of the registers.
+ *
+ * If the mode is configurable, the device will first be placed in
+ * configuration mode.
+ */
+static int ad2s1210_regmap_reg_read(void *context, unsigned int reg,
+ unsigned int *val)
{
+ struct ad2s1210_state *st = context;
struct spi_transfer xfers[] = {
{
.len = 1,
@@ -146,22 +176,34 @@ static int ad2s1210_config_read(struct ad2s1210_state *st,
.tx_buf = &st->tx[1],
},
};
- int ret = 0;
+ int ret;

ad2s1210_set_mode(MOD_CONFIG, st);
- st->tx[0] = address | AD2S1210_MSB_IS_HIGH;
+ st->tx[0] = reg;
+ /* Must be valid register address here otherwise this could write data.
+ * It doesn't matter which one.
+ */
st->tx[1] = AD2S1210_REG_FAULT;
- ret = spi_sync_transfer(st->sdev, xfers, 2);
+
+ ret = spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers));
if (ret < 0)
return ret;

- return st->rx[1];
+ /* If the D7 bit is set on any read/write register, it indicates a
+ * parity error. The fault register is read-only and the D7 bit means
+ * something else there.
+ */
+ if (reg != AD2S1210_REG_FAULT && st->rx[1] & AD2S1210_ADDRESS_DATA)
+ return -EBADMSG;
+
+ *val = st->rx[1];
+
+ return 0;
}

static inline
int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
{
- int ret;
unsigned char fcw;

fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
@@ -170,11 +212,7 @@ int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
return -ERANGE;
}

- ret = ad2s1210_config_write(st, AD2S1210_REG_EXCIT_FREQ);
- if (ret < 0)
- return ret;
-
- return ad2s1210_config_write(st, fcw);
+ return regmap_write(st->regmap, AD2S1210_REG_EXCIT_FREQ, fcw);
}

static const int ad2s1210_res_pins[4][2] = {
@@ -191,13 +229,7 @@ static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st)

static inline int ad2s1210_soft_reset(struct ad2s1210_state *st)
{
- int ret;
-
- ret = ad2s1210_config_write(st, AD2S1210_REG_SOFT_RESET);
- if (ret < 0)
- return ret;
-
- return ad2s1210_config_write(st, 0x0);
+ return regmap_write(st->regmap, AD2S1210_REG_SOFT_RESET, 0);
}

static ssize_t ad2s1210_show_fexcit(struct device *dev,
@@ -242,12 +274,13 @@ static ssize_t ad2s1210_show_control(struct device *dev,
char *buf)
{
struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
+ unsigned int value;
int ret;

mutex_lock(&st->lock);
- ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
+ ret = regmap_read(st->regmap, AD2S1210_REG_CONTROL, &value);
mutex_unlock(&st->lock);
- return ret < 0 ? ret : sprintf(buf, "0x%x\n", ret);
+ return ret < 0 ? ret : sprintf(buf, "0x%x\n", value);
}

static ssize_t ad2s1210_store_control(struct device *dev,
@@ -264,25 +297,13 @@ static ssize_t ad2s1210_store_control(struct device *dev,
return -EINVAL;

mutex_lock(&st->lock);
- ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
- if (ret < 0)
- goto error_ret;
- data = udata & AD2S1210_MSB_IS_LOW;
- ret = ad2s1210_config_write(st, data);
+ data = udata & ~AD2S1210_ADDRESS_DATA;
+ ret = regmap_write(st->regmap, AD2S1210_REG_CONTROL, data);
if (ret < 0)
goto error_ret;

- ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
- if (ret < 0)
- goto error_ret;
- if (ret & AD2S1210_MSB_IS_HIGH) {
- ret = -EIO;
- dev_err(dev,
- "ad2s1210: write control register fail\n");
- goto error_ret;
- }
st->resolution =
- ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
+ ad2s1210_resolution_value[data & AD2S1210_SET_RES];
ad2s1210_set_resolution_pin(st);
ret = len;
st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS);
@@ -315,30 +336,17 @@ static ssize_t ad2s1210_store_resolution(struct device *dev,
dev_err(dev, "ad2s1210: resolution out of range\n");
return -EINVAL;
}
+
+ data = (udata - 10) >> 1;
+
mutex_lock(&st->lock);
- ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
- if (ret < 0)
- goto error_ret;
- data = ret;
- data &= ~AD2S1210_SET_RESOLUTION;
- data |= (udata - 10) >> 1;
- ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
- if (ret < 0)
- goto error_ret;
- ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
+ ret = regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL,
+ AD2S1210_SET_RES, data);
if (ret < 0)
goto error_ret;
- ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
- if (ret < 0)
- goto error_ret;
- data = ret;
- if (data & AD2S1210_MSB_IS_HIGH) {
- ret = -EIO;
- dev_err(dev, "ad2s1210: setting resolution fail\n");
- goto error_ret;
- }
+
st->resolution =
- ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
+ ad2s1210_resolution_value[data & AD2S1210_SET_RES];
ad2s1210_set_resolution_pin(st);
ret = len;
error_ret:
@@ -351,13 +359,14 @@ static ssize_t ad2s1210_show_fault(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
+ unsigned int value;
int ret;

mutex_lock(&st->lock);
- ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
+ ret = regmap_read(st->regmap, AD2S1210_REG_FAULT, &value);
mutex_unlock(&st->lock);

- return (ret < 0) ? ret : sprintf(buf, "0x%02x\n", ret);
+ return ret < 0 ? ret : sprintf(buf, "0x%02x\n", value);
}

static ssize_t ad2s1210_clear_fault(struct device *dev,
@@ -366,6 +375,7 @@ static ssize_t ad2s1210_clear_fault(struct device *dev,
size_t len)
{
struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
+ unsigned int value;
int ret;

mutex_lock(&st->lock);
@@ -373,7 +383,7 @@ static ssize_t ad2s1210_clear_fault(struct device *dev,
/* delay (2 * tck + 20) nano seconds */
udelay(1);
gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
- ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
+ ret = regmap_read(st->regmap, AD2S1210_REG_FAULT, &value);
if (ret < 0)
goto error_ret;
gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
@@ -390,13 +400,14 @@ static ssize_t ad2s1210_show_reg(struct device *dev,
{
struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
+ unsigned int value;
int ret;

mutex_lock(&st->lock);
- ret = ad2s1210_config_read(st, iattr->address);
+ ret = regmap_read(st->regmap, iattr->address, &value);
mutex_unlock(&st->lock);

- return ret < 0 ? ret : sprintf(buf, "%d\n", ret);
+ return ret < 0 ? ret : sprintf(buf, "%d\n", value);
}

static ssize_t ad2s1210_store_reg(struct device *dev,
@@ -409,14 +420,11 @@ static ssize_t ad2s1210_store_reg(struct device *dev,
struct iio_dev_attr *iattr = to_iio_dev_attr(attr);

ret = kstrtou8(buf, 10, &data);
- if (ret)
+ if (ret < 0)
return -EINVAL;
+
mutex_lock(&st->lock);
- ret = ad2s1210_config_write(st, iattr->address);
- if (ret < 0)
- goto error_ret;
- ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
-error_ret:
+ ret = regmap_write(st->regmap, iattr->address, data);
mutex_unlock(&st->lock);
return ret < 0 ? ret : len;
}
@@ -583,23 +591,12 @@ static int ad2s1210_initial(struct ad2s1210_state *st)
mutex_lock(&st->lock);
ad2s1210_set_resolution_pin(st);

- ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
- if (ret < 0)
- goto error_ret;
- data = AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION);
+ data = AD2S1210_DEF_CONTROL & ~AD2S1210_SET_RES;
data |= (st->resolution - 10) >> 1;
- ret = ad2s1210_config_write(st, data);
- if (ret < 0)
- goto error_ret;
- ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
+ ret = regmap_write(st->regmap, AD2S1210_REG_CONTROL, data);
if (ret < 0)
goto error_ret;

- if (ret & AD2S1210_MSB_IS_HIGH) {
- ret = -EIO;
- goto error_ret;
- }
-
ret = ad2s1210_update_frequency_control_word(st);
if (ret < 0)
goto error_ret;
@@ -652,6 +649,52 @@ static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
return 0;
}

+static const struct regmap_range ad2s1210_regmap_readable_ranges[] = {
+ regmap_reg_range(AD2S1210_REG_POSITION_MSB, AD2S1210_REG_VELOCITY_LSB),
+ regmap_reg_range(AD2S1210_REG_LOS_THRD, AD2S1210_REG_LOT_LOW_THRD),
+ regmap_reg_range(AD2S1210_REG_EXCIT_FREQ, AD2S1210_REG_CONTROL),
+ regmap_reg_range(AD2S1210_REG_FAULT, AD2S1210_REG_FAULT),
+};
+
+static const struct regmap_access_table ad2s1210_regmap_rd_table = {
+ .yes_ranges = ad2s1210_regmap_readable_ranges,
+ .n_yes_ranges = ARRAY_SIZE(ad2s1210_regmap_readable_ranges),
+};
+
+static const struct regmap_range ad2s1210_regmap_writeable_ranges[] = {
+ regmap_reg_range(AD2S1210_REG_LOS_THRD, AD2S1210_REG_LOT_LOW_THRD),
+ regmap_reg_range(AD2S1210_REG_EXCIT_FREQ, AD2S1210_REG_CONTROL),
+ regmap_reg_range(AD2S1210_REG_SOFT_RESET, AD2S1210_REG_SOFT_RESET),
+ regmap_reg_range(AD2S1210_REG_FAULT, AD2S1210_REG_FAULT),
+};
+
+static const struct regmap_access_table ad2s1210_regmap_wr_table = {
+ .yes_ranges = ad2s1210_regmap_writeable_ranges,
+ .n_yes_ranges = ARRAY_SIZE(ad2s1210_regmap_writeable_ranges),
+};
+
+static int ad2s1210_setup_regmap(struct ad2s1210_state *st)
+{
+ struct device *dev = &st->sdev->dev;
+ const struct regmap_config config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .disable_locking = true,
+ .reg_read = ad2s1210_regmap_reg_read,
+ .reg_write = ad2s1210_regmap_reg_write,
+ .rd_table = &ad2s1210_regmap_rd_table,
+ .wr_table = &ad2s1210_regmap_wr_table,
+ .can_sleep = true,
+ };
+
+ st->regmap = devm_regmap_init(dev, NULL, st, &config);
+ if (IS_ERR(st->regmap))
+ return dev_err_probe(dev, PTR_ERR(st->regmap),
+ "failed to allocate register map\n");
+
+ return 0;
+}
+
static int ad2s1210_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
@@ -679,6 +722,10 @@ static int ad2s1210_probe(struct spi_device *spi)
if (ret < 0)
return ret;

+ ret = ad2s1210_setup_regmap(st);
+ if (ret < 0)
+ return ret;
+
ret = ad2s1210_initial(st);
if (ret < 0)
return ret;
--
2.34.1

2023-09-22 02:28:40

by David Lechner

[permalink] [raw]
Subject: [PATCH v2 02/19] staging: iio: Documentation: document IIO resolver AD2S1210 sysfs attributes

This adds documentation for the device-specific sysfs attributes of the
iio/resolver/ad2s1210 driver.

Signed-off-by: David Lechner <[email protected]>
---
.../sysfs-bus-iio-resolver-ad2s1210 | 109 ++++++++++++++++++
1 file changed, 109 insertions(+)
create mode 100644 drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210

diff --git a/drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210 b/drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210
new file mode 100644
index 000000000000..32890c85168e
--- /dev/null
+++ b/drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210
@@ -0,0 +1,109 @@
+What: /sys/bus/iio/devices/iio:deviceX/dos_mis_thrd
+KernelVersion: 6.7
+Contact: [email protected]
+Description:
+ Reading returns the current Degradation of Signal Mismatch
+ Threshold value. Writing sets the value. Valid values are 0 (0V)
+ to 127 (4.826V). To convert the value to volts, multiply by
+ 0.038.
+
+What: /sys/bus/iio/devices/iio:deviceX/dos_ovr_thrd
+KernelVersion: 6.7
+Contact: [email protected]
+Description:
+ Reading returns the current Degradation of Signal Overrange
+ Threshold value. Writing sets the value. Valid values are 0 (0V)
+ to 127 (4.826V). To convert the value to volts, multiply by
+ 0.038.
+
+What: /sys/bus/iio/devices/iio:deviceX/dos_rst_max_thrd
+KernelVersion: 6.7
+Contact: [email protected]
+Description:
+ Reading returns the current Degradation of Signal Reset Maximum
+ Threshold value. Writing sets the value. Valid values are 0 (0V)
+ to 127 (4.826V). To convert the value to volts, multiply by
+ 0.038.
+
+What: /sys/bus/iio/devices/iio:deviceX/dos_rst_min_thrd
+KernelVersion: 6.7
+Contact: [email protected]
+Description:
+ Reading returns the current Degradation of Signal Reset Minimum
+ Threshold value. Writing sets the value. Valid values are 0 (0V)
+ to 127 (4.826V). To convert the value to volts, multiply by
+ 0.038.
+
+What: /sys/bus/iio/devices/iio:deviceX/fault
+KernelVersion: 6.7
+Contact: [email protected]
+Description:
+ Reading returns a hex value containing the fault bit flags.
+
+ Bit Description
+ --- -----------
+ D7 Sine/cosine inputs clipped
+ D6 Sine/cosine inputs below LOS threshold
+ D5 Sine/cosine inputs exceed DOS overrange threshold
+ D4 Sine/cosine inputs exceed DOS mismatch threshold
+ D3 Tracking error exceeds LOT threshold
+ D2 Velocity exceeds maximum tracking rate
+ D1 Phase error exceeds phase lock range
+ D0 Configuration parity error
+
+ Writing any value will clear any fault conditions.
+
+What: /sys/bus/iio/devices/iio:deviceX/excitation_frequency
+KernelVersion: 6.7
+Contact: [email protected]
+Description:
+ Reading returns the current Excitation Frequency in Hz. Writing
+ sets the Excitation Frequency and performs a software reset on
+ the device to apply the change. Valid values are 2000 (2kHz) to
+ 20000 (20kHz).
+
+What: /sys/bus/iio/devices/iio:deviceX/los_thrd
+KernelVersion: 6.7
+Contact: [email protected]
+Description:
+ Reading returns the current Loss of Signal Reset Threshold
+ value. Writing sets the value. Valid values are 0 (0V) to
+ 127 (4.826V). To convert the value to volts, multiply by 0.038.
+
+What: /sys/bus/iio/devices/iio:deviceX/lot_high_thrd
+KernelVersion: 6.7
+Contact: [email protected]
+Description:
+ Reading returns the current Loss of Position Tracking Detection
+ High Threshold value. Writing sets the value. Valid values are
+ 0 (0 deg) to 127 (9/18/45 deg). The interpretation of the value
+ depends on the selected resolution. To convert the value to
+ degrees, multiply by 0.35 for 10-bit resolution, multiply by
+ 0.14 for 12-bit resolution or multiply by 0.09 for 14 and 16-bit
+ resolution.
+
+What: /sys/bus/iio/devices/iio:deviceX/lot_low_thrd
+KernelVersion: 6.7
+Contact: [email protected]
+Description:
+ Reading returns the current Loss of Position Tracking Detection
+ Low Threshold value. Writing sets the value. Valid values are
+ 0 (0 deg) to 127 (9/18/45 deg). The interpretation of the value
+ depends on the selected resolution. To convert the value to
+ degrees, multiply by 0.35 for 10-bit resolution, multiply by
+ 0.14 for 12-bit resolution or multiply by 0.09 for 14 and 16-bit
+ resolution.
+
+What: /sys/bus/iio/devices/iio:deviceX/phase_lock_range
+KernelVersion: 6.7
+Contact: [email protected]
+Description:
+ Reading returns the current Phase lock range in degrees. Writing
+ sets the value in the configuration register.
+
+What: /sys/bus/iio/devices/iio:deviceX/phase_lock_range_available
+KernelVersion: 6.7
+Contact: [email protected]
+Description:
+ Reading returns the possible values for the phase_lock_range
+ attribute, namely 44 and 360.
--
2.34.1

2023-09-22 02:47:37

by David Lechner

[permalink] [raw]
Subject: [PATCH v2 08/19] staging: iio: resolver: ad2s1210: use devicetree to get fclkin

This removes the fclkin sysfs attribute and replaces it with getting
the fclkin clock rate using the clk subsystem (i.e. from the
devicetree).

The fclkin clock comes from an external oscillator that is connected
directly to the AD2S1210 chip, so users of the sysfs attributes should
not need to be concerned with this.

Also sort includes while we are touching this.

Signed-off-by: David Lechner <[email protected]>
---
drivers/staging/iio/resolver/Kconfig | 1 +
drivers/staging/iio/resolver/ad2s1210.c | 76 +++++++++----------------
2 files changed, 28 insertions(+), 49 deletions(-)

diff --git a/drivers/staging/iio/resolver/Kconfig b/drivers/staging/iio/resolver/Kconfig
index 6d1e2622e0b0..bebb35822c9e 100644
--- a/drivers/staging/iio/resolver/Kconfig
+++ b/drivers/staging/iio/resolver/Kconfig
@@ -7,6 +7,7 @@ menu "Resolver to digital converters"
config AD2S1210
tristate "Analog Devices ad2s1210 driver"
depends on SPI
+ depends on COMMON_CLK
depends on GPIOLIB || COMPILE_TEST
help
Say yes here to build support for Analog Devices spi resolver
diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
index 95d43b241a75..153ac7704ad7 100644
--- a/drivers/staging/iio/resolver/ad2s1210.c
+++ b/drivers/staging/iio/resolver/ad2s1210.c
@@ -5,16 +5,17 @@
* Copyright (c) 2010-2010 Analog Devices Inc.
* Copyright (C) 2023 BayLibre, SAS
*/
-#include <linux/types.h>
-#include <linux/mutex.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
#include <linux/device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
#include <linux/of.h>
-#include <linux/spi/spi.h>
#include <linux/slab.h>
+#include <linux/spi/spi.h>
#include <linux/sysfs.h>
-#include <linux/delay.h>
-#include <linux/gpio/consumer.h>
-#include <linux/module.h>
+#include <linux/types.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
@@ -91,7 +92,8 @@ struct ad2s1210_state {
struct mutex lock;
struct spi_device *sdev;
struct gpio_desc *gpios[5];
- unsigned int fclkin;
+ /** The external oscillator frequency in Hz. */
+ unsigned long fclkin;
unsigned int fexcit;
bool hysteresis;
u8 resolution;
@@ -198,45 +200,6 @@ static inline int ad2s1210_soft_reset(struct ad2s1210_state *st)
return ad2s1210_config_write(st, 0x0);
}

-static ssize_t ad2s1210_show_fclkin(struct device *dev,
- struct device_attribute *attr,
- char *buf)
-{
- struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
-
- return sprintf(buf, "%u\n", st->fclkin);
-}
-
-static ssize_t ad2s1210_store_fclkin(struct device *dev,
- struct device_attribute *attr,
- const char *buf,
- size_t len)
-{
- struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
- unsigned int fclkin;
- int ret;
-
- ret = kstrtouint(buf, 10, &fclkin);
- if (ret)
- return ret;
- if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) {
- dev_err(dev, "ad2s1210: fclkin out of range\n");
- return -EINVAL;
- }
-
- mutex_lock(&st->lock);
- st->fclkin = fclkin;
-
- ret = ad2s1210_update_frequency_control_word(st);
- if (ret < 0)
- goto error_ret;
- ret = ad2s1210_soft_reset(st);
-error_ret:
- mutex_unlock(&st->lock);
-
- return ret < 0 ? ret : len;
-}
-
static ssize_t ad2s1210_show_fexcit(struct device *dev,
struct device_attribute *attr,
char *buf)
@@ -546,8 +509,6 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev,
return ret;
}

-static IIO_DEVICE_ATTR(fclkin, 0644,
- ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0);
static IIO_DEVICE_ATTR(fexcit, 0644,
ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0);
static IIO_DEVICE_ATTR(control, 0644,
@@ -596,7 +557,6 @@ static const struct iio_chan_spec ad2s1210_channels[] = {
};

static struct attribute *ad2s1210_attributes[] = {
- &iio_dev_attr_fclkin.dev_attr.attr,
&iio_dev_attr_fexcit.dev_attr.attr,
&iio_dev_attr_control.dev_attr.attr,
&iio_dev_attr_bits.dev_attr.attr,
@@ -654,6 +614,24 @@ static const struct iio_info ad2s1210_info = {
.attrs = &ad2s1210_attribute_group,
};

+static int ad2s1210_setup_clocks(struct ad2s1210_state *st)
+{
+ struct device *dev = &st->sdev->dev;
+ struct clk *clk;
+
+ clk = devm_clk_get_enabled(dev, NULL);
+ if (IS_ERR(clk))
+ return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");
+
+ st->fclkin = clk_get_rate(clk);
+ if (st->fclkin < AD2S1210_MIN_CLKIN || st->fclkin > AD2S1210_MAX_CLKIN)
+ return dev_err_probe(dev, -EINVAL,
+ "clock frequency out of range: %lu\n",
+ st->fclkin);
+
+ return 0;
+}
+
static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
{
struct spi_device *spi = st->sdev;
--
2.34.1

2023-09-22 14:37:04

by David Lechner

[permalink] [raw]
Subject: [PATCH v2 06/19] staging: iio: resolver: ad2s1210: always use 16-bit value for raw read

This removes the special handling for resolutions lower than 16 bits.
This will allow us to use a fixed scale independent of the resolution.

Also, for the record, according to the datasheet, the logic for the
special handling based on hysteresis that was removed was incorrect.

Signed-off-by: David Lechner <[email protected]>
---
drivers/staging/iio/resolver/ad2s1210.c | 16 ++--------------
1 file changed, 2 insertions(+), 14 deletions(-)

diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
index 9c7f76114360..985b8fecd65a 100644
--- a/drivers/staging/iio/resolver/ad2s1210.c
+++ b/drivers/staging/iio/resolver/ad2s1210.c
@@ -465,10 +465,7 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev,
long m)
{
struct ad2s1210_state *st = iio_priv(indio_dev);
- u16 negative;
int ret = 0;
- u16 pos;
- s16 vel;

mutex_lock(&st->lock);
gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
@@ -494,20 +491,11 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev,

switch (chan->type) {
case IIO_ANGL:
- pos = be16_to_cpup((__be16 *)st->rx);
- if (st->hysteresis)
- pos >>= 16 - st->resolution;
- *val = pos;
+ *val = be16_to_cpup((__be16 *)st->rx);
ret = IIO_VAL_INT;
break;
case IIO_ANGL_VEL:
- vel = be16_to_cpup((__be16 *)st->rx);
- vel >>= 16 - st->resolution;
- if (vel & 0x8000) {
- negative = (0xffff >> st->resolution) << st->resolution;
- vel |= negative;
- }
- *val = vel;
+ *val = (s16)be16_to_cpup((__be16 *)st->rx);
ret = IIO_VAL_INT;
break;
default:
--
2.34.1

2023-09-22 22:44:13

by Rob Herring (Arm)

[permalink] [raw]
Subject: Re: [PATCH v2 01/19] dt-bindings: iio: resolver: add devicetree bindings for ad2s1210


On Thu, 21 Sep 2023 09:43:42 -0500, David Lechner wrote:
> This adds new DeviceTree bindings for the Analog Devices, Inc. AD2S1210
> resolver-to-digital converter.
>
> Co-developed-by: Apelete Seketeli <[email protected]>
> Signed-off-by: Apelete Seketeli <[email protected]>
> Signed-off-by: David Lechner <[email protected]>
> ---
>
> v2 changes:
> * Add Co-developed-by:
> * Remove extraneous quotes on strings
> * Remove extraneous pipe on some multi-line descriptions
>
> .../bindings/iio/resolver/adi,ad2s1210.yaml | 150 ++++++++++++++++++
> 1 file changed, 150 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml
>

Reviewed-by: Rob Herring <[email protected]>

2023-09-24 16:57:41

by Jonathan Cameron

[permalink] [raw]
Subject: Re: [PATCH v2 00/19] iio: resolver: move ad2s1210 out of staging

On Thu, 21 Sep 2023 09:43:41 -0500
David Lechner <[email protected]> wrote:

> Resending v2 with proper `PATCH v2` prefix.
>
> Changes since v1:
> * Address initial device tree patch feedback
> * Drop "iio: sysfs: add IIO_DEVICE_ATTR_NAMED_RW macro" (related cleanups
> also dropped for now, will address in a future series if needed)
> * Apply improvements as a series as patches to the staging driver. It is not
> quite ready for the move out of staging patch yet.
>
> This series has been tested on actual hardware using a EVAL-AD2S1210 evaluation
> board. (Note: not all device tree features have been implemented in the driver
> since the eval board doesn't support them out of the box. We plan to add them
> later if needed.)

Thanks for breaking it up.

>
> One thing left over from the staging driver that probably needs more attention
> still is the fault handling (both the fault threshold attributes and how
> userspace gets notified of fault conditions). We considered adding these as
> events, but the fault conditions are related to internal measurements in the
> chip that aren't available as channels.
>
> Since the chip is designed to read the fault register each time we read the
> data registers for one of the two channels it seems like faults should be
> associated with channels one way or another. Would it make sense to add extra
> channels for the internal signals that only have fault events (mostly with
> IIO_EV_TYPE_THRESH)? Or would it make sense to add a new "flags" channel type
> where the "raw" value is bit flags? Or something else?

Fault reporting is a continuing problem across all similar subsystems.
Every now and then there is a discussion about something 'generic' as
in most cases you want faults to surface separately from the main datastream.
Unfortunately no one ever did more than talk about it as far as I know.

I'm not keen on the flags channel because it's effectively custom to a particular
driver. Describing the various possible bits in a way generic software can
interpret them is really challenging. Faults tend to be a lot less 'consistent
in form' than actual data. You are correct that at least some of these
could be mapped to channels though.

>
> Here is the table of available faults for context. Sine/cosine inputs are
> internal signals.

Some of these we could consider 'normal' events.
>
> | Bit | Description
> +-----+------------
> | D7 | Sine/cosine inputs clipped

Not really related to any channel. It's pushing the boundaries
a little but you could add an alternating voltage channel and
describe this as a threshold being crossed on that. It's a bit
of a stretch but it is something existing tooling should handle
even if it's not easy to interpret the error.

> | D6 | Sine/cosine inputs below LOS threshold
Also a threshold on the input alternative voltage channel.
Problem here is that IIO only supports one threshold. So you
would need to figure out how to handle this vs the clip detection.

> | D5 | Sine/cosine inputs exceed DOS overrange threshold
Not 100% sure I understood this one right, but could it be considered
an over threshold condition?
> | D4 | Sine/cosine inputs exceed DOS mismatch threshold
My knowledge of resolvers is a little limited, but this could
be considered an event on a differential channel (between
sine and cosine inputs.

> | D3 | Tracking error exceeds LOT threshold
Not sure if this one is expected to occur except at reset.
It describes it as result of a step change in rotational position
which feels like something that doesn't happen other than when
device is reset... Could be wrong though!

> | D2 | Velocity exceeds maximum tracking rate
This one is I think just a threshold on velocity matching what the
hardware is capable of.

> | D1 | Phase error exceeds phase lock range


> | D0 | Configuration parity error
This one has nothing to do with the data. I'd spit a log message
out if you see it. Chances are device is dead. You 'could' keep
a cache of what you think should be in the registers and try
a full reset and re configuration. Like any other parity error
though you will want to have something watching for repeats that
mean the part needs replacing.

>
> David Lechner (19):
> dt-bindings: iio: resolver: add devicetree bindings for ad2s1210
> staging: iio: Documentation: document IIO resolver AD2S1210 sysfs
> attributes
> staging: iio: resolver: ad2s1210: fix ad2s1210_show_fault
> staging: iio: resolver: ad2s1210: fix not restoring sample gpio in
> channel read
> staging: iio: resolver: ad2s1210: fix probe
> staging: iio: resolver: ad2s1210: always use 16-bit value for raw read
> staging: iio: resolver: ad2s1210: implement IIO_CHAN_INFO_SCALE
> staging: iio: resolver: ad2s1210: use devicetree to get fclkin
> staging: iio: resolver: ad2s1210: use regmap for config registers
> staging: iio: resolver: ad2s1210: add debugfs reg access
> staging: iio: resolver: ad2s1210: remove config attribute
> staging: iio: resolver: ad2s1210: rework gpios
> staging: iio: resolver: ad2s1210: implement hysteresis as channel attr
> staging: iio: resolver: ad2s1210: refactor setting excitation
> frequency
> staging: iio: resolver: ad2s1210: read excitation frequency from
> control register
> staging: iio: resolver: ad2s1210: rename fexcit attribute
> staging: iio: resolver: ad2s1210: convert resolution to devicetree
> property
> staging: iio: resolver: ad2s1210: add phase_lock_range attributes
> staging: iio: resolver: ad2s1210: add triggered buffer support
>
> .../bindings/iio/resolver/adi,ad2s1210.yaml | 150 +++
> .../sysfs-bus-iio-resolver-ad2s1210 | 109 ++
> drivers/staging/iio/resolver/Kconfig | 1 +
> drivers/staging/iio/resolver/ad2s1210.c | 948 +++++++++++-------
> 4 files changed, 857 insertions(+), 351 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml
> create mode 100644 drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210
>

2023-09-24 16:58:06

by Jonathan Cameron

[permalink] [raw]
Subject: Re: [PATCH v2 01/19] dt-bindings: iio: resolver: add devicetree bindings for ad2s1210

On Thu, 21 Sep 2023 09:43:42 -0500
David Lechner <[email protected]> wrote:

> This adds new DeviceTree bindings for the Analog Devices, Inc. AD2S1210
> resolver-to-digital converter.
>
> Co-developed-by: Apelete Seketeli <[email protected]>
> Signed-off-by: Apelete Seketeli <[email protected]>
> Signed-off-by: David Lechner <[email protected]>

We've become more fussy about it recently but for new bindings at least,
we want to include all power supplies and mark them as required.

A few other trivial things inline,

Jonathan


> ---
>
> v2 changes:
> * Add Co-developed-by:
> * Remove extraneous quotes on strings
> * Remove extraneous pipe on some multi-line descriptions
>
> .../bindings/iio/resolver/adi,ad2s1210.yaml | 150 ++++++++++++++++++
> 1 file changed, 150 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml
>
> diff --git a/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml b/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml
> new file mode 100644
> index 000000000000..f55c9652cfb7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml
> @@ -0,0 +1,150 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/resolver/adi,ad2s1210.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Analog Devices AD2S1210 Resolver-to-Digital Converter
> +
> +maintainers:
> + - Michael Hennerich <[email protected]>
> +
> +description: |
> + The AD2S1210 is a complete 10-bit to 16-bit resolution tracking
> + resolver-to-digital converter, integrating an on-board programmable
> + sinusoidal oscillator that provides sine wave excitation for
> + resolvers.
> +
> + The AD2S1210 allows the user to read the angular position or the
> + angular velocity data directly from the parallel outputs or through
> + the serial interface.
> +
> + A1 A0 Result

Should say what A0 and A1 are. It's down below but seems odd
that it is here for RES0 and RES1 but not the A1 and A0 signals.

> + 0 0 Normal mode - position output
> + 0 1 Normal mode - velocity output
> + 1 0 Reserved
> + 1 1 Configuration mode
> +
> + In normal mode, the resolution of the digital output is selected using
> + the RES0 and RES1 input pins. In configuration mode, the resolution is
> + selected by setting the RES0 and RES1 bits in the control register.
> +
> + RES1 RES0 Resolution (Bits)
> + 0 0 10
> + 0 1 12
> + 1 0 14
> + 1 1 16
> +
> + Note on SPI connections: The CS line on the AD2S1210 should hard-wired to
> + logic low and the WR/FSYNC line on the AD2S1210 should be connected to the
> + SPI CSn output of the SPI controller.

That is impressively random ;) Good to call it out.

> +
> + Datasheet:
> + https://www.analog.com/media/en/technical-documentation/data-sheets/ad2s1210.pdf
> +
> +properties:
> + compatible:
> + const: adi,ad2s1210
> +
> + reg:
> + maxItems: 1
> +
> + spi-max-frequency:
> + maximum: 25000000
> +
> + spi-cpha: true
> +
> + clocks:
> + maxItems: 1
> + description: External oscillator clock (CLKIN).
> +
> + reset-gpios:
> + description:
> + GPIO connected to the /RESET pin. As the line needs to be low for the
> + reset to be active, it should be configured as GPIO_ACTIVE_LOW.
> + maxItems: 1
> +
> + sample-gpios:
> + description:
> + GPIO connected to the /SAMPLE pin. As the line needs to be low to trigger
> + a sample, it should be configured as GPIO_ACTIVE_LOW.
> + maxItems: 1
> +
> + mode-gpios:
> + description:
> + GPIO lines connected to the A0 and A1 pins. These pins select the data
> + transfer mode.
> + minItems: 2
> + maxItems: 2
> +
> + resolution-gpios:
> + description:
> + GPIO lines connected to the RES0 and RES1 pins. These pins select the
> + resolution of the digital output. If omitted, it is assumed that the
> + RES0 and RES1 pins are hard-wired to match the assigned-resolution-bits
> + property.
> + minItems: 2
> + maxItems: 2
> +
> + fault-gpios:
> + description:
> + GPIO lines connected to the LOT and DOS pins. These pins combined indicate
> + the type of fault present, if any. As these pins a pulled low to indicate
> + a fault condition, they should be configured as GPIO_ACTIVE_LOW.

What if someone is being odd and connected only 1 of them?
It's annoying how often people run out of pins and do things like this.

> + minItems: 2
> + maxItems: 2
> +
> + adi,fixed-mode:
> + description:
> + This is used to indicate the selected mode if A0 and A1 are hard-wired
> + instead of connected to GPIOS (i.e. mode-gpios is omitted).
> + $ref: /schemas/types.yaml#/definitions/string
> + enum: [config, velocity, position]
> +
> + assigned-resolution-bits:
> + description:
> + Resolution of the digital output required by the application. This
> + determines the precision of the angle and/or the maximum speed that can
> + be measured. If resolution-gpios is omitted, it is assumed that RES0 and
> + RES1 are hard-wired to match this value.
> + enum: [10, 12, 14, 16]

Good description as this was non obvious.

> +
> +required:
> + - compatible
> + - reg
> + - spi-cpha
> + - clocks
> + - sample-gpios
> + - assigned-resolution-bits
> +
> +oneOf:
> + - required:
> + - mode-gpios
> + - required:
> + - adi,fixed-mode
I think this allows for both. It's fiddlier to exclude that but would be a nice
to have perhaps rather than relying on text above that says 'don't do it'.

> +
> +allOf:
> + - $ref: /schemas/spi/spi-peripheral-props.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/gpio/gpio.h>
> +
> + spi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + resolver@0 {
> + compatible = "adi,ad2s1210";
> + reg = <0>;
> + spi-max-frequency = <20000000>;
> + spi-cpha;
> + clocks = <&ext_osc>;
> + sample-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>;
> + mode-gpios = <&gpio0 86 0>, <&gpio0 87 0>;
> + resolution-gpios = <&gpio0 88 0>, <&gpio0 89 0>;
> + assigned-resolution-bits = <16>;
> + };
> + };

2023-09-24 17:15:28

by Jonathan Cameron

[permalink] [raw]
Subject: Re: [PATCH v2 02/19] staging: iio: Documentation: document IIO resolver AD2S1210 sysfs attributes

On Thu, 21 Sep 2023 09:43:43 -0500
David Lechner <[email protected]> wrote:

> This adds documentation for the device-specific sysfs attributes of the
> iio/resolver/ad2s1210 driver.
>
> Signed-off-by: David Lechner <[email protected]>

Hi David,

I'm fine with carrying these docs in staging, but I think we need to resolve
mapping as many of these as possible to standard ABI if we can for
all the normal reasons about software having no idea how to deal
with custom ABI.

Anyhow, I'll use this as an opportunity to comment on the individual
files.



> ---
> .../sysfs-bus-iio-resolver-ad2s1210 | 109 ++++++++++++++++++
> 1 file changed, 109 insertions(+)
> create mode 100644 drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210
>
> diff --git a/drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210 b/drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210
> new file mode 100644
> index 000000000000..32890c85168e
> --- /dev/null
> +++ b/drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210
> @@ -0,0 +1,109 @@
> +What: /sys/bus/iio/devices/iio:deviceX/dos_mis_thrd
> +KernelVersion: 6.7
> +Contact: [email protected]
> +Description:
> + Reading returns the current Degradation of Signal Mismatch
> + Threshold value. Writing sets the value. Valid values are 0 (0V)
> + to 127 (4.826V). To convert the value to volts, multiply by
> + 0.038.

I mention in the cover letter, but I wonder if we can map this to a threshold
on a differential channel between the cosine and sine channels (use labels for
the channels to identify them). It's a stretch but perhaps better than
completely custom as at least we have event tooling to read it.

If nothing else we need these to have standard units and the
unit to be obvious from the name. Voltages in IIO are mV (because
we copied hwmon a long time back)

> +
> +What: /sys/bus/iio/devices/iio:deviceX/dos_ovr_thrd
> +KernelVersion: 6.7
> +Contact: [email protected]
> +Description:
> + Reading returns the current Degradation of Signal Overrange
> + Threshold value. Writing sets the value. Valid values are 0 (0V)
> + to 127 (4.826V). To convert the value to volts, multiply by
> + 0.038.
Not clear what this actually is to me, but it's a threshold on something!
Probably two channels which is always a pain as we'll have indicate two events
if they are enabled.

> +
> +What: /sys/bus/iio/devices/iio:deviceX/dos_rst_max_thrd
> +KernelVersion: 6.7
> +Contact: [email protected]
> +Description:
> + Reading returns the current Degradation of Signal Reset Maximum
> + Threshold value. Writing sets the value. Valid values are 0 (0V)
> + to 127 (4.826V). To convert the value to volts, multiply by
> + 0.038.

No idea what this one is. What does 'reset' have to do with it?
Ah I went and looked. This is the reset value used for the running maximum / minimum
values. They matter because they fault detection is difference between the values
and if we say init the minimum to lower than actually seen that will make the
error more likely (I think!).

So not sure what we map this to. Maybe this just has to be custom ABI but
it should be associated with the threshold event - though I'd not registered
that's on a running minimum and maximum rather than some 'windowed' version
for recent values...

> +
> +What: /sys/bus/iio/devices/iio:deviceX/dos_rst_min_thrd
> +KernelVersion: 6.7
> +Contact: [email protected]
> +Description:
> + Reading returns the current Degradation of Signal Reset Minimum
> + Threshold value. Writing sets the value. Valid values are 0 (0V)
> + to 127 (4.826V). To convert the value to volts, multiply by
> + 0.038.
> +
> +What: /sys/bus/iio/devices/iio:deviceX/fault

This fails the sniff test for a sysfs attribute giving multiple things.
If we do use this sort of reporting rather than an event, maybe a fault
directory (sysfs group) with 8 files in it.
> +KernelVersion: 6.7
> +Contact: [email protected]
> +Description:
> + Reading returns a hex value containing the fault bit flags.
> +
> + Bit Description
> + --- -----------
> + D7 Sine/cosine inputs clipped
> + D6 Sine/cosine inputs below LOS threshold
> + D5 Sine/cosine inputs exceed DOS overrange threshold
> + D4 Sine/cosine inputs exceed DOS mismatch threshold
> + D3 Tracking error exceeds LOT threshold
> + D2 Velocity exceeds maximum tracking rate
> + D1 Phase error exceeds phase lock range
> + D0 Configuration parity error
> +
> + Writing any value will clear any fault conditions.
> +
> +What: /sys/bus/iio/devices/iio:deviceX/excitation_frequency

Hmm. I though we already had this. Turns up in various types of device.
But nope, can't find it. I'm fine with this one being added to the main ABI.

> +KernelVersion: 6.7
> +Contact: [email protected]
> +Description:
> + Reading returns the current Excitation Frequency in Hz. Writing
> + sets the Excitation Frequency and performs a software reset on
> + the device to apply the change. Valid values are 2000 (2kHz) to
> + 20000 (20kHz).
> +
> +What: /sys/bus/iio/devices/iio:deviceX/los_thrd
> +KernelVersion: 6.7
> +Contact: [email protected]
> +Description:
> + Reading returns the current Loss of Signal Reset Threshold
> + value. Writing sets the value. Valid values are 0 (0V) to
> + 127 (4.826V). To convert the value to volts, multiply by 0.038.
> +
> +What: /sys/bus/iio/devices/iio:deviceX/lot_high_thrd
> +KernelVersion: 6.7
> +Contact: [email protected]
> +Description:
> + Reading returns the current Loss of Position Tracking Detection
> + High Threshold value. Writing sets the value. Valid values are
> + 0 (0 deg) to 127 (9/18/45 deg). The interpretation of the value
> + depends on the selected resolution. To convert the value to
> + degrees, multiply by 0.35 for 10-bit resolution, multiply by
> + 0.14 for 12-bit resolution or multiply by 0.09 for 14 and 16-bit
> + resolution.
> +
> +What: /sys/bus/iio/devices/iio:deviceX/lot_low_thrd
> +KernelVersion: 6.7
> +Contact: [email protected]
> +Description:
> + Reading returns the current Loss of Position Tracking Detection
> + Low Threshold value. Writing sets the value. Valid values are
> + 0 (0 deg) to 127 (9/18/45 deg). The interpretation of the value
> + depends on the selected resolution. To convert the value to
> + degrees, multiply by 0.35 for 10-bit resolution, multiply by
> + 0.14 for 12-bit resolution or multiply by 0.09 for 14 and 16-bit
> + resolution.
> +
> +What: /sys/bus/iio/devices/iio:deviceX/phase_lock_range

For what it's worth Phases in IIO (phase_raw in ABI docs) are defined
in radians so this will want to be appropriately scaled if we keep it around.

This one feels like a threshold on phase which is already in the IIO ABI
(for 3 phase power monitors IIRC)

Jonathan


> +KernelVersion: 6.7
> +Contact: [email protected]
> +Description:
> + Reading returns the current Phase lock range in degrees. Writing
> + sets the value in the configuration register.
> +
> +What: /sys/bus/iio/devices/iio:deviceX/phase_lock_range_available
> +KernelVersion: 6.7
> +Contact: [email protected]
> +Description:
> + Reading returns the possible values for the phase_lock_range
> + attribute, namely 44 and 360.

2023-09-24 17:26:13

by Jonathan Cameron

[permalink] [raw]
Subject: Re: [PATCH v2 05/19] staging: iio: resolver: ad2s1210: fix probe

On Thu, 21 Sep 2023 09:43:46 -0500
David Lechner <[email protected]> wrote:

> This fixes a number of issues in the ad2s1210_probe() function:
> - Move call to ad2s1210_setup_gpios() after `st->sdev = spi;`. This
> fixes use of this pointer before it is initialized.
> - Check return value on ad2s1210_initial().
Should mention moving it as well.
> - Move devm_iio_device_register() to the end to avoid race of
> registering before fully initialized.
> - Remove call to spi_setup(). Note: MODE_3 was incorrect, it should be
> MODE_1 but we can let the device tree select this.
> - Change default value for fclkin. This is an external oscillator, not
> the SPI bus clock. (Will use device tree to get the correct value
> in a future patch. For now, using the eval board value.)
> - Remove spi_set_drvdata().

Hmm. This is a lot of different things. I'd prefer it more split up
as a few of these are not completely trivial.

>
> Signed-off-by: David Lechner <[email protected]>

I think the patch split up broke on this one...

> ---
> drivers/staging/iio/resolver/ad2s1210.c | 30 ++++++++++++-------------
> 1 file changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
> index 0bdd5a30d45d..9c7f76114360 100644
> --- a/drivers/staging/iio/resolver/ad2s1210.c
> +++ b/drivers/staging/iio/resolver/ad2s1210.c
> @@ -3,6 +3,7 @@
> * ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210
> *
> * Copyright (c) 2010-2010 Analog Devices Inc.
> + * Copyright (C) 2023 BayLibre, SAS

Bit early to justify that, but I'm fine with it anyway as it will soon
be justified!

> */
> #include <linux/types.h>
> #include <linux/mutex.h>
> @@ -657,12 +658,8 @@ static int ad2s1210_probe(struct spi_device *spi)
> indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
> if (!indio_dev)
> return -ENOMEM;
> - st = iio_priv(indio_dev);
> - ret = ad2s1210_setup_gpios(st);
> - if (ret < 0)
> - return ret;
>
> - spi_set_drvdata(spi, indio_dev);

Looks fine, but unconnected to the rest of this patch.

> + st = iio_priv(indio_dev);
>
> mutex_init(&st->lock);
> st->sdev = spi;
> @@ -671,22 +668,25 @@ static int ad2s1210_probe(struct spi_device *spi)
> st->resolution = 12;
> st->fexcit = AD2S1210_DEF_EXCIT;
>
> + ret = ad2s1210_setup_clocks(st);

doesn't exist yet.

> + if (ret < 0)
> + return ret;
> +
> + ret = ad2s1210_setup_gpios(st);

> + if (ret < 0)
> + return ret;
> +
> + ret = ad2s1210_initial(st);
> + if (ret < 0)
> + return ret;
> +
> indio_dev->info = &ad2s1210_info;
> indio_dev->modes = INDIO_DIRECT_MODE;
> indio_dev->channels = ad2s1210_channels;
> indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels);
> indio_dev->name = spi_get_device_id(spi)->name;
>
> - ret = devm_iio_device_register(&spi->dev, indio_dev);
> - if (ret)
> - return ret;
> -
> - st->fclkin = spi->max_speed_hz;
> - spi->mode = SPI_MODE_3;
> - spi_setup(spi);
> - ad2s1210_initial(st);
> -
> - return 0;
> + return devm_iio_device_register(&spi->dev, indio_dev);
> }
>
> static const struct of_device_id ad2s1210_of_match[] = {

2023-09-24 17:32:26

by Jonathan Cameron

[permalink] [raw]
Subject: Re: [PATCH v2 06/19] staging: iio: resolver: ad2s1210: always use 16-bit value for raw read

On Thu, 21 Sep 2023 09:43:47 -0500
David Lechner <[email protected]> wrote:

> This removes the special handling for resolutions lower than 16 bits.
> This will allow us to use a fixed scale independent of the resolution.
>
> Also, for the record, according to the datasheet, the logic for the
> special handling based on hysteresis that was removed was incorrect.
>
> Signed-off-by: David Lechner <[email protected]>
This looks fine to me, but a potential improvement would be to just
use a __be16 element in st in the first place have the type explicitly
marked all the way through.

Jonathan


> ---
> drivers/staging/iio/resolver/ad2s1210.c | 16 ++--------------
> 1 file changed, 2 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
> index 9c7f76114360..985b8fecd65a 100644
> --- a/drivers/staging/iio/resolver/ad2s1210.c
> +++ b/drivers/staging/iio/resolver/ad2s1210.c
> @@ -465,10 +465,7 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev,
> long m)
> {
> struct ad2s1210_state *st = iio_priv(indio_dev);
> - u16 negative;
> int ret = 0;
> - u16 pos;
> - s16 vel;
>
> mutex_lock(&st->lock);
> gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
> @@ -494,20 +491,11 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev,
>
> switch (chan->type) {
> case IIO_ANGL:
> - pos = be16_to_cpup((__be16 *)st->rx);
> - if (st->hysteresis)
> - pos >>= 16 - st->resolution;
> - *val = pos;
> + *val = be16_to_cpup((__be16 *)st->rx);

Could be made more obvious still by adding as suitable __be16 to read into in the
first place.

> ret = IIO_VAL_INT;
> break;
> case IIO_ANGL_VEL:
> - vel = be16_to_cpup((__be16 *)st->rx);
> - vel >>= 16 - st->resolution;
> - if (vel & 0x8000) {
> - negative = (0xffff >> st->resolution) << st->resolution;
> - vel |= negative;
> - }
> - *val = vel;
> + *val = (s16)be16_to_cpup((__be16 *)st->rx);
> ret = IIO_VAL_INT;
> break;
> default:

2023-09-24 17:40:14

by Jonathan Cameron

[permalink] [raw]
Subject: Re: [PATCH v2 07/19] staging: iio: resolver: ad2s1210: implement IIO_CHAN_INFO_SCALE

On Thu, 21 Sep 2023 09:43:48 -0500
David Lechner <[email protected]> wrote:

> This adds an implementation of IIO_CHAN_INFO_SCALE to the ad2s1210
> resolver driver. This allows userspace to get the scale factor for the
> raw values.
>
> Signed-off-by: David Lechner <[email protected]>

A few comments on how to avoid the increasing code complexity.

Jonathan

> ---
> drivers/staging/iio/resolver/ad2s1210.c | 107 ++++++++++++++++--------
> 1 file changed, 72 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
> index 985b8fecd65a..95d43b241a75 100644
> --- a/drivers/staging/iio/resolver/ad2s1210.c
> +++ b/drivers/staging/iio/resolver/ad2s1210.c
> @@ -458,56 +458,91 @@ static ssize_t ad2s1210_store_reg(struct device *dev,
> return ret < 0 ? ret : len;
> }
>
> +static const int ad2s1210_velocity_scale[] = {
> + 17089132, /* 8.192MHz / (2*pi * 2500 / 2^15) */
> + 42722830, /* 8.192MHz / (2*pi * 1000 / 2^15) */
> + 85445659, /* 8.192MHz / (2*pi * 500 / 2^15) */
> + 341782638, /* 8.192MHz / (2*pi * 125 / 2^15) */
> +};
> +
> static int ad2s1210_read_raw(struct iio_dev *indio_dev,
> struct iio_chan_spec const *chan,
> int *val,
> int *val2,
> - long m)
> + long mask)

:( It hasn't been a mask for a long time, but we've not fixed the naming.

I guess this doesn't make it anyway worse though.

> {
> struct ad2s1210_state *st = iio_priv(indio_dev);
> int ret = 0;
>
> - mutex_lock(&st->lock);
> - gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
> - /* delay (6 * tck + 20) nano seconds */
> - udelay(1);
> + switch (mask) {
> + case IIO_CHAN_INFO_RAW:
> + mutex_lock(&st->lock);
> + gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
> + /* delay (6 * tck + 20) nano seconds */
> + udelay(1);
> +
> + switch (chan->type) {
> + case IIO_ANGL:
> + ad2s1210_set_mode(MOD_POS, st);
> + break;
> + case IIO_ANGL_VEL:
> + ad2s1210_set_mode(MOD_VEL, st);
> + break;
> + default:
> + ret = -EINVAL;
> + break;
> + }
> + if (ret < 0)
> + goto error_info_raw;
> + ret = spi_read(st->sdev, st->rx, 2);
> + if (ret < 0)
> + goto error_info_raw;
> +
> + switch (chan->type) {
> + case IIO_ANGL:
> + *val = be16_to_cpup((__be16 *)st->rx);
> + ret = IIO_VAL_INT;
> + break;
> + case IIO_ANGL_VEL:
> + *val = (s16)be16_to_cpup((__be16 *)st->rx);
> + ret = IIO_VAL_INT;
> + break;
> + default:
> + ret = -EINVAL;
> + break;
> + }
>
> - switch (chan->type) {
> - case IIO_ANGL:
> - ad2s1210_set_mode(MOD_POS, st);
> - break;
> - case IIO_ANGL_VEL:
> - ad2s1210_set_mode(MOD_VEL, st);
> - break;
> - default:
> - ret = -EINVAL;
> +error_info_raw:
> + gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
> + /* delay (2 * tck + 20) nano seconds */
> + udelay(1);
> + mutex_unlock(&st->lock);
I'm not a great fan of code that does gotos within a switch
block if we can avoid it - I find them hard to review. Perhaps
it's time to factor out the channel reading code into a small
function which can return directly, leaving just the lock manipulation
and gpio manipulation out here. The function is getting too long
and complicated anyway so that is another justification for splitting it up.


> break;
> - }
> - if (ret < 0)
> - goto error_ret;
> - ret = spi_read(st->sdev, st->rx, 2);
> - if (ret < 0)
> - goto error_ret;
>
> - switch (chan->type) {
> - case IIO_ANGL:
> - *val = be16_to_cpup((__be16 *)st->rx);
> - ret = IIO_VAL_INT;
> - break;
> - case IIO_ANGL_VEL:
> - *val = (s16)be16_to_cpup((__be16 *)st->rx);
> - ret = IIO_VAL_INT;
> + case IIO_CHAN_INFO_SCALE:
> + switch (chan->type) {
> + case IIO_ANGL:
> + /* approx 0.3 arc min converted to radians */
> + *val = 0;
> + *val2 = 95874;
> + ret = IIO_VAL_INT_PLUS_NANO;
For these, why not return directly? Gives more readable code if
you are following particular paths as no need to go see where
we end up up after here as nothing else to do.


> + break;
> + case IIO_ANGL_VEL:
> + *val = st->fclkin;
> + *val2 = ad2s1210_velocity_scale[st->resolution];
> + ret = IIO_VAL_FRACTIONAL;
> + break;
> + default:
> + ret = -EINVAL;
> + break;
> + }
> break;
> +
> default:
> ret = -EINVAL;
> break;
> }
>
> -error_ret:
> - gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
> - /* delay (2 * tck + 20) nano seconds */
> - udelay(1);
> - mutex_unlock(&st->lock);
> return ret;
> }
>
> @@ -549,12 +584,14 @@ static const struct iio_chan_spec ad2s1210_channels[] = {
> .type = IIO_ANGL,
> .indexed = 1,
> .channel = 0,
> - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
> + BIT(IIO_CHAN_INFO_SCALE),
> }, {
> .type = IIO_ANGL_VEL,
> .indexed = 1,
> .channel = 0,
> - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
> + BIT(IIO_CHAN_INFO_SCALE),
> }
> };
>

2023-09-24 17:44:16

by Jonathan Cameron

[permalink] [raw]
Subject: Re: [PATCH v2 08/19] staging: iio: resolver: ad2s1210: use devicetree to get fclkin

On Thu, 21 Sep 2023 09:43:49 -0500
David Lechner <[email protected]> wrote:

> This removes the fclkin sysfs attribute and replaces it with getting
> the fclkin clock rate using the clk subsystem (i.e. from the
> devicetree).
>
> The fclkin clock comes from an external oscillator that is connected
> directly to the AD2S1210 chip, so users of the sysfs attributes should
> not need to be concerned with this.
>
> Also sort includes while we are touching this.
>
> Signed-off-by: David Lechner <[email protected]>
> ---
> drivers/staging/iio/resolver/Kconfig | 1 +
> drivers/staging/iio/resolver/ad2s1210.c | 76 +++++++++----------------
> 2 files changed, 28 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/staging/iio/resolver/Kconfig b/drivers/staging/iio/resolver/Kconfig
> index 6d1e2622e0b0..bebb35822c9e 100644
> --- a/drivers/staging/iio/resolver/Kconfig
> +++ b/drivers/staging/iio/resolver/Kconfig
> @@ -7,6 +7,7 @@ menu "Resolver to digital converters"
> config AD2S1210
> tristate "Analog Devices ad2s1210 driver"
> depends on SPI
> + depends on COMMON_CLK
> depends on GPIOLIB || COMPILE_TEST
> help
> Say yes here to build support for Analog Devices spi resolver
> diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
> index 95d43b241a75..153ac7704ad7 100644
> --- a/drivers/staging/iio/resolver/ad2s1210.c
> +++ b/drivers/staging/iio/resolver/ad2s1210.c
> @@ -5,16 +5,17 @@
> * Copyright (c) 2010-2010 Analog Devices Inc.
> * Copyright (C) 2023 BayLibre, SAS
> */
> -#include <linux/types.h>
> -#include <linux/mutex.h>
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> #include <linux/device.h>
> +#include <linux/gpio/consumer.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> #include <linux/of.h>
> -#include <linux/spi/spi.h>
> #include <linux/slab.h>
> +#include <linux/spi/spi.h>
> #include <linux/sysfs.h>
> -#include <linux/delay.h>
> -#include <linux/gpio/consumer.h>
> -#include <linux/module.h>
> +#include <linux/types.h>

No objection to cleaning up the includes, but not in same patch that does
anything more significant.

>
> #include <linux/iio/iio.h>
> #include <linux/iio/sysfs.h>
> @@ -91,7 +92,8 @@ struct ad2s1210_state {
> struct mutex lock;
> struct spi_device *sdev;
> struct gpio_desc *gpios[5];
> - unsigned int fclkin;
> + /** The external oscillator frequency in Hz. */
> + unsigned long fclkin;
rename it so we know the units. fclkin_hz

However, I'd stash the clk instead and then get the frequency where it's needed.
Also avoids need for a wrapper function as can just call
devm_get_clk_enabled() in probe()

Obviously give that clk a meaningful name though.

> unsigned int fexcit;
> bool hysteresis;
> u8 resolution;
> @@ -198,45 +200,6 @@ static inline int ad2s1210_soft_reset(struct ad2s1210_state *st)
> return ad2s1210_config_write(st, 0x0);
> }
>
> -static ssize_t ad2s1210_show_fclkin(struct device *dev,
> - struct device_attribute *attr,
> - char *buf)
> -{
> - struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
> -
> - return sprintf(buf, "%u\n", st->fclkin);
> -}
> -
> -static ssize_t ad2s1210_store_fclkin(struct device *dev,
> - struct device_attribute *attr,
> - const char *buf,
> - size_t len)
> -{
> - struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
> - unsigned int fclkin;
> - int ret;
> -
> - ret = kstrtouint(buf, 10, &fclkin);
> - if (ret)
> - return ret;
> - if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) {
> - dev_err(dev, "ad2s1210: fclkin out of range\n");
> - return -EINVAL;
> - }
> -
> - mutex_lock(&st->lock);
> - st->fclkin = fclkin;
> -
> - ret = ad2s1210_update_frequency_control_word(st);
> - if (ret < 0)
> - goto error_ret;
> - ret = ad2s1210_soft_reset(st);
> -error_ret:
> - mutex_unlock(&st->lock);
> -
> - return ret < 0 ? ret : len;
> -}
> -
> static ssize_t ad2s1210_show_fexcit(struct device *dev,
> struct device_attribute *attr,
> char *buf)
> @@ -546,8 +509,6 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev,
> return ret;
> }
>
> -static IIO_DEVICE_ATTR(fclkin, 0644,
> - ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0);
> static IIO_DEVICE_ATTR(fexcit, 0644,
> ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0);
> static IIO_DEVICE_ATTR(control, 0644,
> @@ -596,7 +557,6 @@ static const struct iio_chan_spec ad2s1210_channels[] = {
> };
>
> static struct attribute *ad2s1210_attributes[] = {
> - &iio_dev_attr_fclkin.dev_attr.attr,
> &iio_dev_attr_fexcit.dev_attr.attr,
> &iio_dev_attr_control.dev_attr.attr,
> &iio_dev_attr_bits.dev_attr.attr,
> @@ -654,6 +614,24 @@ static const struct iio_info ad2s1210_info = {
> .attrs = &ad2s1210_attribute_group,
> };
>
> +static int ad2s1210_setup_clocks(struct ad2s1210_state *st)
> +{
> + struct device *dev = &st->sdev->dev;
> + struct clk *clk;
> +
> + clk = devm_clk_get_enabled(dev, NULL);
> + if (IS_ERR(clk))
> + return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");
> +
> + st->fclkin = clk_get_rate(clk);
> + if (st->fclkin < AD2S1210_MIN_CLKIN || st->fclkin > AD2S1210_MAX_CLKIN)
> + return dev_err_probe(dev, -EINVAL,
> + "clock frequency out of range: %lu\n",
> + st->fclkin);
> +
> + return 0;
> +}
> +
> static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
> {
> struct spi_device *spi = st->sdev;

2023-09-24 17:59:26

by Jonathan Cameron

[permalink] [raw]
Subject: Re: [PATCH v2 09/19] staging: iio: resolver: ad2s1210: use regmap for config registers

On Thu, 21 Sep 2023 09:43:50 -0500
David Lechner <[email protected]> wrote:

> This makes use of the regmap API to read and write the configuration
> registers. This simplifies code quite a bit and makes it safer
> (previously, it was easy to write a bad value to the config registers
> which causes the chip to lock up and need to be reset).
>
I'd like a bit more description in here -mostly because I have no idea
what the original code was doing.
What were the MSB writes that followed main config writes for and why
can we get rid of them>

Also, using regmap for only some accesses is a bit unusual. Add some
text here to justify that decision.

Jonathan

> Signed-off-by: David Lechner <[email protected]>


> -/* write 1 bytes (address or data) to the chip */
> -static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data)
> +/*
> + * Writes the given data to the given register address.
> + *
> + * If the mode is configurable, the device will first be placed in
> + * configuration mode.
> + */
> +static int ad2s1210_regmap_reg_write(void *context, unsigned int reg,
> + unsigned int val)
> {
> - int ret;
> + struct ad2s1210_state *st = context;
> + struct spi_transfer xfers[] = {
> + {
> + .len = 1,
> + .rx_buf = &st->rx[0],
> + .tx_buf = &st->tx[0],
> + .cs_change = 1,
> + }, {
> + .len = 1,
> + .rx_buf = &st->rx[1],
> + .tx_buf = &st->tx[1],
> + },
> + };
> +
> + /* values can only be 7 bits, the MSB indicates an address */
> + if (val & ~0x7F)
> + return -EINVAL;
> +
> + st->tx[0] = reg;
> + st->tx[1] = val;
>
> ad2s1210_set_mode(MOD_CONFIG, st);
> - st->tx[0] = data;
> - ret = spi_write(st->sdev, st->tx, 1);
> - if (ret < 0)
> - return ret;
>
> - return 0;
> + return spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers));
> }
>
> -/* read value from one of the registers */
> -static int ad2s1210_config_read(struct ad2s1210_state *st,
> - unsigned char address)
> +/*
> + * Reads value from one of the registers.
> + *
> + * If the mode is configurable, the device will first be placed in
> + * configuration mode.
> + */
> +static int ad2s1210_regmap_reg_read(void *context, unsigned int reg,
> + unsigned int *val)
> {
> + struct ad2s1210_state *st = context;
> struct spi_transfer xfers[] = {
> {
> .len = 1,
> @@ -146,22 +176,34 @@ static int ad2s1210_config_read(struct ad2s1210_state *st,
> .tx_buf = &st->tx[1],
> },
> };
> - int ret = 0;
> + int ret;
>
> ad2s1210_set_mode(MOD_CONFIG, st);
> - st->tx[0] = address | AD2S1210_MSB_IS_HIGH;
> + st->tx[0] = reg;
> + /* Must be valid register address here otherwise this could write data.
> + * It doesn't matter which one.
> + */
> st->tx[1] = AD2S1210_REG_FAULT;
> - ret = spi_sync_transfer(st->sdev, xfers, 2);
> +
> + ret = spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers));
> if (ret < 0)
> return ret;
>
> - return st->rx[1];
> + /* If the D7 bit is set on any read/write register, it indicates a

IIO comments are
/*
* If ...

> + * parity error. The fault register is read-only and the D7 bit means
> + * something else there.
> + */
> + if (reg != AD2S1210_REG_FAULT && st->rx[1] & AD2S1210_ADDRESS_DATA)
> + return -EBADMSG;
> +
> + *val = st->rx[1];
> +
> + return 0;
> }
>


> static ssize_t ad2s1210_store_control(struct device *dev,
> @@ -264,25 +297,13 @@ static ssize_t ad2s1210_store_control(struct device *dev,
> return -EINVAL;
>
> mutex_lock(&st->lock);
> - ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
> - if (ret < 0)
> - goto error_ret;
> - data = udata & AD2S1210_MSB_IS_LOW;
> - ret = ad2s1210_config_write(st, data);
> + data = udata & ~AD2S1210_ADDRESS_DATA;
> + ret = regmap_write(st->regmap, AD2S1210_REG_CONTROL, data);
> if (ret < 0)
> goto error_ret;
>
> - ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
> - if (ret < 0)
> - goto error_ret;
> - if (ret & AD2S1210_MSB_IS_HIGH) {
> - ret = -EIO;
> - dev_err(dev,
> - "ad2s1210: write control register fail\n");
> - goto error_ret;
> - }
> st->resolution =
> - ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
> + ad2s1210_resolution_value[data & AD2S1210_SET_RES];
> ad2s1210_set_resolution_pin(st);
> ret = len;
> st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS);
> @@ -315,30 +336,17 @@ static ssize_t ad2s1210_store_resolution(struct device *dev,
> dev_err(dev, "ad2s1210: resolution out of range\n");
> return -EINVAL;
> }
> +
> + data = (udata - 10) >> 1;
> +
> mutex_lock(&st->lock);
> - ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
> - if (ret < 0)
> - goto error_ret;
> - data = ret;
> - data &= ~AD2S1210_SET_RESOLUTION;
> - data |= (udata - 10) >> 1;
> - ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
> - if (ret < 0)
> - goto error_ret;
> - ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
> + ret = regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL,
> + AD2S1210_SET_RES, data);
> if (ret < 0)
> goto error_ret;
> - ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
> - if (ret < 0)
> - goto error_ret;
> - data = ret;
> - if (data & AD2S1210_MSB_IS_HIGH) {
> - ret = -EIO;
> - dev_err(dev, "ad2s1210: setting resolution fail\n");
> - goto error_ret;
> - }
> +
> st->resolution =
> - ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
> + ad2s1210_resolution_value[data & AD2S1210_SET_RES];
> ad2s1210_set_resolution_pin(st);
> ret = len;
> error_ret:
> @@ -351,13 +359,14 @@ static ssize_t ad2s1210_show_fault(struct device *dev,
> struct device_attribute *attr, char *buf)
> {
> struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
> + unsigned int value;
> int ret;
>
> mutex_lock(&st->lock);
> - ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
> + ret = regmap_read(st->regmap, AD2S1210_REG_FAULT, &value);
> mutex_unlock(&st->lock);
>
> - return (ret < 0) ? ret : sprintf(buf, "0x%02x\n", ret);
> + return ret < 0 ? ret : sprintf(buf, "0x%02x\n", value);

You added the brackets in earlier patch. I've dropped them now
from my tree which will make this not quite apply.



> }
>

...

>
> static ssize_t ad2s1210_store_reg(struct device *dev,
> @@ -409,14 +420,11 @@ static ssize_t ad2s1210_store_reg(struct device *dev,
> struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
>
> ret = kstrtou8(buf, 10, &data);
> - if (ret)
> + if (ret < 0)
> return -EINVAL;
> +
Unrelated. Also unnecessary as it doesn't return postive values.

> mutex_lock(&st->lock);
> - ret = ad2s1210_config_write(st, iattr->address);
> - if (ret < 0)
> - goto error_ret;
> - ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
> -error_ret:
> + ret = regmap_write(st->regmap, iattr->address, data);
> mutex_unlock(&st->lock);
> return ret < 0 ? ret : len;
> }
> @@ -583,23 +591,12 @@ static int ad2s1210_initial(struct ad2s1210_state *st)
> mutex_lock(&st->lock);
> ad2s1210_set_resolution_pin(st);
>
> - ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
> - if (ret < 0)
> - goto error_ret;
> - data = AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION);
> + data = AD2S1210_DEF_CONTROL & ~AD2S1210_SET_RES;

Somewhat unrelated and you may sort it later, but I'd like
to see DEF_CONTROL broken out and FIELD_PREP() used for all the fields.
Seems crazy to use a value, then drop some bits then fill them in with
something else.

> data |= (st->resolution - 10) >> 1;
> - ret = ad2s1210_config_write(st, data);
> - if (ret < 0)
> - goto error_ret;
> - ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
> + ret = regmap_write(st->regmap, AD2S1210_REG_CONTROL, data);
> if (ret < 0)
> goto error_ret;
>
> - if (ret & AD2S1210_MSB_IS_HIGH) {
I guess this was meant to be a sanity check on the chip responding.

> - ret = -EIO;
> - goto error_ret;
> - }
> -
> ret = ad2s1210_update_frequency_control_word(st);
> if (ret < 0)
> goto error_ret;
> @@ -652,6 +649,52 @@ static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
> return 0;
> }

2023-09-25 16:50:28

by David Lechner

[permalink] [raw]
Subject: Re: [PATCH v2 09/19] staging: iio: resolver: ad2s1210: use regmap for config registers

> > - if (ret & AD2S1210_MSB_IS_HIGH) {
> I guess this was meant to be a sanity check on the chip responding.
>
> > - ret = -EIO;
> > - goto error_ret;
> > - }
> > -

Yes, according to the data sheet, if this bit is set, it means there was a
configuration parity error. This test has been moved to the
ad2s1210_regmap_reg_read() function.

2023-09-25 23:22:18

by David Lechner

[permalink] [raw]
Subject: Re: [PATCH v2 01/19] dt-bindings: iio: resolver: add devicetree bindings for ad2s1210

On Sun, Sep 24, 2023 at 11:57 AM Jonathan Cameron <[email protected]> wrote:
>
> On Thu, 21 Sep 2023 09:43:42 -0500
> David Lechner <[email protected]> wrote:
>
...
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - spi-cpha
> > + - clocks
> > + - sample-gpios
> > + - assigned-resolution-bits
> > +
> > +oneOf:
> > + - required:
> > + - mode-gpios
> > + - required:
> > + - adi,fixed-mode
> I think this allows for both. It's fiddlier to exclude that but would be a nice
> to have perhaps rather than relying on text above that says 'don't do it'.
>

example-schema.yaml says that oneOf is XOR (anyOf is OR and would
allow both).

2023-09-26 03:19:20

by David Lechner

[permalink] [raw]
Subject: Re: [PATCH v2 01/19] dt-bindings: iio: resolver: add devicetree bindings for ad2s1210

On Sun, Sep 24, 2023 at 11:57 AM Jonathan Cameron <[email protected]> wrote:
>
> On Thu, 21 Sep 2023 09:43:42 -0500
> David Lechner <[email protected]> wrote:
>
...
> > + fault-gpios:
> > + description:
> > + GPIO lines connected to the LOT and DOS pins. These pins combined indicate
> > + the type of fault present, if any. As these pins a pulled low to indicate
> > + a fault condition, they should be configured as GPIO_ACTIVE_LOW.
>
> What if someone is being odd and connected only 1 of them?
> It's annoying how often people run out of pins and do things like this.
>
> > + minItems: 2
> > + maxItems: 2
> > +
In this case the two lines are not independent. If both lines are
asserted, it does
not mean that both LOT and DOS faults exists but rather it means that a LOS
fault exists. So it would seem problematic to allow one without the other here.