Describe the PWM block on IPQ6018.
The PWM is in the TCSR area. Make &tcsr "simple-mfd" compatible, and add
&pwm as child of &tcsr.
Add also ipq6018 specific compatible string.
Co-developed-by: Baruch Siach <[email protected]>
Signed-off-by: Baruch Siach <[email protected]>
Signed-off-by: Devi Priya <[email protected]>
---
v12:
No change
v11:
No change
v10:
No change
v9:
Add 'ranges' property (Rob)
v8:
Add size cell to 'reg' (Rob)
v7:
Use 'reg' instead of 'offset' (Rob)
Add qcom,tcsr-ipq6018 (Rob)
Drop clock-names (Bjorn)
v6:
Make the PWM node child of TCSR (Rob Herring)
Add assigned-clocks/assigned-clock-rates (Uwe Kleine-König)
v5: Use qcom,pwm-regs for TCSR phandle instead of direct regs
v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring)
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 47b8b1d6730a..cadd2c583526 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -398,8 +398,21 @@ tcsr_mutex: hwlock@1905000 {
};
tcsr: syscon@1937000 {
- compatible = "qcom,tcsr-ipq6018", "syscon";
+ compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd";
reg = <0x0 0x01937000 0x0 0x21000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x01937000 0x21000>;
+
+ pwm: pwm@a010 {
+ compatible = "qcom,ipq6018-pwm";
+ reg = <0xa010 0x20>;
+ clocks = <&gcc GCC_ADSS_PWM_CLK>;
+ assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>;
+ assigned-clock-rates = <100000000>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
};
usb2: usb@70f8800 {
--
2.34.1
On 9/25/2023 12:29 PM, Devi Priya wrote:
> Describe the PWM block on IPQ6018.
>
> The PWM is in the TCSR area. Make &tcsr "simple-mfd" compatible, and add
> &pwm as child of &tcsr.
>
> Add also ipq6018 specific compatible string.
>
> Co-developed-by: Baruch Siach <[email protected]>
> Signed-off-by: Baruch Siach <[email protected]>
> Signed-off-by: Devi Priya <[email protected]>
> ---
> v12:
>
> No change
>
> v11:
>
> No change
>
> v10:
>
> No change
>
> v9:
>
> Add 'ranges' property (Rob)
>
> v8:
>
> Add size cell to 'reg' (Rob)
>
> v7:
>
> Use 'reg' instead of 'offset' (Rob)
>
> Add qcom,tcsr-ipq6018 (Rob)
>
> Drop clock-names (Bjorn)
>
> v6:
>
> Make the PWM node child of TCSR (Rob Herring)
>
> Add assigned-clocks/assigned-clock-rates (Uwe Kleine-König)
>
> v5: Use qcom,pwm-regs for TCSR phandle instead of direct regs
>
> v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring)
>
> arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 ++++++++++++++-
> 1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> index 47b8b1d6730a..cadd2c583526 100644
> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> @@ -398,8 +398,21 @@ tcsr_mutex: hwlock@1905000 {
> };
>
> tcsr: syscon@1937000 {
> - compatible = "qcom,tcsr-ipq6018", "syscon";
> + compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd";
> reg = <0x0 0x01937000 0x0 0x21000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x0 0x01937000 0x21000>;
> +
Hi Krzysztof,
Referring to
https://lore.kernel.org/all/[email protected]/,
it seems that the TCSR block should
not have any child nodes. Could you pls provide your suggestions on pwm
being added as the child node?
Thanks,
Devi Priya
> + pwm: pwm@a010 {
> + compatible = "qcom,ipq6018-pwm";
> + reg = <0xa010 0x20>;
> + clocks = <&gcc GCC_ADSS_PWM_CLK>;
> + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>;
> + assigned-clock-rates = <100000000>;
> + #pwm-cells = <2>;
> + status = "disabled";
> + };
> };
>
> usb2: usb@70f8800 {
On 29/09/2023 13:47, Devi Priya wrote:
>
>
> On 9/25/2023 12:29 PM, Devi Priya wrote:
>> Describe the PWM block on IPQ6018.
>>
>> The PWM is in the TCSR area. Make &tcsr "simple-mfd" compatible, and add
>> &pwm as child of &tcsr.
>>
>> Add also ipq6018 specific compatible string.
>>
>> Co-developed-by: Baruch Siach <[email protected]>
>> Signed-off-by: Baruch Siach <[email protected]>
>> Signed-off-by: Devi Priya <[email protected]>
>> ---
>> v12:
>>
>> No change
>>
>> v11:
>>
>> No change
>>
>> v10:
>>
>> No change
>>
>> v9:
>>
>> Add 'ranges' property (Rob)
>>
>> v8:
>>
>> Add size cell to 'reg' (Rob)
>>
>> v7:
>>
>> Use 'reg' instead of 'offset' (Rob)
>>
>> Add qcom,tcsr-ipq6018 (Rob)
>>
>> Drop clock-names (Bjorn)
>>
>> v6:
>>
>> Make the PWM node child of TCSR (Rob Herring)
>>
>> Add assigned-clocks/assigned-clock-rates (Uwe Kleine-König)
>>
>> v5: Use qcom,pwm-regs for TCSR phandle instead of direct regs
>>
>> v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring)
>>
>> arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 ++++++++++++++-
>> 1 file changed, 14 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
>> index 47b8b1d6730a..cadd2c583526 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
>> @@ -398,8 +398,21 @@ tcsr_mutex: hwlock@1905000 {
>> };
>>
>> tcsr: syscon@1937000 {
>> - compatible = "qcom,tcsr-ipq6018", "syscon";
>> + compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd";
>> reg = <0x0 0x01937000 0x0 0x21000>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0x0 0x0 0x01937000 0x21000>;
>> +
> Hi Krzysztof,
> Referring to
> https://lore.kernel.org/all/[email protected]/,
> it seems that the TCSR block should
> not have any child nodes. Could you pls provide your suggestions on pwm
> being added as the child node?
If you are sure that TCSR contains PWM and all registers are there, then
feel free to add proper binding. Sending untested patch is not the way
to go.
Best regards,
Krzysztof
On 9/30/2023 9:05 PM, Krzysztof Kozlowski wrote:
> On 29/09/2023 13:47, Devi Priya wrote:
>>
>>
>> On 9/25/2023 12:29 PM, Devi Priya wrote:
>>> Describe the PWM block on IPQ6018.
>>>
>>> The PWM is in the TCSR area. Make &tcsr "simple-mfd" compatible, and add
>>> &pwm as child of &tcsr.
>>>
>>> Add also ipq6018 specific compatible string.
>>>
>>> Co-developed-by: Baruch Siach <[email protected]>
>>> Signed-off-by: Baruch Siach <[email protected]>
>>> Signed-off-by: Devi Priya <[email protected]>
>>> ---
>>> v12:
>>>
>>> No change
>>>
>>> v11:
>>>
>>> No change
>>>
>>> v10:
>>>
>>> No change
>>>
>>> v9:
>>>
>>> Add 'ranges' property (Rob)
>>>
>>> v8:
>>>
>>> Add size cell to 'reg' (Rob)
>>>
>>> v7:
>>>
>>> Use 'reg' instead of 'offset' (Rob)
>>>
>>> Add qcom,tcsr-ipq6018 (Rob)
>>>
>>> Drop clock-names (Bjorn)
>>>
>>> v6:
>>>
>>> Make the PWM node child of TCSR (Rob Herring)
>>>
>>> Add assigned-clocks/assigned-clock-rates (Uwe Kleine-König)
>>>
>>> v5: Use qcom,pwm-regs for TCSR phandle instead of direct regs
>>>
>>> v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring)
>>>
>>> arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 ++++++++++++++-
>>> 1 file changed, 14 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
>>> index 47b8b1d6730a..cadd2c583526 100644
>>> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
>>> @@ -398,8 +398,21 @@ tcsr_mutex: hwlock@1905000 {
>>> };
>>>
>>> tcsr: syscon@1937000 {
>>> - compatible = "qcom,tcsr-ipq6018", "syscon";
>>> + compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd";
>>> reg = <0x0 0x01937000 0x0 0x21000>;
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + ranges = <0x0 0x0 0x01937000 0x21000>;
>>> +
>> Hi Krzysztof,
>> Referring to
>> https://lore.kernel.org/all/[email protected]/,
>> it seems that the TCSR block should
>> not have any child nodes. Could you pls provide your suggestions on pwm
>> being added as the child node?
>
> If you are sure that TCSR contains PWM and all registers are there, then
> feel free to add proper binding. Sending untested patch is not the way
> to go.
Sure, okay
Thanks,
Devi Priya
>
> Best regards,
> Krzysztof
>