2023-10-03 04:21:58

by shravan chippa

[permalink] [raw]
Subject: [PATCH v2 0/4] dma: sf-pdma: various sf-pdma updates for the mpfs platform

From: Shravan Chippa <[email protected]>

Changes from V1 -> V2:

Removed internal review tags
Commit massages modified.
Added devicetree patch with new compatible name for mpfs platform
Added of_dma_controller_free() clenup call in sf_pdma_remove() function


V1:

This series does the following
1. Adds a PolarFire SoC specific compatible and code to support for
out-of-order dma transfers

2. Adds generic device tree bindings support by using
of_dma_controller_register()

Shravan Chippa (4):
dmaengine: sf-pdma: Support of_dma_controller_register()
dt-bindings: dma: sf-pdma: add new compatible name
dmaengine: sf-pdma: add mpfs-pdma compatible name
riscv: dts: microchip: add specific compatible for mpfs' pdma

.../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++--
arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +-
drivers/dma/sf-pdma/sf-pdma.c | 71 ++++++++++++++++++-
drivers/dma/sf-pdma/sf-pdma.h | 6 ++
4 files changed, 83 insertions(+), 8 deletions(-)

--
2.34.1


2023-10-03 04:22:12

by shravan chippa

[permalink] [raw]
Subject: [PATCH v2 4/4] riscv: dts: microchip: add specific compatible for mpfs' pdma

From: Shravan Chippa <[email protected]>

Add specific compatible for PolarFire SoC for The SiFive PDMA driver

Signed-off-by: Shravan Chippa <[email protected]>
---
arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi
index 104504352e99..05525d5c2c82 100644
--- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
@@ -221,7 +221,7 @@ plic: interrupt-controller@c000000 {
};

pdma: dma-controller@3000000 {
- compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
+ compatible = "microchip,mpfs-pdma", "sifive,fu540-c000-pdma";
reg = <0x0 0x3000000 0x0 0x8000>;
interrupt-parent = <&plic>;
interrupts = <5 6>, <7 8>, <9 10>, <11 12>;
--
2.34.1

2023-10-03 04:22:13

by shravan chippa

[permalink] [raw]
Subject: [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name

From: Shravan Chippa <[email protected]>

Sifive platform dma does not allow out-of-order transfers,
Add a PolarFire SoC specific compatible and code to support
for out-of-order dma transfers

Signed-off-by: Shravan Chippa <[email protected]>
---
drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++
2 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
index 06a0912a12a1..a9ff319d4ca3 100644
--- a/drivers/dma/sf-pdma/sf-pdma.c
+++ b/drivers/dma/sf-pdma/sf-pdma.c
@@ -21,6 +21,7 @@
#include <linux/dma-mapping.h>
#include <linux/of.h>
#include <linux/of_dma.h>
+#include <linux/of_device.h>
#include <linux/slab.h>

#include "sf-pdma.h"
@@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
u64 dst, u64 src, u64 size)
{
- desc->xfer_type = PDMA_FULL_SPEED;
+ desc->xfer_type = desc->chan->pdma->transfer_type;
desc->xfer_size = size;
desc->dst_addr = dst;
desc->src_addr = src;
@@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,

static int sf_pdma_probe(struct platform_device *pdev)
{
+ const struct sf_pdma_driver_platdata *ddata;
struct sf_pdma *pdma;
int ret, n_chans;
const enum dma_slave_buswidth widths =
@@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev)

pdma->n_chans = n_chans;

+ pdma->transfer_type = PDMA_FULL_SPEED;
+
+ ddata = of_device_get_match_data(&pdev->dev);
+ if (ddata) {
+ if (ddata->quirks & NO_STRICT_ORDERING)
+ pdma->transfer_type &= ~(NO_STRICT_ORDERING);
+ }
+
pdma->membase = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(pdma->membase))
return PTR_ERR(pdma->membase);
@@ -632,11 +642,22 @@ static int sf_pdma_remove(struct platform_device *pdev)
return 0;
}

+static const struct sf_pdma_driver_platdata mpfs_pdma = {
+ .quirks = NO_STRICT_ORDERING,
+};
+
static const struct of_device_id sf_pdma_dt_ids[] = {
- { .compatible = "sifive,fu540-c000-pdma" },
- { .compatible = "sifive,pdma0" },
+ {
+ .compatible = "sifive,fu540-c000-pdma",
+ }, {
+ .compatible = "sifive,pdma0",
+ }, {
+ .compatible = "microchip,mpfs-pdma",
+ .data = &mpfs_pdma,
+ },
{},
};
+
MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);

static struct platform_driver sf_pdma_driver = {
diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
index 5c398a83b491..3b16db4daa0b 100644
--- a/drivers/dma/sf-pdma/sf-pdma.h
+++ b/drivers/dma/sf-pdma/sf-pdma.h
@@ -49,6 +49,7 @@

/* Transfer Type */
#define PDMA_FULL_SPEED 0xFF000008
+#define NO_STRICT_ORDERING BIT(3)

/* Error Recovery */
#define MAX_RETRY 1
@@ -112,8 +113,13 @@ struct sf_pdma {
struct dma_device dma_dev;
void __iomem *membase;
void __iomem *mappedbase;
+ u32 transfer_type;
u32 n_chans;
struct sf_pdma_chan chans[];
};

+struct sf_pdma_driver_platdata {
+ u32 quirks;
+};
+
#endif /* _SF_PDMA_H */
--
2.34.1

2023-10-03 07:35:27

by Emil Renner Berthing

[permalink] [raw]
Subject: Re: [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name

shravan chippa wrote:
> From: Shravan Chippa <[email protected]>
>
> Sifive platform dma does not allow out-of-order transfers,
> Add a PolarFire SoC specific compatible and code to support
> for out-of-order dma transfers
>
> Signed-off-by: Shravan Chippa <[email protected]>
> ---
> drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++
> 2 files changed, 30 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index 06a0912a12a1..a9ff319d4ca3 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -21,6 +21,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/of.h>
> #include <linux/of_dma.h>
> +#include <linux/of_device.h>
> #include <linux/slab.h>
>
> #include "sf-pdma.h"
> @@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
> static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> u64 dst, u64 src, u64 size)
> {
> - desc->xfer_type = PDMA_FULL_SPEED;
> + desc->xfer_type = desc->chan->pdma->transfer_type;

Two spaces.

> desc->xfer_size = size;
> desc->dst_addr = dst;
> desc->src_addr = src;
> @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
>
> static int sf_pdma_probe(struct platform_device *pdev)
> {
> + const struct sf_pdma_driver_platdata *ddata;
> struct sf_pdma *pdma;
> int ret, n_chans;
> const enum dma_slave_buswidth widths =
> @@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
>
> pdma->n_chans = n_chans;
>
> + pdma->transfer_type = PDMA_FULL_SPEED;
> +
> + ddata = of_device_get_match_data(&pdev->dev);
> + if (ddata) {
> + if (ddata->quirks & NO_STRICT_ORDERING)
> + pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> + }
> +

The commit message says "Sifive platform dma does not allow out-of-order
transfers" so you want strict ordering by default and then allow
out-of-order transfers if the match data allows it, right?

But here bit 3 is set by default and cleared if the quirk is set, so it looks
like bit 3 actually means "strict ordering" and not "no strict ordering" as
you've named it.

The confusion here probably stems using the same define for the quirk and the
xfer_type. Unless I'm mistaken above I'd find something like this a lot easier
to read:

sf_pdma.h:
#define PDMA_FULL_SPEED 0xFF000000
#define PDMA_STRICT_ORDERING BIT(3)

sf_pdma.c:
#define PDMA_QUIRK_NO_STRICT_ORDERING BIT(0)

dma->transfer_type = PDMA_FULL_SPEED | PDMA_STRICT_ORDERING;
...
if (ddata->quirks & PDMA_QUIRK_NO_STRICT_ORDERING)
pdma->transfer_type &= ~PDMA_STRICT_ORDERING;

> pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> if (IS_ERR(pdma->membase))
> return PTR_ERR(pdma->membase);
> @@ -632,11 +642,22 @@ static int sf_pdma_remove(struct platform_device *pdev)
> return 0;
> }
>
> +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> + .quirks = NO_STRICT_ORDERING,
> +};
> +
> static const struct of_device_id sf_pdma_dt_ids[] = {
> - { .compatible = "sifive,fu540-c000-pdma" },
> - { .compatible = "sifive,pdma0" },
> + {
> + .compatible = "sifive,fu540-c000-pdma",
> + }, {
> + .compatible = "sifive,pdma0",
> + }, {
> + .compatible = "microchip,mpfs-pdma",
> + .data = &mpfs_pdma,
> + },
> {},
> };
> +
> MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
>
> static struct platform_driver sf_pdma_driver = {
> diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index 5c398a83b491..3b16db4daa0b 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.h
> +++ b/drivers/dma/sf-pdma/sf-pdma.h
> @@ -49,6 +49,7 @@
>
> /* Transfer Type */
> #define PDMA_FULL_SPEED 0xFF000008
> +#define NO_STRICT_ORDERING BIT(3)
>
> /* Error Recovery */
> #define MAX_RETRY 1
> @@ -112,8 +113,13 @@ struct sf_pdma {
> struct dma_device dma_dev;
> void __iomem *membase;
> void __iomem *mappedbase;
> + u32 transfer_type;
> u32 n_chans;
> struct sf_pdma_chan chans[];
> };
>
> +struct sf_pdma_driver_platdata {
> + u32 quirks;
> +};
> +
> #endif /* _SF_PDMA_H */
> --
> 2.34.1

2023-10-04 03:48:16

by shravan chippa

[permalink] [raw]
Subject: RE: [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name

Hi Emil Renner,

> -----Original Message-----
> From: Emil Renner Berthing <[email protected]>
> Sent: Tuesday, October 3, 2023 1:05 PM
> To: shravan Chippa - I35088 <[email protected]>;
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]
> Cc: [email protected]; [email protected]; linux-
> [email protected]; [email protected]; Nagasuresh Relli - I67208
> <[email protected]>; Praveen Kumar - I30718
> <[email protected]>
> Subject: Re: [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible
> name
>
> [You don't often get email from [email protected]. Learn why
> this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> shravan chippa wrote:
> > From: Shravan Chippa <[email protected]>
> >
> > Sifive platform dma does not allow out-of-order transfers, Add a
> > PolarFire SoC specific compatible and code to support for out-of-order
> > dma transfers
> >
> > Signed-off-by: Shravan Chippa <[email protected]>
> > ---
> > drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> > drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++
> > 2 files changed, 30 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index 06a0912a12a1..a9ff319d4ca3
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -21,6 +21,7 @@
> > #include <linux/dma-mapping.h>
> > #include <linux/of.h>
> > #include <linux/of_dma.h>
> > +#include <linux/of_device.h>
> > #include <linux/slab.h>
> >
> > #include "sf-pdma.h"
> > @@ -66,7 +67,7 @@ static struct sf_pdma_desc
> > *sf_pdma_alloc_desc(struct sf_pdma_chan *chan) static void
> sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> > u64 dst, u64 src, u64 size) {
> > - desc->xfer_type = PDMA_FULL_SPEED;
> > + desc->xfer_type = desc->chan->pdma->transfer_type;
>
> Two spaces.
>
> > desc->xfer_size = size;
> > desc->dst_addr = dst;
> > desc->src_addr = src;
> > @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct
> of_phandle_args *dma_spec,
> >
> > static int sf_pdma_probe(struct platform_device *pdev)
> > {
> > + const struct sf_pdma_driver_platdata *ddata;
> > struct sf_pdma *pdma;
> > int ret, n_chans;
> > const enum dma_slave_buswidth widths =
> > @@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device
> *pdev)
> >
> > pdma->n_chans = n_chans;
> >
> > + pdma->transfer_type = PDMA_FULL_SPEED;
> > +
> > + ddata = of_device_get_match_data(&pdev->dev);
> > + if (ddata) {
> > + if (ddata->quirks & NO_STRICT_ORDERING)
> > + pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> > + }
> > +
>
> The commit message says "Sifive platform dma does not allow out-of-order
> transfers" so you want strict ordering by default and then allow
> out-of-order transfers if the match data allows it, right?
>
> But here bit 3 is set by default and cleared if the quirk is set, so it looks
> like bit 3 actually means "strict ordering" and not "no strict ordering" as
> you've named it.
>
> The confusion here probably stems using the same define for the quirk and the
> xfer_type. Unless I'm mistaken above I'd find something like this a lot easier
> to read:
>
> sf_pdma.h:
> #define PDMA_FULL_SPEED 0xFF000000
> #define PDMA_STRICT_ORDERING BIT(3)
>
> sf_pdma.c:
> #define PDMA_QUIRK_NO_STRICT_ORDERING BIT(0)
>
> dma->transfer_type = PDMA_FULL_SPEED | PDMA_STRICT_ORDERING;
> ...
> if (ddata->quirks & PDMA_QUIRK_NO_STRICT_ORDERING)
> pdma->transfer_type &= ~PDMA_STRICT_ORDERING;
>

Thanks for the input. To avoid confusion on the naming of the macro and new macro for quirk
I will try to modify it as you mentioned.

Thanks,
Shravan

> > pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> > if (IS_ERR(pdma->membase))
> > return PTR_ERR(pdma->membase);
> > @@ -632,11 +642,22 @@ static int sf_pdma_remove(struct platform_device
> *pdev)
> > return 0;
> > }
> >
> > +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> > + .quirks = NO_STRICT_ORDERING,
> > +};
> > +
> > static const struct of_device_id sf_pdma_dt_ids[] = {
> > - { .compatible = "sifive,fu540-c000-pdma" },
> > - { .compatible = "sifive,pdma0" },
> > + {
> > + .compatible = "sifive,fu540-c000-pdma",
> > + }, {
> > + .compatible = "sifive,pdma0",
> > + }, {
> > + .compatible = "microchip,mpfs-pdma",
> > + .data = &mpfs_pdma,
> > + },
> > {},
> > };
> > +
> > MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
> >
> > static struct platform_driver sf_pdma_driver = {
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> > index 5c398a83b491..3b16db4daa0b 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.h
> > +++ b/drivers/dma/sf-pdma/sf-pdma.h
> > @@ -49,6 +49,7 @@
> >
> > /* Transfer Type */
> > #define PDMA_FULL_SPEED 0xFF000008
> > +#define NO_STRICT_ORDERING BIT(3)
> >
> > /* Error Recovery */
> > #define MAX_RETRY 1
> > @@ -112,8 +113,13 @@ struct sf_pdma {
> > struct dma_device dma_dev;
> > void __iomem *membase;
> > void __iomem *mappedbase;
> > + u32 transfer_type;
> > u32 n_chans;
> > struct sf_pdma_chan chans[];
> > };
> >
> > +struct sf_pdma_driver_platdata {
> > + u32 quirks;
> > +};
> > +
> > #endif /* _SF_PDMA_H */
> > --
> > 2.34.1

2023-10-04 13:23:13

by Rob Herring (Arm)

[permalink] [raw]
Subject: Re: [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name

On Tue, Oct 03, 2023 at 09:52:14AM +0530, shravan chippa wrote:
> From: Shravan Chippa <[email protected]>
>
> Sifive platform dma does not allow out-of-order transfers,
> Add a PolarFire SoC specific compatible and code to support
> for out-of-order dma transfers
>
> Signed-off-by: Shravan Chippa <[email protected]>
> ---
> drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++
> 2 files changed, 30 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index 06a0912a12a1..a9ff319d4ca3 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -21,6 +21,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/of.h>
> #include <linux/of_dma.h>
> +#include <linux/of_device.h>

Wrong header.

> #include <linux/slab.h>
>
> #include "sf-pdma.h"
> @@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
> static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> u64 dst, u64 src, u64 size)
> {
> - desc->xfer_type = PDMA_FULL_SPEED;
> + desc->xfer_type = desc->chan->pdma->transfer_type;
> desc->xfer_size = size;
> desc->dst_addr = dst;
> desc->src_addr = src;
> @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
>
> static int sf_pdma_probe(struct platform_device *pdev)
> {
> + const struct sf_pdma_driver_platdata *ddata;
> struct sf_pdma *pdma;
> int ret, n_chans;
> const enum dma_slave_buswidth widths =
> @@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
>
> pdma->n_chans = n_chans;
>
> + pdma->transfer_type = PDMA_FULL_SPEED;
> +
> + ddata = of_device_get_match_data(&pdev->dev);

Use device_get_match_data() instead

> + if (ddata) {
> + if (ddata->quirks & NO_STRICT_ORDERING)
> + pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> + }
> +
> pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> if (IS_ERR(pdma->membase))
> return PTR_ERR(pdma->membase);
> @@ -632,11 +642,22 @@ static int sf_pdma_remove(struct platform_device *pdev)
> return 0;
> }
>
> +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> + .quirks = NO_STRICT_ORDERING,
> +};
> +
> static const struct of_device_id sf_pdma_dt_ids[] = {
> - { .compatible = "sifive,fu540-c000-pdma" },
> - { .compatible = "sifive,pdma0" },
> + {
> + .compatible = "sifive,fu540-c000-pdma",
> + }, {
> + .compatible = "sifive,pdma0",
> + }, {
> + .compatible = "microchip,mpfs-pdma",
> + .data = &mpfs_pdma,
> + },
> {},
> };
> +
> MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
>
> static struct platform_driver sf_pdma_driver = {
> diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index 5c398a83b491..3b16db4daa0b 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.h
> +++ b/drivers/dma/sf-pdma/sf-pdma.h
> @@ -49,6 +49,7 @@
>
> /* Transfer Type */
> #define PDMA_FULL_SPEED 0xFF000008
> +#define NO_STRICT_ORDERING BIT(3)
>
> /* Error Recovery */
> #define MAX_RETRY 1
> @@ -112,8 +113,13 @@ struct sf_pdma {
> struct dma_device dma_dev;
> void __iomem *membase;
> void __iomem *mappedbase;
> + u32 transfer_type;
> u32 n_chans;
> struct sf_pdma_chan chans[];
> };
>
> +struct sf_pdma_driver_platdata {
> + u32 quirks;
> +};
> +
> #endif /* _SF_PDMA_H */
> --
> 2.34.1
>