2023-10-09 08:25:25

by Vaishnav Achath

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Subject: [PATCH v4 0/2] arm64: dts: ti: k3-j7200: Fixes for various dtbs_checks warnings

Hi,

Few fixups for j7200 dtbs_check warnings.

This is V4 for the following series rebased and tested with 6.6-rc5,

V3 : https://lore.kernel.org/all/[email protected]
V2 : https://lore.kernel.org/all/[email protected]/
V1 : https://lore.kernel.org/all/[email protected]/

Bootlog with basic hyperflash testing (6.6.0-rc5-next-20231009):
https://gist.github.com/vaishnavachath/f7265e932725fd992dbc4e48b993e9c0

Patch 2/2 depends on the following patch under review which enables reg-mux
to be used when parent node is not syscon :
https://lore.kernel.org/all/[email protected]/

Changelog:

V3->V4:
* Rebase and tested with 6.6-rc5

V2->V3:
* Drop pinctrl fix patch as the fix [2] is already merged to next.
* Keep register regions unchanged as it is correct according to memory
map, update commit message.

V1->V2:
* Address feedback as recommended in [3].
* Address feedback from Udit to limit the FSS register region size as
per TRM.
* Use reg-mux changes in [4] to simplify the hbmc-mux modelling

[1] https://lore.kernel.org/all/[email protected]/
[2] https://lore.kernel.org/all/[email protected]/
[3] https://lore.kernel.org/all/20230503115130.c7m4a7crub7kmfjw@gluten/
[4] https://lore.kernel.org/all/[email protected]/

Nishanth Menon (2):
arm64: dts: ti: k3-j7200-mcu-wakeup: Switch mcu_syscon to
ti,j721e-system-controller
arm64: dts: ti: k3-j7200-mcu-wakeup: Update fss node and hbmc_mux

arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)

--
2.17.1


2023-10-09 08:25:38

by Vaishnav Achath

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Subject: [PATCH v4 2/2] arm64: dts: ti: k3-j7200-mcu-wakeup: Update fss node and hbmc_mux

From: Nishanth Menon <[email protected]>

FSS node claims to be a syscon node, while it actually is a simple bus
where OSPI, HBMC peripherals are located and a mux for path select
between OSPI and Hyperbus which can be modelled as a reg-mux. So model
it accordingly and use reg-mux to describe the hbmc_mux.

Signed-off-by: Nishanth Menon <[email protected]>
Signed-off-by: Vaishnav Achath <[email protected]>
---

V2->V3:
* Keep register regions unchanged as it is correct according to memory
map.
* Update commit messages as per Vignesh's suggestion.

V1->V2:
* Address feedback from Udit to limit the FSS register region size as
per TRM.
* Use reg-mux changes to simplify the hbmc-mux modelling.
* Update commit message to reflect changes.

Depends on:
https://lore.kernel.org/all/[email protected]/

arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 2ee6215e38a6..4f98ea685d33 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -507,15 +507,16 @@
status = "disabled";
};

- fss: syscon@47000000 {
- compatible = "syscon", "simple-mfd";
+ fss: bus@47000000 {
+ compatible = "simple-bus";
reg = <0x00 0x47000000 0x00 0x100>;
#address-cells = <2>;
#size-cells = <2>;
ranges;

- hbmc_mux: hbmc-mux {
- compatible = "mmio-mux";
+ hbmc_mux: mux-controller@47000004 {
+ compatible = "reg-mux";
+ reg = <0x00 0x47000004 0x00 0x2>;
#mux-control-cells = <1>;
mux-reg-masks = <0x4 0x2>; /* HBMC select */
};
--
2.17.1

2023-10-19 19:15:42

by reidt

[permalink] [raw]
Subject: Re: [PATCH v4 2/2] arm64: dts: ti: k3-j7200-mcu-wakeup: Update fss node and hbmc_mux

On 13:54-20231009, Vaishnav Achath wrote:
> From: Nishanth Menon <[email protected]>
>
> FSS node claims to be a syscon node, while it actually is a simple bus
> where OSPI, HBMC peripherals are located and a mux for path select
> between OSPI and Hyperbus which can be modelled as a reg-mux. So model
> it accordingly and use reg-mux to describe the hbmc_mux.
>
> Signed-off-by: Nishanth Menon <[email protected]>
> Signed-off-by: Vaishnav Achath <[email protected]>
> ---
>
> V2->V3:
> * Keep register regions unchanged as it is correct according to memory
> map.
> * Update commit messages as per Vignesh's suggestion.
>
> V1->V2:
> * Address feedback from Udit to limit the FSS register region size as
> per TRM.
> * Use reg-mux changes to simplify the hbmc-mux modelling.
> * Update commit message to reflect changes.
>
> Depends on:
> https://lore.kernel.org/all/[email protected]/
>
> arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index 2ee6215e38a6..4f98ea685d33 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -507,15 +507,16 @@
> status = "disabled";
> };
>
> - fss: syscon@47000000 {
> - compatible = "syscon", "simple-mfd";
> + fss: bus@47000000 {
> + compatible = "simple-bus";
> reg = <0x00 0x47000000 0x00 0x100>;
> #address-cells = <2>;
> #size-cells = <2>;
> ranges;
>
> - hbmc_mux: hbmc-mux {
> - compatible = "mmio-mux";
> + hbmc_mux: mux-controller@47000004 {
> + compatible = "reg-mux";
> + reg = <0x00 0x47000004 0x00 0x2>;
> #mux-control-cells = <1>;
> mux-reg-masks = <0x4 0x2>; /* HBMC select */
> };
> --
> 2.17.1
>
>

Reviewed-by: Reid Tonking <[email protected]>