Add the fundamental hardware configuration of component TCC,
which is controlled by MDP3 on MT8195.
Signed-off-by: Moudy Ho <[email protected]>
---
.../bindings/media/mediatek,mdp3-tcc.yaml | 62 +++++++++++++++++++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml
diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml
new file mode 100644
index 000000000000..f134160f85b9
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/mediatek,mdp3-tcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Media Data Path 3 TCC
+
+maintainers:
+ - Matthias Brugger <[email protected]>
+
+description:
+ Tone Curve Conversion (TCC) is one of Media Profile Path 3 (MDP3) components.
+ It is used to handle the tone mapping of various gamma curves in order to
+ achieve HDR10 effects. This helps adapt the content to the color and
+ brightness range that standard display devices typically support.
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8195-mdp3-tcc
+
+ reg:
+ maxItems: 1
+
+ mediatek,gce-client-reg:
+ description:
+ The register of display function block to be set by gce. There are 4 arguments,
+ such as gce node, subsys id, offset and register size. The subsys id that is
+ mapping to the register of display function blocks is defined in the gce header
+ include/dt-bindings/gce/<chip>-gce.h of each chips.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ items:
+ - description: phandle of GCE
+ - description: GCE subsys id
+ - description: register offset
+ - description: register size
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - mediatek,gce-client-reg
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8195-clk.h>
+ #include <dt-bindings/gce/mt8195-gce.h>
+
+ display@1400b000 {
+ compatible = "mediatek,mt8195-mdp3-tcc";
+ reg = <0x1400b000 0x1000>;
+ mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>;
+ clocks = <&vppsys0 CLK_VPP0_MDP_TCC>;
+ };
--
2.18.0
Il 12/10/23 10:40, Moudy Ho ha scritto:
> Add the fundamental hardware configuration of component TCC,
> which is controlled by MDP3 on MT8195.
>
> Signed-off-by: Moudy Ho <[email protected]>
> ---
> .../bindings/media/mediatek,mdp3-tcc.yaml | 62 +++++++++++++++++++
> 1 file changed, 62 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml
>
> diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml
> new file mode 100644
> index 000000000000..f134160f85b9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml
> @@ -0,0 +1,62 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/mediatek,mdp3-tcc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Media Data Path 3 TCC
MediaTek Media Data Path 3 Tone Curve Conversion
after which:
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
On 12/10/2023 10:40, Moudy Ho wrote:
> Add the fundamental hardware configuration of component TCC,
> which is controlled by MDP3 on MT8195.
>
> Signed-off-by: Moudy Ho <[email protected]>
> ---
> .../bindings/media/mediatek,mdp3-tcc.yaml | 62 +++++++++++++++++++
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof