2023-10-13 10:17:14

by Praveen Teja Kundanala

Subject: [PATCH 0/5] Add ZynqMP efuse access support

Add following support
- ZynqMP efuse firmware API for efuse access
- Convert txt to yaml file
- Add nodes for ZynqMP efuses in yaml file
- Add device tree(DT) nodes for nvmem access
- Update driver to provide support to
read/write ZynqMP efuse memory

Praveen Teja Kundanala (5):
firmware: xilinx: Add ZynqMP efuse access API
dt-bindings: nvmem: Convert xlnx,zynqmp-nvmem.txt to yaml
dt-bindings: nvmem: Add nodes for ZynqMP efuses
arm64: zynqmp: Add ZynqnMP nvmem nodes
nvmem: zynqmp_nvmem: Add support to access efuse

.../bindings/nvmem/xlnx,zynqmp-nvmem.txt | 46 ---
.../bindings/nvmem/xlnx,zynqmp-nvmem.yaml | 270 ++++++++++++++++++
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 55 ++++
drivers/firmware/xilinx/zynqmp.c | 25 ++
drivers/nvmem/zynqmp_nvmem.c | 216 ++++++++++++--
include/linux/firmware/xlnx-zynqmp.h | 8 +
6 files changed, 543 insertions(+), 77 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
create mode 100644 Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.yaml

--
2.36.1

2023-10-13 10:17:16

by Praveen Teja Kundanala

Subject: [PATCH 4/5] arm64: zynqmp: Add ZynqnMP nvmem nodes

Add nvmem DT nodes for ZynqMP SOC

Signed-off-by: Praveen Teja Kundanala <[email protected]>
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 55 ++++++++++++++++++++++++++
1 file changed, 55 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 02cfcc716936..b8807dcce442 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -190,6 +190,61 @@ nvmem_firmware {
soc_revision: soc_revision@0 {
reg = <0x0 0x4>;
};
+ /* efuse access */
+ efuse_dna: efuse_dna@c {
+ reg = <0xc 0xc>;
+ };
+ efuse_usr0: efuse_usr0@20 {
+ reg = <0x20 0x4>;
+ };
+ efuse_usr1: efuse_usr1@24 {
+ reg = <0x24 0x4>;
+ };
+ efuse_usr2: efuse_usr2@28 {
+ reg = <0x28 0x4>;
+ };
+ efuse_usr3: efuse_usr3@2c {
+ reg = <0x2c 0x4>;
+ };
+ efuse_usr4: efuse_usr4@30 {
+ reg = <0x30 0x4>;
+ };
+ efuse_usr5: efuse_usr5@34 {
+ reg = <0x34 0x4>;
+ };
+ efuse_usr6: efuse_usr6@38 {
+ reg = <0x38 0x4>;
+ };
+ efuse_usr7: efuse_usr7@3c {
+ reg = <0x3c 0x4>;
+ };
+ efuse_miscusr: efuse_miscusr@40 {
+ reg = <0x40 0x4>;
+ };
+ efuse_chash: efuse_chash@50 {
+ reg = <0x50 0x4>;
+ };
+ efuse_pufmisc: efuse_pufmisc@54 {
+ reg = <0x54 0x4>;
+ };
+ efuse_sec: efuse_sec@58 {
+ reg = <0x58 0x4>;
+ };
+ efuse_spkid: efuse_spkid@5c {
+ reg = <0x5c 0x4>;
+ };
+ efuse_aeskey: efuse_aeskey@60 {
+ reg = <0x60 0x20>;
+ };
+ efuse_ppk0hash: efuse_ppk0hash@a0 {
+ reg = <0xa0 0x30>;
+ };
+ efuse_ppk1hash: efuse_ppk1hash@d0 {
+ reg = <0xd0 0x30>;
+ };
+ efuse_pufuser: efuse_pufuser@100 {
+ reg = <0x100 0x7F>;
+ };
};

zynqmp_pcap: pcap {
--
2.36.1

2023-10-13 10:32:35

by Krzysztof Kozlowski

Subject: Re: [PATCH 4/5] arm64: zynqmp: Add ZynqnMP nvmem nodes

On 13/10/2023 12:14, Praveen Teja Kundanala wrote:
> Add nvmem DT nodes for ZynqMP SOC
>
> Signed-off-by: Praveen Teja Kundanala <[email protected]>
> ---
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 55 ++++++++++++++++++++++++++
> 1 file changed, 55 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 02cfcc716936..b8807dcce442 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -190,6 +190,61 @@ nvmem_firmware {
> soc_revision: soc_revision@0 {
> reg = <0x0 0x4>;
> };
> + /* efuse access */
> + efuse_dna: efuse_dna@c {

No underscores in node names. I see now from where did you get the
initial pattern. Would be great if you fixed Xilinx DTS :/

Best regards,
Krzysztof

2023-10-13 11:19:08

by Michal Simek

Subject: Re: [PATCH 4/5] arm64: zynqmp: Add ZynqnMP nvmem nodes

On 10/13/23 12:32, Krzysztof Kozlowski wrote:
> On 13/10/2023 12:14, Praveen Teja Kundanala wrote:
>> Add nvmem DT nodes for ZynqMP SOC
>>
>> Signed-off-by: Praveen Teja Kundanala <[email protected]>
>> ---
>> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 55 ++++++++++++++++++++++++++
>> 1 file changed, 55 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>> index 02cfcc716936..b8807dcce442 100644
>> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>> @@ -190,6 +190,61 @@ nvmem_firmware {
>> soc_revision: soc_revision@0 {
>> reg = <0x0 0x4>;
>> };
>> + /* efuse access */
>> + efuse_dna: efuse_dna@c {
>
> No underscores in node names. I see now from where did you get the
> initial pattern. Would be great if you fixed Xilinx DTS :/

I actually fixed soc-revision here.

https://lore.kernel.org/all/5137958580c85a35cf6aadd1c33a2f6bcf81a9e5.1695040866.git.michal.simek@amd.com/

Thanks,
Michal