This series documents gpi/pdc/scm/smmu for the Qualcomm X1E80100 platform,
aka Snapdragon X Elite.
Our v1 post of the patchsets adding support for Snapdragon X Elite SoC had
the part number sc8380xp which is now updated to the new part number x1e80100
based on the new branding scheme and refers to the exact same SoC.
v2:
* Update the part number from sc8380xp to x1e80100.
* Document PDC bindings as well.
* List the interconnect requirements in bindings [Krzysztof].
* Pickup Rbs.
Rajendra Nayak (1):
dt-bindings: arm-smmu: Add compatible for X1E80100 SoC
Sibi Sankar (3):
dt-bindings: dma: qcom: gpi: add compatible for X1E80100
dt-bindings: firmware: qcom,scm: document SCM on X1E80100 SoCs
dt-bindings: interrupt-controller: qcom,pdc: document pdc on X1E80100
Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 1 +
Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 2 ++
.../devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 1 +
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 2 ++
4 files changed, 6 insertions(+)
--
2.17.1
From: Rajendra Nayak <[email protected]>
Add the SoC specific compatible for X1E80100 implementing arm,mmu-500.
Signed-off-by: Rajendra Nayak <[email protected]>
Co-developed-by: Sibi Sankar <[email protected]>
Signed-off-by: Sibi Sankar <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
---
v2:
* Update the part number from sc8380xp to x1e80100.
* Pickup Rbs.
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index aa9e1c0895a5..7ae4f65fe236 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -56,6 +56,7 @@ properties:
- qcom,sm8350-smmu-500
- qcom,sm8450-smmu-500
- qcom,sm8550-smmu-500
+ - qcom,x1e80100-smmu-500
- const: qcom,smmu-500
- const: arm,mmu-500
@@ -475,6 +476,7 @@ allOf:
- qcom,sm8350-smmu-500
- qcom,sm8450-smmu-500
- qcom,sm8550-smmu-500
+ - qcom,x1e80100-smmu-500
then:
properties:
clock-names: false
--
2.17.1
The Qualcomm X1E80100 uses GPI DMA for its GENI interface. Add a compatible
string for it in the documentation by using the SM6350 as fallback.
Signed-off-by: Sibi Sankar <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
---
v2:
* Update the part number from sc8380xp to x1e80100.
* Pickup Rbs.
Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
index 88d0de3d1b46..d06db2cc931e 100644
--- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
+++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
@@ -32,6 +32,7 @@ properties:
- qcom,sm8350-gpi-dma
- qcom,sm8450-gpi-dma
- qcom,sm8550-gpi-dma
+ - qcom,x1e80100-gpi-dma
- const: qcom,sm6350-gpi-dma
- items:
- enum:
--
2.17.1
The X1E80100 SoC includes a PDC, document it.
Signed-off-by: Sibi Sankar <[email protected]>
---
.../devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
index 86d61896f591..ea10cade3453 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
@@ -41,6 +41,7 @@ properties:
- qcom,sm8250-pdc
- qcom,sm8350-pdc
- qcom,sm8450-pdc
+ - qcom,x1e80100-pdc
- const: qcom,pdc
reg:
--
2.17.1
Document scm compatible for X1E80100 SoCs.
Signed-off-by: Sibi Sankar <[email protected]>
Reviewed-by: Guru Das Srinagesh <[email protected]>
---
v2:
* Update the part number from sc8380xp to x1e80100.
* List the interconnect requirements in bindings [Krzysztof].
* Pickup Rbs.
Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
index 0613a37a851a..0a07c6c76720 100644
--- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
+++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
@@ -64,6 +64,7 @@ properties:
- qcom,scm-sm8450
- qcom,scm-sm8550
- qcom,scm-qcs404
+ - qcom,scm-x1e80100
- const: qcom,scm
clocks:
@@ -189,6 +190,7 @@ allOf:
- qcom,scm-sc8280xp
- qcom,scm-sm8450
- qcom,scm-sm8550
+ - qcom,scm-x1e80100
then:
properties:
interconnects: false
--
2.17.1
On 17/11/2023 11:56, Sibi Sankar wrote:
> The X1E80100 SoC includes a PDC, document it.
>
> Signed-off-by: Sibi Sankar <[email protected]>
> ---
Please rebase on next.
Best regards,
Krzysztof
On 17/11/2023 11:56, Sibi Sankar wrote:
> Document scm compatible for X1E80100 SoCs.
>
> Signed-off-by: Sibi Sankar <[email protected]>
> Reviewed-by: Guru Das Srinagesh <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On 11/17/23 18:37, Krzysztof Kozlowski wrote:
> On 17/11/2023 11:56, Sibi Sankar wrote:
>> The X1E80100 SoC includes a PDC, document it.
>>
>> Signed-off-by: Sibi Sankar <[email protected]>
>> ---
>
> Please rebase on next.
This series was based on lnext-20231117.
-Sibi
>
> Best regards,
> Krzysztof
>