2023-11-25 13:04:58

by Konrad Dybcio

[permalink] [raw]
Subject: [PATCH 0/2] RB2 bluetooth

The bluetooth module on RB2 seems to work ootb with the WCN3988 setup.
Enable it.

Scanning for devices works, couldn't test pairing on a remote board.

Signed-off-by: Konrad Dybcio <[email protected]>
---
Konrad Dybcio (2):
arm64: dts: qcom: sm6115: Add UART3
arm64: dts: qcom: qrb4210-rb2: Enable bluetooth

arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 81 +++++++++++++++++++++++++++++++-
arch/arm64/boot/dts/qcom/sm6115.dtsi | 30 ++++++++++++
2 files changed, 110 insertions(+), 1 deletion(-)
---
base-commit: 8c9660f6515396aba78d1168d2e17951d653ebf2
change-id: 20231120-topic-rb2_bt-ad4b8abc750f

Best regards,
--
Konrad Dybcio <[email protected]>


2023-11-25 13:05:01

by Konrad Dybcio

[permalink] [raw]
Subject: [PATCH 2/2] arm64: dts: qcom: qrb4210-rb2: Enable bluetooth

Enable the QCA bluetooth on RB2. It identifies like the following:

Bluetooth: hci0: QCA Product ID :0x0000000a
Bluetooth: hci0: QCA SOC Version :0x40020150
Bluetooth: hci0: QCA ROM Version :0x00000201
Bluetooth: hci0: QCA Patch Version:0x00000001
Bluetooth: hci0: QCA controller version 0x01500201

Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 81 +++++++++++++++++++++++++++++++-
1 file changed, 80 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
index 9738c0dacd58..bd751236f983 100644
--- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
+++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
@@ -15,6 +15,7 @@ / {

aliases {
serial0 = &uart4;
+ serial1 = &uart3;
};

chosen {
@@ -352,7 +353,8 @@ vreg_l8a_0p664: l8 {

vreg_l9a_1p8: l9 {
regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2000000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-allow-set-load;
};

vreg_l10a_1p8: l10 {
@@ -389,11 +391,13 @@ vreg_l15a_3p128: l15 {
vreg_l16a_1p3: l16 {
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <1904000>;
+ regulator-allow-set-load;
};

vreg_l17a_1p3: l17 {
regulator-min-microvolt = <1152000>;
regulator-max-microvolt = <1384000>;
+ regulator-allow-set-load;
};

vreg_l18a_1p232: l18 {
@@ -426,6 +430,7 @@ vreg_l22a_2p96: l22 {
vreg_l23a_3p3: l23 {
regulator-min-microvolt = <3200000>;
regulator-max-microvolt = <3400000>;
+ regulator-allow-set-load;
};

vreg_l24a_2p96: l24 {
@@ -487,6 +492,60 @@ &tlmm {
<56 3>, <61 2>, <64 1>,
<68 1>, <72 8>, <96 1>;

+ uart3_default: uart3-default-state {
+ cts-pins {
+ pins = "gpio8";
+ function = "qup3";
+ bias-bus-hold;
+ };
+
+ rts-pins {
+ pins = "gpio9";
+ function = "qup3";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ tx-pins {
+ pins = "gpio10";
+ function = "qup3";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ rx-pins {
+ pins = "gpio11";
+ function = "qup3";
+ bias-pull-up;
+ };
+ };
+
+ uart3_sleep: uart3-sleep-state {
+ cts-pins {
+ pins = "gpio8";
+ function = "gpio";
+ bias-bus-hold;
+ };
+
+ rts-pins {
+ pins = "gpio9";
+ function = "gpio";
+ bias-pull-down;
+ };
+
+ tx-pins {
+ pins = "gpio10";
+ function = "gpio";
+ bias-pull-up;
+ };
+
+ rx-pins {
+ pins = "gpio11";
+ function = "gpio";
+ bias-pull-up;
+ };
+ };
+
lt9611_rst_pin: lt9611-rst-state {
pins = "gpio41";
function = "gpio";
@@ -508,6 +567,26 @@ sdc2_card_det_n: sd-card-det-n-state {
};
};

+&uart3 {
+ interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+ <&tlmm 11 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart3_default>;
+ pinctrl-1 = <&uart3_sleep>;
+ pinctrl-names = "default", "sleep";
+ status = "okay";
+
+ bluetooth {
+ compatible = "qcom,wcn3988-bt";
+
+ vddio-supply = <&vreg_l9a_1p8>;
+ vddxo-supply = <&vreg_l16a_1p3>;
+ vddrf-supply = <&vreg_l17a_1p3>;
+ vddch0-supply = <&vreg_l23a_3p3>;
+ enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
+ max-speed = <3200000>;
+ };
+};
+
&uart4 {
status = "okay";
};

--
2.43.0

2023-11-25 13:05:07

by Konrad Dybcio

[permalink] [raw]
Subject: [PATCH 1/2] arm64: dts: qcom: sm6115: Add UART3

Hook up UART3, usually used for communicating with a Bluetooth module.

Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm6115.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 839c60351240..0d13d7bf6bd1 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -273,6 +273,25 @@ memory@80000000 {
reg = <0 0x80000000 0 0>;
};

+ qup_opp_table: opp-table-qup {
+ compatible = "operating-points-v2";
+
+ opp-75000000 {
+ opp-hz = /bits/ 64 <75000000>;
+ required-opps = <&rpmpd_opp_low_svs>;
+ };
+
+ opp-100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ required-opps = <&rpmpd_opp_svs>;
+ };
+
+ opp-128000000 {
+ opp-hz = /bits/ 64 <128000000>;
+ required-opps = <&rpmpd_opp_nom>;
+ };
+ };
+
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <GIC_PPI 6 IRQ_TYPE_LEVEL_HIGH>;
@@ -1208,6 +1227,17 @@ spi3: spi@4a8c000 {
status = "disabled";
};

+ uart3: serial@4a8c000 {
+ compatible = "qcom,geni-uart";
+ reg = <0x0 0x04a8c000 0x0 0x4000>;
+ interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
+ clock-names = "se";
+ power-domains = <&rpmpd SM6115_VDDCX>;
+ operating-points-v2 = <&qup_opp_table>;
+ status = "disabled";
+ };
+
i2c4: i2c@4a90000 {
compatible = "qcom,geni-i2c";
reg = <0x0 0x04a90000 0x0 0x4000>;

--
2.43.0

2023-11-25 14:49:33

by Bryan O'Donoghue

[permalink] [raw]
Subject: Re: [PATCH 1/2] arm64: dts: qcom: sm6115: Add UART3

On 25/11/2023 13:04, Konrad Dybcio wrote:
> Hook up UART3, usually used for communicating with a Bluetooth module.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> index 839c60351240..0d13d7bf6bd1 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> @@ -273,6 +273,25 @@ memory@80000000 {
> reg = <0 0x80000000 0 0>;
> };
>
> + qup_opp_table: opp-table-qup {
> + compatible = "operating-points-v2";
> +
> + opp-75000000 {
> + opp-hz = /bits/ 64 <75000000>;
> + required-opps = <&rpmpd_opp_low_svs>;
> + };
> +
> + opp-100000000 {
> + opp-hz = /bits/ 64 <100000000>;
> + required-opps = <&rpmpd_opp_svs>;
> + };
> +
> + opp-128000000 {
> + opp-hz = /bits/ 64 <128000000>;
> + required-opps = <&rpmpd_opp_nom>;
> + };
> + };
> +

It looked odd to me that the same opps as the FP4 were used but, this
declaration is consistent with downstream.

> pmu {
> compatible = "arm,armv8-pmuv3";
> interrupts = <GIC_PPI 6 IRQ_TYPE_LEVEL_HIGH>;
> @@ -1208,6 +1227,17 @@ spi3: spi@4a8c000 {
> status = "disabled";
> };
>
> + uart3: serial@4a8c000 {
> + compatible = "qcom,geni-uart";
> + reg = <0x0 0x04a8c000 0x0 0x4000>;
> + interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
> + clock-names = "se";
> + power-domains = <&rpmpd SM6115_VDDCX>;
> + operating-points-v2 = <&qup_opp_table>;
> + status = "disabled";
> + };
> +
> i2c4: i2c@4a90000 {
> compatible = "qcom,geni-i2c";
> reg = <0x0 0x04a90000 0x0 0x4000>;
>

Reviewed-by: Bryan O'Donoghue <[email protected]>

2023-11-25 15:05:09

by Bryan O'Donoghue

[permalink] [raw]
Subject: Re: [PATCH 2/2] arm64: dts: qcom: qrb4210-rb2: Enable bluetooth

On 25/11/2023 13:04, Konrad Dybcio wrote:
> Enable the QCA bluetooth on RB2. It identifies like the following:
>
> Bluetooth: hci0: QCA Product ID :0x0000000a
> Bluetooth: hci0: QCA SOC Version :0x40020150
> Bluetooth: hci0: QCA ROM Version :0x00000201
> Bluetooth: hci0: QCA Patch Version:0x00000001
> Bluetooth: hci0: QCA controller version 0x01500201
>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 81 +++++++++++++++++++++++++++++++-
> 1 file changed, 80 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
> index 9738c0dacd58..bd751236f983 100644
> --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
> +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
> @@ -15,6 +15,7 @@ / {
>
> aliases {
> serial0 = &uart4;
> + serial1 = &uart3;
> };
>
> chosen {
> @@ -352,7 +353,8 @@ vreg_l8a_0p664: l8 {
>
> vreg_l9a_1p8: l9 {
> regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <2000000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-allow-set-load;
> };
>
> vreg_l10a_1p8: l10 {
> @@ -389,11 +391,13 @@ vreg_l15a_3p128: l15 {
> vreg_l16a_1p3: l16 {
> regulator-min-microvolt = <1704000>;
> regulator-max-microvolt = <1904000>;
> + regulator-allow-set-load;
> };
>
> vreg_l17a_1p3: l17 {
> regulator-min-microvolt = <1152000>;
> regulator-max-microvolt = <1384000>;
> + regulator-allow-set-load;
> };
>
> vreg_l18a_1p232: l18 {
> @@ -426,6 +430,7 @@ vreg_l22a_2p96: l22 {
> vreg_l23a_3p3: l23 {
> regulator-min-microvolt = <3200000>;
> regulator-max-microvolt = <3400000>;
> + regulator-allow-set-load;
> };
>
> vreg_l24a_2p96: l24 {
> @@ -487,6 +492,60 @@ &tlmm {
> <56 3>, <61 2>, <64 1>,
> <68 1>, <72 8>, <96 1>;
>
> + uart3_default: uart3-default-state {
> + cts-pins {
> + pins = "gpio8";
> + function = "qup3";
> + bias-bus-hold;
> + };
> +
> + rts-pins {
> + pins = "gpio9";
> + function = "qup3";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + tx-pins {
> + pins = "gpio10";
> + function = "qup3";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + rx-pins {
> + pins = "gpio11";
> + function = "qup3";
> + bias-pull-up;
> + };
> + };
> +
> + uart3_sleep: uart3-sleep-state {
> + cts-pins {
> + pins = "gpio8";
> + function = "gpio";
> + bias-bus-hold;
> + };
> +
> + rts-pins {
> + pins = "gpio9";
> + function = "gpio";
> + bias-pull-down;
> + };
> +
> + tx-pins {
> + pins = "gpio10";
> + function = "gpio";
> + bias-pull-up;
> + };
> +
> + rx-pins {
> + pins = "gpio11";
> + function = "gpio";
> + bias-pull-up;
> + };
> + };
> +

My reading of downstream has all of these pins drive-strength = <2>.


> lt9611_rst_pin: lt9611-rst-state {
> pins = "gpio41";
> function = "gpio";
> @@ -508,6 +567,26 @@ sdc2_card_det_n: sd-card-det-n-state {
> };
> };
>
> +&uart3 {
> + interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
> + <&tlmm 11 IRQ_TYPE_LEVEL_HIGH>;
> + pinctrl-0 = <&uart3_default>;
> + pinctrl-1 = <&uart3_sleep>;
> + pinctrl-names = "default", "sleep";
> + status = "okay";
> +
> + bluetooth {
> + compatible = "qcom,wcn3988-bt";
> +
> + vddio-supply = <&vreg_l9a_1p8>;
> + vddxo-supply = <&vreg_l16a_1p3>;
> + vddrf-supply = <&vreg_l17a_1p3>;
> + vddch0-supply = <&vreg_l23a_3p3>;
> + enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
> + max-speed = <3200000>;
> + };
> +};

Does firmware name not matter here ?

bluetooth {
compatible = "qcom,wcn3990-bt";
vddio-supply = <&vreg_s4a_1p8>;
vddxo-supply = <&vreg_l7a_1p8>;
vddrf-supply = <&vreg_l17a_1p3>;
vddch0-supply = <&vreg_l25a_3p3>;
max-speed = <3200000>;
firmware-name = "crnv21.bin";
};

> +
> &uart4 {
> status = "okay";
> };

---
bod

2023-11-25 15:29:06

by Konrad Dybcio

[permalink] [raw]
Subject: Re: [PATCH 2/2] arm64: dts: qcom: qrb4210-rb2: Enable bluetooth

On 25.11.2023 16:04, Bryan O'Donoghue wrote:
> On 25/11/2023 13:04, Konrad Dybcio wrote:
>> Enable the QCA bluetooth on RB2. It identifies like the following:
>>
>> Bluetooth: hci0: QCA Product ID   :0x0000000a
>> Bluetooth: hci0: QCA SOC Version  :0x40020150
>> Bluetooth: hci0: QCA ROM Version  :0x00000201
>> Bluetooth: hci0: QCA Patch Version:0x00000001
>> Bluetooth: hci0: QCA controller version 0x01500201
>>
>> Signed-off-by: Konrad Dybcio <[email protected]>
>> ---
[...]

>> +
>> +        rx-pins {
>> +            pins = "gpio11";
>> +            function = "gpio";
>> +            bias-pull-up;
>> +        };
>> +    };
>> +
>
> My reading of downstream has all of these pins drive-strength = <2>.
Right, I'll fix it up.

>
>
>>       lt9611_rst_pin: lt9611-rst-state {
>>           pins = "gpio41";
>>           function = "gpio";
>> @@ -508,6 +567,26 @@ sdc2_card_det_n: sd-card-det-n-state {
>>       };
>>   };
>>   +&uart3 {
>> +    interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
>> +                  <&tlmm 11 IRQ_TYPE_LEVEL_HIGH>;
>> +    pinctrl-0 = <&uart3_default>;
>> +    pinctrl-1 = <&uart3_sleep>;
>> +    pinctrl-names = "default", "sleep";
>> +    status = "okay";
>> +
>> +    bluetooth {
>> +        compatible = "qcom,wcn3988-bt";
>> +
>> +        vddio-supply = <&vreg_l9a_1p8>;
>> +        vddxo-supply = <&vreg_l16a_1p3>;
>> +        vddrf-supply = <&vreg_l17a_1p3>;
>> +        vddch0-supply = <&vreg_l23a_3p3>;
>> +        enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
>> +        max-speed = <3200000>;
>> +    };
>> +};
>
> Does firmware name not matter here ?
The driver figures it out, see
drivers/bluetooth/btqca.c : qca_uart_setup()

Konrad