Make it possible to scale performance states of the power domain and
interconnect of the UART DM controller in relation to the selected UART
baud rate. This is done by setting up an OPP table in the device tree
that describes the necessary power domain states in relation to the UART
clock rate.
Signed-off-by: Stephan Gerhold <[email protected]>
---
Stephan Gerhold (2):
dt-bindings: serial: qcom,msm-uartdm: Vote for shared resources
serial: msm: Use OPP table for DVFS support
.../devicetree/bindings/serial/qcom,msm-uartdm.yaml | 13 +++++++++++++
drivers/tty/serial/msm_serial.c | 19 +++++++++++++++++--
2 files changed, 30 insertions(+), 2 deletions(-)
---
base-commit: ab58841ab9fca536e5579312d7b46cbc4822e29c
change-id: 20231121-serial-msm-dvfs-aeda58c55af2
Best regards,
--
Stephan Gerhold <[email protected]>
Kernkonzept GmbH at Dresden, Germany, HRB 31129, CEO Dr.-Ing. Michael Hohmuth
Document power-domains, operating-points-v2 and interconnects to allow
making performance state votes for certain clock frequencies of the UART
DM controller. The interconnect path to DRAM is needed when UART DM is
used together with a DMA engine.
Voting for these shared resources is necessary to guarantee performance
with power management enabled. Otherwise these resources might run at
minimal performance state which is not sufficient for certain UART
baud rates.
Signed-off-by: Stephan Gerhold <[email protected]>
---
.../devicetree/bindings/serial/qcom,msm-uartdm.yaml | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml
index ee52bf8e8917..e0fa363ad7e2 100644
--- a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml
+++ b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml
@@ -48,9 +48,17 @@ properties:
- const: tx
- const: rx
+ interconnects:
+ maxItems: 1
+
interrupts:
maxItems: 1
+ operating-points-v2: true
+
+ power-domains:
+ maxItems: 1
+
qcom,rx-crci:
$ref: /schemas/types.yaml#/definitions/uint32
description:
@@ -99,7 +107,9 @@ unevaluatedProperties: false
examples:
- |
+ #include <dt-bindings/interconnect/qcom,msm8996.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
serial@f991e000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
@@ -109,4 +119,7 @@ examples:
clock-names = "core", "iface";
dmas = <&dma0 0>, <&dma0 1>;
dma-names = "tx", "rx";
+ power-domains = <&rpmpd MSM8996_VDDCX>;
+ operating-points-v2 = <&uart_opp_table>;
+ interconnects = <&pnoc MASTER_BLSP_1 &bimc SLAVE_EBI_CH0>;
};
--
2.39.2
Parse the OPP table from the device tree and use dev_pm_opp_set_rate()
instead of clk_set_rate() to allow making performance state votes
specified in the OPP table (e.g. for power domains and interconnects).
Without an OPP table in the device tree this will behave just as before
this patch.
Signed-off-by: Stephan Gerhold <[email protected]>
---
drivers/tty/serial/msm_serial.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index 7fc8f0b16aef..e24204ad35de 100644
--- a/drivers/tty/serial/msm_serial.c
+++ b/drivers/tty/serial/msm_serial.c
@@ -24,6 +24,7 @@
#include <linux/slab.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
+#include <linux/pm_opp.h>
#include <linux/delay.h>
#include <linux/of.h>
#include <linux/of_device.h>
@@ -1131,7 +1132,7 @@ static int msm_set_baud_rate(struct uart_port *port, unsigned int baud,
uart_port_unlock_irqrestore(port, flags);
entry = msm_find_best_baud(port, baud, &rate);
- clk_set_rate(msm_port->clk, rate);
+ dev_pm_opp_set_rate(port->dev, rate);
baud = rate / 16 / entry->divisor;
uart_port_lock_irqsave(port, &flags);
@@ -1186,6 +1187,7 @@ static void msm_init_clock(struct uart_port *port)
{
struct msm_port *msm_port = to_msm_port(port);
+ dev_pm_opp_set_rate(port->dev, port->uartclk);
clk_prepare_enable(msm_port->clk);
clk_prepare_enable(msm_port->pclk);
msm_serial_set_mnd_regs(port);
@@ -1239,6 +1241,7 @@ static int msm_startup(struct uart_port *port)
clk_disable_unprepare(msm_port->pclk);
clk_disable_unprepare(msm_port->clk);
+ dev_pm_opp_set_rate(port->dev, 0);
return ret;
}
@@ -1254,6 +1257,7 @@ static void msm_shutdown(struct uart_port *port)
msm_release_dma(msm_port);
clk_disable_unprepare(msm_port->clk);
+ dev_pm_opp_set_rate(port->dev, 0);
free_irq(port->irq, port);
}
@@ -1419,11 +1423,13 @@ static void msm_power(struct uart_port *port, unsigned int state,
switch (state) {
case 0:
+ dev_pm_opp_set_rate(port->dev, port->uartclk);
clk_prepare_enable(msm_port->clk);
clk_prepare_enable(msm_port->pclk);
break;
case 3:
clk_disable_unprepare(msm_port->clk);
+ dev_pm_opp_set_rate(port->dev, 0);
clk_disable_unprepare(msm_port->pclk);
break;
default:
@@ -1789,7 +1795,7 @@ static int msm_serial_probe(struct platform_device *pdev)
struct resource *resource;
struct uart_port *port;
const struct of_device_id *id;
- int irq, line;
+ int irq, line, ret;
if (pdev->dev.of_node)
line = of_alias_get_id(pdev->dev.of_node, "serial");
@@ -1824,6 +1830,15 @@ static int msm_serial_probe(struct platform_device *pdev)
return PTR_ERR(msm_port->pclk);
}
+ ret = devm_pm_opp_set_clkname(&pdev->dev, "core");
+ if (ret)
+ return ret;
+
+ /* OPP table is optional */
+ ret = devm_pm_opp_of_add_table(&pdev->dev);
+ if (ret && ret != -ENODEV)
+ return dev_err_probe(&pdev->dev, ret, "invalid OPP table\n");
+
port->uartclk = clk_get_rate(msm_port->clk);
dev_info(&pdev->dev, "uartclk = %d\n", port->uartclk);
--
2.39.2
On Tue, Nov 28, 2023 at 10:43:32AM +0100, Stephan Gerhold wrote:
> Document power-domains, operating-points-v2 and interconnects to allow
> making performance state votes for certain clock frequencies of the UART
> DM controller. The interconnect path to DRAM is needed when UART DM is
> used together with a DMA engine.
>
> Voting for these shared resources is necessary to guarantee performance
> with power management enabled. Otherwise these resources might run at
> minimal performance state which is not sufficient for certain UART
> baud rates.
I find the subject a bit strange because voting is a QCom term/concept
and somewhat outside the scope of the binding. The justification is
really just that the h/w has these resources. In any case,
Reviewed-by: Rob Herring <[email protected]>
> Signed-off-by: Stephan Gerhold <[email protected]>
> ---
> .../devicetree/bindings/serial/qcom,msm-uartdm.yaml | 13 +++++++++++++
> 1 file changed, 13 insertions(+)