Add runtime support for videocc on SM8150 and update the resets
and video_pll0_config configuration.
Changes since v2:
- Update pm_runtime_put to pm_runtime_put_sync
- Link to v2: https://lore.kernel.org/all/[email protected]/
---
Satya Priya Kakitapalli (4):
dt-bindings: clock: Update the videocc resets for sm8150
clk: qcom: videocc-sm8150: Update the videocc resets
clk: qcom: videocc-sm8150: Add missing PLL config property
clk: qcom: videocc-sm8150: Add runtime PM support
drivers/clk/qcom/videocc-sm8150.c | 25 +++++++++++++++++++++++--
include/dt-bindings/clock/qcom,videocc-sm8150.h | 4 ++++
2 files changed, 27 insertions(+), 2 deletions(-)
---
base-commit: 8c87404c76c1911a7ec5b61bf3b2c3858cb95de1
change-id: 20231201-videocc-8150-0c5042278340
Best regards,
--
Satya Priya Kakitapalli <[email protected]>
Add all the available resets for the video clock controller
on sm8150.
Signed-off-by: Satya Priya Kakitapalli <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
---
include/dt-bindings/clock/qcom,videocc-sm8150.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/dt-bindings/clock/qcom,videocc-sm8150.h b/include/dt-bindings/clock/qcom,videocc-sm8150.h
index e24ee840cfdb..c557b78dc572 100644
--- a/include/dt-bindings/clock/qcom,videocc-sm8150.h
+++ b/include/dt-bindings/clock/qcom,videocc-sm8150.h
@@ -16,6 +16,10 @@
/* VIDEO_CC Resets */
#define VIDEO_CC_MVSC_CORE_CLK_BCR 0
+#define VIDEO_CC_INTERFACE_BCR 1
+#define VIDEO_CC_MVS0_BCR 2
+#define VIDEO_CC_MVS1_BCR 3
+#define VIDEO_CC_MVSC_BCR 4
/* VIDEO_CC GDSCRs */
#define VENUS_GDSC 0
--
2.25.1
When the driver was ported upstream, PLL test_ctl_hi1 register value
was omitted. Add it to ensure the PLLs are fully configured.
Fixes: 5658e8cf1a8a ("clk: qcom: add video clock controller driver for SM8150")
Signed-off-by: Satya Priya Kakitapalli <[email protected]>
---
drivers/clk/qcom/videocc-sm8150.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/qcom/videocc-sm8150.c b/drivers/clk/qcom/videocc-sm8150.c
index 6a5f89f53da8..52a9a453a143 100644
--- a/drivers/clk/qcom/videocc-sm8150.c
+++ b/drivers/clk/qcom/videocc-sm8150.c
@@ -33,6 +33,7 @@ static struct alpha_pll_config video_pll0_config = {
.config_ctl_val = 0x20485699,
.config_ctl_hi_val = 0x00002267,
.config_ctl_hi1_val = 0x00000024,
+ .test_ctl_hi1_val = 0x00000020,
.user_ctl_val = 0x00000000,
.user_ctl_hi_val = 0x00000805,
.user_ctl_hi1_val = 0x000000D0,
--
2.25.1
Add runtime PM support to ensure the supply rails are enabled
when necessary.
Signed-off-by: Satya Priya Kakitapalli <[email protected]>
---
drivers/clk/qcom/videocc-sm8150.c | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/videocc-sm8150.c b/drivers/clk/qcom/videocc-sm8150.c
index 52a9a453a143..f1456eaa87c4 100644
--- a/drivers/clk/qcom/videocc-sm8150.c
+++ b/drivers/clk/qcom/videocc-sm8150.c
@@ -6,6 +6,7 @@
#include <linux/clk-provider.h>
#include <linux/module.h>
#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <dt-bindings/clock/qcom,videocc-sm8150.h>
@@ -240,17 +241,32 @@ MODULE_DEVICE_TABLE(of, video_cc_sm8150_match_table);
static int video_cc_sm8150_probe(struct platform_device *pdev)
{
struct regmap *regmap;
+ int ret;
+
+ ret = devm_pm_runtime_enable(&pdev->dev);
+ if (ret)
+ return ret;
+
+ ret = pm_runtime_resume_and_get(&pdev->dev);
+ if (ret)
+ return ret;
regmap = qcom_cc_map(pdev, &video_cc_sm8150_desc);
- if (IS_ERR(regmap))
+ if (IS_ERR(regmap)) {
+ pm_runtime_put_sync(&pdev->dev);
return PTR_ERR(regmap);
+ }
clk_trion_pll_configure(&video_pll0, regmap, &video_pll0_config);
/* Keep VIDEO_CC_XO_CLK ALWAYS-ON */
regmap_update_bits(regmap, 0x984, 0x1, 0x1);
- return qcom_cc_really_probe(pdev, &video_cc_sm8150_desc, regmap);
+ ret = qcom_cc_really_probe(pdev, &video_cc_sm8150_desc, regmap);
+
+ pm_runtime_put_sync(&pdev->dev);
+
+ return ret;
}
static struct platform_driver video_cc_sm8150_driver = {
--
2.25.1
Add all the available resets for the video clock controller
on sm8150.
Fixes: 5658e8cf1a8a ("clk: qcom: add video clock controller driver for SM8150")
Signed-off-by: Satya Priya Kakitapalli <[email protected]>
Reviewed-by: Bryan O'Donoghue <[email protected]>
---
drivers/clk/qcom/videocc-sm8150.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/qcom/videocc-sm8150.c b/drivers/clk/qcom/videocc-sm8150.c
index 1afdbe4a249d..6a5f89f53da8 100644
--- a/drivers/clk/qcom/videocc-sm8150.c
+++ b/drivers/clk/qcom/videocc-sm8150.c
@@ -214,6 +214,10 @@ static const struct regmap_config video_cc_sm8150_regmap_config = {
static const struct qcom_reset_map video_cc_sm8150_resets[] = {
[VIDEO_CC_MVSC_CORE_CLK_BCR] = { 0x850, 2 },
+ [VIDEO_CC_INTERFACE_BCR] = { 0x8f0 },
+ [VIDEO_CC_MVS0_BCR] = { 0x870 },
+ [VIDEO_CC_MVS1_BCR] = { 0x8b0 },
+ [VIDEO_CC_MVSC_BCR] = { 0x810 },
};
static const struct qcom_cc_desc video_cc_sm8150_desc = {
--
2.25.1
On 1.12.2023 10:50, Satya Priya Kakitapalli wrote:
> Add all the available resets for the video clock controller
> on sm8150.
>
> Fixes: 5658e8cf1a8a ("clk: qcom: add video clock controller driver for SM8150")
> Signed-off-by: Satya Priya Kakitapalli <[email protected]>
> Reviewed-by: Bryan O'Donoghue <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Now, you can run
b4 trailers -u
on b4-managed branches and the thing will pick tags up for you
automatically. Do note that unless you get comments asking you
to change something, there is no need to resend just to include tags,
as the maintainer will do this when applying your patches.
Konrad
On 1.12.2023 10:50, Satya Priya Kakitapalli wrote:
> When the driver was ported upstream, PLL test_ctl_hi1 register value
> was omitted. Add it to ensure the PLLs are fully configured.
>
> Fixes: 5658e8cf1a8a ("clk: qcom: add video clock controller driver for SM8150")
> Signed-off-by: Satya Priya Kakitapalli <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
On 1.12.2023 10:50, Satya Priya Kakitapalli wrote:
> Add runtime PM support to ensure the supply rails are enabled
> when necessary.
>
> Signed-off-by: Satya Priya Kakitapalli <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
> clk_trion_pll_configure(&video_pll0, regmap, &video_pll0_config);
>
> /* Keep VIDEO_CC_XO_CLK ALWAYS-ON */
> regmap_update_bits(regmap, 0x984, 0x1, 0x1);
>
> - return qcom_cc_really_probe(pdev, &video_cc_sm8150_desc, regmap);
> + ret = qcom_cc_really_probe(pdev, &video_cc_sm8150_desc, regmap);
> +
> + pm_runtime_put_sync(&pdev->dev);
> +
> + return ret;
> }
>
> static struct platform_driver video_cc_sm8150_driver = {
>
On Fri, 01 Dec 2023 15:20:23 +0530, Satya Priya Kakitapalli wrote:
> Add runtime support for videocc on SM8150 and update the resets
> and video_pll0_config configuration.
>
> Changes since v2:
> - Update pm_runtime_put to pm_runtime_put_sync
> - Link to v2: https://lore.kernel.org/all/[email protected]/
>
> [...]
Applied, thanks!
[2/4] clk: qcom: videocc-sm8150: Update the videocc resets
commit: 1fd9a939db24d2f66e48f8bca3e3654add3fa205
[3/4] clk: qcom: videocc-sm8150: Add missing PLL config property
commit: 71f130c9193f613d497f7245365ed05ffdb0a401
[4/4] clk: qcom: videocc-sm8150: Add runtime PM support
commit: f6bda45310ff165fdd69b8c3eb6679f0552f8a5f
Best regards,
--
Bjorn Andersson <[email protected]>