This series adds support for the ADSP, CDSP and WPSS remoteprocs found
on SC7280. And finally enable them and WiFi on the QCM6490-based
Fairphone 5 smartphone.
The first two patches are fixes for the MPSS to fix some dt validation
issues. They're included in this series to avoid conflicts with the
later patches and keep it simpler.
Then there's two patches reorganizing the reserved-memory setup for
sc7280 in preparations for the new remoteprocs.
Please note, that the ChromeOS-based devices using SC7280 need different
driver and dts support, similar to how there's already
qcom,sc7280-mpss-pas for "standard" firmware and there's
qcom,sc7280-mss-pil for ChromeOS firmware.
I'm aware of the series also adding SC7280 ADSP support with the last
revision sent in June this year.
https://lore.kernel.org/linux-arm-msm/[email protected]/
However there's some differences since that series added the "pil"
variant for ChromeOS, not "pas" for standard firmware. Also it seems on
ChromeOS devices gpr+q6apm+q6prm is used. On my device it appears to be
instead apr+q6afe+q6asm+q6adm but I don't add either in this series to
keep it a bit simpler, and I couldn't test much of that yet.
Signed-off-by: Luca Weiss <[email protected]>
---
Changes in v3:
- Rebase on qcom for-next and resolve conflicts
- Pick up tags
- Link to v2: https://lore.kernel.org/r/[email protected]
Changes in v2:
- Add patch renaming memory@ reserved-memory nodes (preparation for
next)
- Add patch moving mpss_mem and wpss_mem to sc7280.dtsi
- Follow *_mem node being in sc7280.dtsi also for ADSP & CDSP patches
- Use (squashed) .mbn instead of (split) .mdt for FP5
- Set qcom,ath11k-calibration-variant for FP5
- Pick up tags (except for Krzysztof's R-b for ADSP & CDSP since there
were changes)
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Luca Weiss (11):
dt-bindings: remoteproc: qcom: sc7180-pas: Fix SC7280 MPSS PD-names
arm64: dts: qcom: sc7280: Remove unused second MPSS reg
arm64: dts: qcom: sc7280: Rename reserved-memory nodes
arm64: dts: qcom: sc7280*: move MPSS and WPSS memory to dtsi
dt-bindings: remoteproc: qcom: sc7180-pas: Add SC7280 compatibles
remoteproc: qcom_q6v5_pas: Add SC7280 ADSP, CDSP & WPSS
arm64: dts: qcom: sc7280: Use WPSS PAS instead of PIL
arm64: dts: qcom: sc7280: Add ADSP node
arm64: dts: qcom: sc7280: Add CDSP node
arm64: dts: qcom: qcm6490-fairphone-fp5: Enable various remoteprocs
arm64: dts: qcom: qcm6490-fairphone-fp5: Enable WiFi
.../bindings/remoteproc/qcom,sc7180-pas.yaml | 21 ++
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 45 ++--
arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 35 ++-
.../boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi | 7 +-
.../boot/dts/qcom/sc7280-herobrine-wifi-sku.dtsi | 1 +
arch/arm64/boot/dts/qcom/sc7280.dtsi | 271 +++++++++++++++++++--
drivers/remoteproc/qcom_q6v5_pas.c | 19 ++
7 files changed, 336 insertions(+), 63 deletions(-)
---
base-commit: e7f403a575a315ecf79ee4f411cc76bb60bae2f6
change-id: 20231027-sc7280-remoteprocs-048208cc1e13
Best regards,
--
Luca Weiss <[email protected]>
The bindings for sc7280-mpss-pas neither expects a second reg nor a
reg-names property, which is only required by the sc7280-mss-pil
bindings.
Move it to sc7280-herobrine-lte-sku.dtsi, the only place where that
other compatible is used.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi | 2 ++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi
index 95505549adcc..203274c10532 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi
@@ -33,6 +33,8 @@ &ipa {
&remoteproc_mpss {
compatible = "qcom,sc7280-mss-pil";
+ reg = <0 0x04080000 0 0x10000>, <0 0x04180000 0 0x48>;
+ reg-names = "qdsp6", "rmb";
clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
<&gcc GCC_MSS_OFFLINE_AXI_CLK>,
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 35208248f8cd..1b40e18ff152 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2860,8 +2860,7 @@ adreno_smmu: iommu@3da0000 {
remoteproc_mpss: remoteproc@4080000 {
compatible = "qcom,sc7280-mpss-pas";
- reg = <0 0x04080000 0 0x10000>, <0 0x04180000 0 0x48>;
- reg-names = "qdsp6", "rmb";
+ reg = <0 0x04080000 0 0x10000>;
interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
--
2.43.0
It was clarified a while ago that reserved-memory nodes shouldn't be
called memory@ but should have a descriptive name. Update sc7280.dtsi to
follow that.
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 1b40e18ff152..f4d02d9dcb55 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -92,63 +92,63 @@ reserved-memory {
#size-cells = <2>;
ranges;
- wlan_ce_mem: memory@4cd000 {
+ wlan_ce_mem: wlan-ce@4cd000 {
no-map;
reg = <0x0 0x004cd000 0x0 0x1000>;
};
- hyp_mem: memory@80000000 {
+ hyp_mem: hyp@80000000 {
reg = <0x0 0x80000000 0x0 0x600000>;
no-map;
};
- xbl_mem: memory@80600000 {
+ xbl_mem: xbl@80600000 {
reg = <0x0 0x80600000 0x0 0x200000>;
no-map;
};
- aop_mem: memory@80800000 {
+ aop_mem: aop@80800000 {
reg = <0x0 0x80800000 0x0 0x60000>;
no-map;
};
- aop_cmd_db_mem: memory@80860000 {
+ aop_cmd_db_mem: aop-cmd-db@80860000 {
reg = <0x0 0x80860000 0x0 0x20000>;
compatible = "qcom,cmd-db";
no-map;
};
- reserved_xbl_uefi_log: memory@80880000 {
+ reserved_xbl_uefi_log: xbl-uefi-res@80880000 {
reg = <0x0 0x80884000 0x0 0x10000>;
no-map;
};
- sec_apps_mem: memory@808ff000 {
+ sec_apps_mem: sec-apps@808ff000 {
reg = <0x0 0x808ff000 0x0 0x1000>;
no-map;
};
- smem_mem: memory@80900000 {
+ smem_mem: smem@80900000 {
reg = <0x0 0x80900000 0x0 0x200000>;
no-map;
};
- cpucp_mem: memory@80b00000 {
+ cpucp_mem: cpucp@80b00000 {
no-map;
reg = <0x0 0x80b00000 0x0 0x100000>;
};
- wlan_fw_mem: memory@80c00000 {
+ wlan_fw_mem: wlan-fw@80c00000 {
reg = <0x0 0x80c00000 0x0 0xc00000>;
no-map;
};
- video_mem: memory@8b200000 {
+ video_mem: video@8b200000 {
reg = <0x0 0x8b200000 0x0 0x500000>;
no-map;
};
- ipa_fw_mem: memory@8b700000 {
+ ipa_fw_mem: ipa-fw@8b700000 {
reg = <0 0x8b700000 0 0x10000>;
no-map;
};
@@ -158,7 +158,7 @@ gpu_zap_mem: zap@8b71a000 {
no-map;
};
- rmtfs_mem: memory@9c900000 {
+ rmtfs_mem: rmtfs@9c900000 {
compatible = "qcom,rmtfs-mem";
reg = <0x0 0x9c900000 0x0 0x280000>;
no-map;
--
2.43.0
It appears that all SC7280-based devices so far have mpss_mem and
wpss_mem on the same reg with the same size.
Also these memory regions are referenced already in sc7280.dtsi so
that's where they should also be defined.
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 10 ----------
arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 5 -----
arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi | 5 -----
arch/arm64/boot/dts/qcom/sc7280-herobrine-wifi-sku.dtsi | 1 +
arch/arm64/boot/dts/qcom/sc7280.dtsi | 10 ++++++++++
5 files changed, 11 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
index de49bb11f3c7..10f4c75aed3f 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
@@ -87,16 +87,6 @@ cdsp_mem: cdsp@88f00000 {
no-map;
};
- mpss_mem: mpss@8b800000 {
- reg = <0x0 0x8b800000 0x0 0xf600000>;
- no-map;
- };
-
- wpss_mem: wpss@9ae00000 {
- reg = <0x0 0x9ae00000 0x0 0x1900000>;
- no-map;
- };
-
rmtfs_mem: memory@f8500000 {
compatible = "qcom,rmtfs-mem";
reg = <0x0 0xf8500000 0x0 0x600000>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
index 186aa82ce662..fd3ff576d1fc 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
@@ -40,11 +40,6 @@ venus_mem: memory@8b200000 {
reg = <0x0 0x8b200000 0x0 0x500000>;
no-map;
};
-
- wpss_mem: memory@9ae00000 {
- reg = <0x0 0x9ae00000 0x0 0x1900000>;
- no-map;
- };
};
};
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi
index 203274c10532..b721a8546800 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi
@@ -8,11 +8,6 @@
/ {
reserved-memory {
- mpss_mem: memory@8b800000 {
- reg = <0x0 0x8b800000 0x0 0xf600000>;
- no-map;
- };
-
mba_mem: memory@9c700000 {
reg = <0x0 0x9c700000 0x0 0x200000>;
no-map;
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-wifi-sku.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-wifi-sku.dtsi
index 2febd6126d4c..3ebc915f0dc2 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-wifi-sku.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-wifi-sku.dtsi
@@ -7,5 +7,6 @@
/* WIFI SKUs save 256M by not having modem/mba/rmtfs memory regions defined. */
+/delete-node/ &mpss_mem;
/delete-node/ &remoteproc_mpss;
/delete-node/ &rmtfs_mem;
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index f4d02d9dcb55..221ab163c8ad 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -158,6 +158,16 @@ gpu_zap_mem: zap@8b71a000 {
no-map;
};
+ mpss_mem: mpss@8b800000 {
+ reg = <0x0 0x8b800000 0x0 0xf600000>;
+ no-map;
+ };
+
+ wpss_mem: wpss@9ae00000 {
+ reg = <0x0 0x9ae00000 0x0 0x1900000>;
+ no-map;
+ };
+
rmtfs_mem: rmtfs@9c900000 {
compatible = "qcom,rmtfs-mem";
reg = <0x0 0x9c900000 0x0 0x280000>;
--
2.43.0
Add the compatibles and constraints for the ADSP, CDSP and WPSS found on
the SC7280 SoC.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
---
.../bindings/remoteproc/qcom,sc7180-pas.yaml | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
index 6f0bd6fa5d26..c054b84fdcd5 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
@@ -18,7 +18,10 @@ properties:
enum:
- qcom,sc7180-adsp-pas
- qcom,sc7180-mpss-pas
+ - qcom,sc7280-adsp-pas
+ - qcom,sc7280-cdsp-pas
- qcom,sc7280-mpss-pas
+ - qcom,sc7280-wpss-pas
reg:
maxItems: 1
@@ -75,6 +78,7 @@ allOf:
compatible:
enum:
- qcom,sc7180-adsp-pas
+ - qcom,sc7280-adsp-pas
then:
properties:
power-domains:
@@ -120,6 +124,23 @@ allOf:
- const: cx
- const: mss
+ - if:
+ properties:
+ compatible:
+ enum:
+ - qcom,sc7280-cdsp-pas
+ - qcom,sc7280-wpss-pas
+ then:
+ properties:
+ power-domains:
+ items:
+ - description: CX power domain
+ - description: MX power domain
+ power-domain-names:
+ items:
+ - const: cx
+ - const: mx
+
unevaluatedProperties: false
examples:
--
2.43.0
The power domains for MPSS on SC7280 are actually named CX and MSS, and
not CX and MX. Adjust the name which also aligns the bindings with the
dts and fixes validation.
Fixes: 8bb92d6fd0b3 ("dt-bindings: remoteproc: qcom,sc7180-pas: split into separate file")
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
---
Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
index f10f329677d8..6f0bd6fa5d26 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
@@ -114,11 +114,11 @@ allOf:
power-domains:
items:
- description: CX power domain
- - description: MX power domain
+ - description: MSS power domain
power-domain-names:
items:
- const: cx
- - const: mx
+ - const: mss
unevaluatedProperties: false
--
2.43.0
Add support for the ADSP, CDSP and WPSS remoteprocs found on the SC7280
SoC using the q6v5-pas driver.
This driver can be used on regular LA ("Linux Android") based releases,
however the SC7280 ChromeOS devices need different driver support due to
firmware differences.
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
---
drivers/remoteproc/qcom_q6v5_pas.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
index 913a5d2068e8..a9dd58608052 100644
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -1165,6 +1165,22 @@ static const struct adsp_data sm8550_mpss_resource = {
.region_assign_idx = 2,
};
+static const struct adsp_data sc7280_wpss_resource = {
+ .crash_reason_smem = 626,
+ .firmware_name = "wpss.mdt",
+ .pas_id = 6,
+ .auto_boot = true,
+ .proxy_pd_names = (char*[]){
+ "cx",
+ "mx",
+ NULL
+ },
+ .load_state = "wpss",
+ .ssr_name = "wpss",
+ .sysmon_name = "wpss",
+ .ssctl_id = 0x19,
+};
+
static const struct of_device_id adsp_of_match[] = {
{ .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init},
{ .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource},
@@ -1178,7 +1194,10 @@ static const struct of_device_id adsp_of_match[] = {
{ .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
{ .compatible = "qcom,sc7180-adsp-pas", .data = &sm8250_adsp_resource},
{ .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init},
+ { .compatible = "qcom,sc7280-adsp-pas", .data = &sm8350_adsp_resource},
+ { .compatible = "qcom,sc7280-cdsp-pas", .data = &sm6350_cdsp_resource},
{ .compatible = "qcom,sc7280-mpss-pas", .data = &mpss_resource_init},
+ { .compatible = "qcom,sc7280-wpss-pas", .data = &sc7280_wpss_resource},
{ .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource},
{ .compatible = "qcom,sc8180x-cdsp-pas", .data = &sm8150_cdsp_resource},
{ .compatible = "qcom,sc8180x-mpss-pas", .data = &sc8180x_mpss_resource},
--
2.43.0
The wpss-pil driver wants to manage too many resources that cannot be
touched with standard Qualcomm firmware.
Use the compatible from the PAS driver and move the ChromeOS-specific
bits to sc7280-chrome-common.dtsi.
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 19 ++++++++++++++++++-
arch/arm64/boot/dts/qcom/sc7280.dtsi | 15 +++------------
2 files changed, 21 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
index fd3ff576d1fc..8f7682fe254a 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
@@ -92,8 +92,25 @@ spi_flash: flash@0 {
};
&remoteproc_wpss {
- status = "okay";
+ compatible = "qcom,sc7280-wpss-pil";
+ clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>,
+ <&gcc GCC_WPSS_AHB_CLK>,
+ <&gcc GCC_WPSS_RSCP_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "ahb_bdg",
+ "ahb",
+ "rscp",
+ "xo";
+
+ resets = <&aoss_reset AOSS_CC_WCSS_RESTART>,
+ <&pdc_reset PDC_WPSS_SYNC_RESET>;
+ reset-names = "restart", "pdc_sync";
+
+ qcom,halt-regs = <&tcsr_1 0x17000>;
+
firmware-name = "ath11k/WCN6750/hw1.0/wpss.mdt";
+
+ status = "okay";
};
&scm {
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 221ab163c8ad..f404276361fa 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3601,7 +3601,7 @@ qspi: spi@88dc000 {
};
remoteproc_wpss: remoteproc@8a00000 {
- compatible = "qcom,sc7280-wpss-pil";
+ compatible = "qcom,sc7280-wpss-pas";
reg = <0 0x08a00000 0 0x10000>;
interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_EDGE_RISING>,
@@ -3613,12 +3613,8 @@ remoteproc_wpss: remoteproc@8a00000 {
interrupt-names = "wdog", "fatal", "ready", "handover",
"stop-ack", "shutdown-ack";
- clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>,
- <&gcc GCC_WPSS_AHB_CLK>,
- <&gcc GCC_WPSS_RSCP_CLK>,
- <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "ahb_bdg", "ahb",
- "rscp", "xo";
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
power-domains = <&rpmhpd SC7280_CX>,
<&rpmhpd SC7280_MX>;
@@ -3631,11 +3627,6 @@ remoteproc_wpss: remoteproc@8a00000 {
qcom,smem-states = <&wpss_smp2p_out 0>;
qcom,smem-state-names = "stop";
- resets = <&aoss_reset AOSS_CC_WCSS_RESTART>,
- <&pdc_reset PDC_WPSS_SYNC_RESET>;
- reset-names = "restart", "pdc_sync";
-
- qcom,halt-regs = <&tcsr_1 0x17000>;
status = "disabled";
--
2.43.0
Add the node for the ADSP found on the SC7280 SoC, using standard
Qualcomm firmware.
Remove the reserved-memory node from sc7280-chrome-common since CDSP is
currently not used there.
Acked-by: Konrad Dybcio <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 5 -
arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 6 +
arch/arm64/boot/dts/qcom/sc7280.dtsi | 143 +++++++++++++++++++++
3 files changed, 149 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
index b1ea31720d7b..9c25e28a62d9 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
@@ -77,11 +77,6 @@ cont_splash_mem: cont-splash@e1000000 {
no-map;
};
- cdsp_mem: cdsp@88f00000 {
- reg = <0x0 0x88f00000 0x0 0x1e00000>;
- no-map;
- };
-
rmtfs_mem: memory@f8500000 {
compatible = "qcom,rmtfs-mem";
reg = <0x0 0xf8500000 0x0 0x600000>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
index a60fb58d1bf1..c53a5f32915a 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
@@ -17,6 +17,7 @@
* required by the setup for Chrome boards.
*/
+/delete-node/ &cdsp_mem;
/delete-node/ &gpu_zap_mem;
/delete-node/ &gpu_zap_shader;
/delete-node/ &hyp_mem;
@@ -86,6 +87,11 @@ spi_flash: flash@0 {
};
};
+/* Currently not used */
+&remoteproc_cdsp {
+ /delete-property/ memory-region;
+};
+
&remoteproc_wpss {
compatible = "qcom,sc7280-wpss-pil";
clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>,
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 6d319c8c6acf..0c25b4ecd0dc 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -148,6 +148,11 @@ adsp_mem: adsp@86700000 {
no-map;
};
+ cdsp_mem: cdsp@88f00000 {
+ reg = <0x0 0x88f00000 0x0 0x1e00000>;
+ no-map;
+ };
+
video_mem: video@8b200000 {
reg = <0x0 0x8b200000 0x0 0x500000>;
no-map;
@@ -3842,6 +3847,144 @@ nsp_noc: interconnect@a0c0000 {
qcom,bcm-voters = <&apps_bcm_voter>;
};
+ remoteproc_cdsp: remoteproc@a300000 {
+ compatible = "qcom,sc7280-cdsp-pas";
+ reg = <0 0x0a300000 0 0x10000>;
+
+ interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
+ <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready", "handover",
+ "stop-ack", "shutdown-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd SC7280_CX>,
+ <&rpmhpd SC7280_MX>;
+ power-domain-names = "cx", "mx";
+
+ interconnects = <&nsp_noc MASTER_CDSP_PROC 0 &mc_virt SLAVE_EBI1 0>;
+
+ memory-region = <&cdsp_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&cdsp_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_CDSP
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "cdsp";
+ qcom,remote-pid = <5>;
+
+ fastrpc {
+ compatible = "qcom,fastrpc";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+ label = "cdsp";
+ qcom,non-secure-domain;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb@1 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <1>;
+ iommus = <&apps_smmu 0x11a1 0x0420>,
+ <&apps_smmu 0x1181 0x0420>;
+ };
+
+ compute-cb@2 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <2>;
+ iommus = <&apps_smmu 0x11a2 0x0420>,
+ <&apps_smmu 0x1182 0x0420>;
+ };
+
+ compute-cb@3 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <3>;
+ iommus = <&apps_smmu 0x11a3 0x0420>,
+ <&apps_smmu 0x1183 0x0420>;
+ };
+
+ compute-cb@4 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <4>;
+ iommus = <&apps_smmu 0x11a4 0x0420>,
+ <&apps_smmu 0x1184 0x0420>;
+ };
+
+ compute-cb@5 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <5>;
+ iommus = <&apps_smmu 0x11a5 0x0420>,
+ <&apps_smmu 0x1185 0x0420>;
+ };
+
+ compute-cb@6 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <6>;
+ iommus = <&apps_smmu 0x11a6 0x0420>,
+ <&apps_smmu 0x1186 0x0420>;
+ };
+
+ compute-cb@7 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <7>;
+ iommus = <&apps_smmu 0x11a7 0x0420>,
+ <&apps_smmu 0x1187 0x0420>;
+ };
+
+ compute-cb@8 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <8>;
+ iommus = <&apps_smmu 0x11a8 0x0420>,
+ <&apps_smmu 0x1188 0x0420>;
+ };
+
+ /* note: secure cb9 in downstream */
+
+ compute-cb@11 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <11>;
+ iommus = <&apps_smmu 0x11ab 0x0420>,
+ <&apps_smmu 0x118b 0x0420>;
+ };
+
+ compute-cb@12 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <12>;
+ iommus = <&apps_smmu 0x11ac 0x0420>,
+ <&apps_smmu 0x118c 0x0420>;
+ };
+
+ compute-cb@13 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <13>;
+ iommus = <&apps_smmu 0x11ad 0x0420>,
+ <&apps_smmu 0x118d 0x0420>;
+ };
+
+ compute-cb@14 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <14>;
+ iommus = <&apps_smmu 0x11ae 0x0420>,
+ <&apps_smmu 0x118e 0x0420>;
+ };
+ };
+ };
+ };
+
usb_1: usb@a6f8800 {
compatible = "qcom,sc7280-dwc3", "qcom,dwc3";
reg = <0 0x0a6f8800 0 0x400>;
--
2.43.0
Add the node for the ADSP found on the SC7280 SoC, using standard
Qualcomm firmware.
Acked-by: Konrad Dybcio <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 5 --
arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 5 --
arch/arm64/boot/dts/qcom/sc7280.dtsi | 74 ++++++++++++++++++++++
3 files changed, 74 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
index 10f4c75aed3f..b1ea31720d7b 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
@@ -77,11 +77,6 @@ cont_splash_mem: cont-splash@e1000000 {
no-map;
};
- adsp_mem: adsp@86700000 {
- reg = <0x0 0x86700000 0x0 0x2800000>;
- no-map;
- };
-
cdsp_mem: cdsp@88f00000 {
reg = <0x0 0x88f00000 0x0 0x1e00000>;
no-map;
diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
index 8f7682fe254a..a60fb58d1bf1 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
@@ -26,11 +26,6 @@
/ {
reserved-memory {
- adsp_mem: memory@86700000 {
- reg = <0x0 0x86700000 0x0 0x2800000>;
- no-map;
- };
-
camera_mem: memory@8ad00000 {
reg = <0x0 0x8ad00000 0x0 0x500000>;
no-map;
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index f404276361fa..6d319c8c6acf 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -143,6 +143,11 @@ wlan_fw_mem: wlan-fw@80c00000 {
no-map;
};
+ adsp_mem: adsp@86700000 {
+ reg = <0x0 0x86700000 0x0 0x2800000>;
+ no-map;
+ };
+
video_mem: video@8b200000 {
reg = <0x0 0x8b200000 0x0 0x500000>;
no-map;
@@ -3600,6 +3605,75 @@ qspi: spi@88dc000 {
status = "disabled";
};
+ remoteproc_adsp: remoteproc@3700000 {
+ compatible = "qcom,sc7280-adsp-pas";
+ reg = <0 0x03700000 0 0x100>;
+
+ interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
+ <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready", "handover",
+ "stop-ack", "shutdown-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd SC7280_LCX>,
+ <&rpmhpd SC7280_LMX>;
+ power-domain-names = "lcx", "lmx";
+
+ memory-region = <&adsp_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&adsp_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+
+ mboxes = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "lpass";
+ qcom,remote-pid = <2>;
+
+ fastrpc {
+ compatible = "qcom,fastrpc";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+ label = "adsp";
+ qcom,non-secure-domain;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb@3 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <3>;
+ iommus = <&apps_smmu 0x1803 0x0>;
+ };
+
+ compute-cb@4 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <4>;
+ iommus = <&apps_smmu 0x1804 0x0>;
+ };
+
+ compute-cb@5 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <5>;
+ iommus = <&apps_smmu 0x1805 0x0>;
+ };
+ };
+ };
+ };
+
remoteproc_wpss: remoteproc@8a00000 {
compatible = "qcom,sc7280-wpss-pas";
reg = <0 0x08a00000 0 0x10000>;
--
2.43.0
Now that the WPSS remoteproc is enabled, enable wifi so we can use it.
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
---
Depends on (just to resolve merge conflicts, could also rebase without
that):
https://lore.kernel.org/linux-arm-msm/[email protected]/
---
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
index 830dee4f2a37..03ec0115b424 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
@@ -914,3 +914,8 @@ &venus {
firmware-name = "qcom/qcm6490/fairphone5/venus.mbn";
status = "okay";
};
+
+&wifi {
+ qcom,ath11k-calibration-variant = "Fairphone_5";
+ status = "okay";
+};
--
2.43.0
Enable the ADSP, CDSP, MPSS and WPSS that are found on the SoC.
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
index 9c25e28a62d9..830dee4f2a37 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
@@ -691,6 +691,26 @@ &qupv3_id_1 {
status = "okay";
};
+&remoteproc_adsp {
+ firmware-name = "qcom/qcm6490/fairphone5/adsp.mbn";
+ status = "okay";
+};
+
+&remoteproc_cdsp {
+ firmware-name = "qcom/qcm6490/fairphone5/cdsp.mbn";
+ status = "okay";
+};
+
+&remoteproc_mpss {
+ firmware-name = "qcom/qcm6490/fairphone5/modem.mbn";
+ status = "okay";
+};
+
+&remoteproc_wpss {
+ firmware-name = "qcom/qcm6490/fairphone5/wpss.mbn";
+ status = "okay";
+};
+
&sdc2_clk {
drive-strength = <16>;
bias-disable;
--
2.43.0
On Fri, 08 Dec 2023 16:07:56 +0100, Luca Weiss wrote:
> This series adds support for the ADSP, CDSP and WPSS remoteprocs found
> on SC7280. And finally enable them and WiFi on the QCM6490-based
> Fairphone 5 smartphone.
>
> The first two patches are fixes for the MPSS to fix some dt validation
> issues. They're included in this series to avoid conflicts with the
> later patches and keep it simpler.
>
> [...]
Applied, thanks!
[07/11] arm64: dts: qcom: sc7280: Use WPSS PAS instead of PIL
commit: 0bcbf092560cc1c163156af67176cbb4b8a327f9
[08/11] arm64: dts: qcom: sc7280: Add ADSP node
commit: 3658e411efcbb4df882763b09ae49efaa86585b4
[09/11] arm64: dts: qcom: sc7280: Add CDSP node
commit: df62402e5ff9df1960622b4d7bc5dd43dc8e7b75
[10/11] arm64: dts: qcom: qcm6490-fairphone-fp5: Enable various remoteprocs
commit: 5ffc529fa5dfe428ab9a7866b58b964a376dd953
[11/11] arm64: dts: qcom: qcm6490-fairphone-fp5: Enable WiFi
commit: 16e84c137919dd91c1cb1102a3d536fce2d6ee94
Best regards,
--
Bjorn Andersson <[email protected]>
On Fri, 08 Dec 2023 16:07:56 +0100, Luca Weiss wrote:
> This series adds support for the ADSP, CDSP and WPSS remoteprocs found
> on SC7280. And finally enable them and WiFi on the QCM6490-based
> Fairphone 5 smartphone.
>
> The first two patches are fixes for the MPSS to fix some dt validation
> issues. They're included in this series to avoid conflicts with the
> later patches and keep it simpler.
>
> [...]
Applied, thanks!
[01/11] dt-bindings: remoteproc: qcom: sc7180-pas: Fix SC7280 MPSS PD-names
commit: 9d598fab9731055638c6e9333c4f21aa0d174a48
[05/11] dt-bindings: remoteproc: qcom: sc7180-pas: Add SC7280 compatibles
commit: 11eff1020440060c53d2261531432927c9fb4ee3
[06/11] remoteproc: qcom_q6v5_pas: Add SC7280 ADSP, CDSP & WPSS
commit: 300ed425dfa99f6926299ec196a1eedf05f47b21
Best regards,
--
Bjorn Andersson <[email protected]>
On Fri, 08 Dec 2023 16:07:56 +0100, Luca Weiss wrote:
> This series adds support for the ADSP, CDSP and WPSS remoteprocs found
> on SC7280. And finally enable them and WiFi on the QCM6490-based
> Fairphone 5 smartphone.
>
> The first two patches are fixes for the MPSS to fix some dt validation
> issues. They're included in this series to avoid conflicts with the
> later patches and keep it simpler.
>
> [...]
Applied, thanks!
[02/11] arm64: dts: qcom: sc7280: Remove unused second MPSS reg
commit: 419618bd90f6b2c3adec87beb0d62adfcae619eb
[03/11] arm64: dts: qcom: sc7280: Rename reserved-memory nodes
commit: 6615713c10c974d13a13297e95acd304e419dfba
[04/11] arm64: dts: qcom: sc7280*: move MPSS and WPSS memory to dtsi
commit: 5037ca35ce42a962ea1b03895effd632a516b3b7
Best regards,
--
Bjorn Andersson <[email protected]>