2023-12-10 15:24:57

by Chukun Pan

Subject: [PATCH 1/1] arm64: dts: qcom: ipq8074: add MicroSD node

Enable MicroSD card found on ipq8074 devices.
Tested fine when SD card IO voltage is 3.3v.

Signed-off-by: Chukun Pan <[email protected]>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index a4f7ae35be27..4f23c4459112 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -422,6 +422,26 @@ sdhc_1: mmc@7824900 {
status = "disabled";
};

+ sdhc_2: mmc@7864900 {
+ compatible = "qcom,sdhci-msm-v4";
+ reg = <0x7864900 0x500>, <0x7864000 0x800>;
+ reg-names = "hc", "core";
+
+ interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+
+ clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+ <&gcc GCC_SDCC2_APPS_CLK>,
+ <&xo>;
+ clock-names = "iface", "core", "xo";
+ resets = <&gcc GCC_SDCC2_BCR>;
+ max-frequency = <192000000>;
+ bus-width = <4>;
+
+ status = "disabled";
+ };
+
blsp_dma: dma-controller@7884000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x07884000 0x2b000>;
--
2.25.1

2023-12-11 08:41:50

by Krzysztof Kozlowski

Subject: Re: [PATCH 1/1] arm64: dts: qcom: ipq8074: add MicroSD node

On 10/12/2023 16:20, Chukun Pan wrote:
> Enable MicroSD card found on ipq8074 devices.
> Tested fine when SD card IO voltage is 3.3v.
>
> Signed-off-by: Chukun Pan <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> index a4f7ae35be27..4f23c4459112 100644
> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> @@ -422,6 +422,26 @@ sdhc_1: mmc@7824900 {
> status = "disabled";
> };
>
> + sdhc_2: mmc@7864900 {
> + compatible = "qcom,sdhci-msm-v4";

That's deprecated.

> + reg = <0x7864900 0x500>, <0x7864000 0x800>;
> + reg-names = "hc", "core";
> +
> + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hc_irq", "pwr_irq";
> +
> + clocks = <&gcc GCC_SDCC2_AHB_CLK>,
> + <&gcc GCC_SDCC2_APPS_CLK>,
> + <&xo>;
> + clock-names = "iface", "core", "xo";
> + resets = <&gcc GCC_SDCC2_BCR>;
> + max-frequency = <192000000>;
> + bus-width = <4>;
> +
> + status = "disabled";

No board users?

Best regards,
Krzysztof