Add YAML doc for the system tick counter which is present on Ralink SoCs.
cc: Daniel Lezcano <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Sergio Paracuellos <[email protected]>
---
Changes in v2 RESEND:
- Add Daniel Lezcano to CC in the patch itself.
Changes in v2:
- Add Rob's Reviewed-by tag.
v1: https://lore.kernel.org/lkml/CAMhs-H_9kAdOfR-RaJWqAq6d3S3DXtKJqWy-EWCu0-ZjWKB9Sw@mail.gmail.com/T/#re9225265416ca8463c5f06d736f9834ae75efe0c
I am sending this with Rob's RB added since I ping for the v1 multiple
times without response. So I can be missing something or the patch is
lost for any reason. Thanks!
.../bindings/timer/ralink,cevt-systick.yaml | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml
diff --git a/Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml b/Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml
new file mode 100644
index 000000000000..59d97feddf4e
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/ralink,cevt-systick.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: System tick counter present in Ralink family SoCs
+
+maintainers:
+ - Sergio Paracuellos <[email protected]>
+
+properties:
+ compatible:
+ const: ralink,cevt-systick
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ systick@d00 {
+ compatible = "ralink,cevt-systick";
+ reg = <0xd00 0x10>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <7>;
+ };
+...
--
2.25.1
Hi,
On Tue, Dec 12, 2023 at 10:34 AM Sergio Paracuellos
<[email protected]> wrote:
>
> Add YAML doc for the system tick counter which is present on Ralink SoCs.
>
> cc: Daniel Lezcano <[email protected]>
> Reviewed-by: Rob Herring <[email protected]>
> Signed-off-by: Sergio Paracuellos <[email protected]>
> ---
> Changes in v2 RESEND:
> - Add Daniel Lezcano to CC in the patch itself.
> Changes in v2:
> - Add Rob's Reviewed-by tag.
>
> v1: https://lore.kernel.org/lkml/CAMhs-H_9kAdOfR-RaJWqAq6d3S3DXtKJqWy-EWCu0-ZjWKB9Sw@mail.gmail.com/T/#re9225265416ca8463c5f06d736f9834ae75efe0c
>
> I am sending this with Rob's RB added since I ping for the v1 multiple
> times without response. So I can be missing something or the patch is
> lost for any reason. Thanks!
>
> .../bindings/timer/ralink,cevt-systick.yaml | 38 +++++++++++++++++++
> 1 file changed, 38 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml
>
> diff --git a/Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml b/Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml
> new file mode 100644
> index 000000000000..59d97feddf4e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml
> @@ -0,0 +1,38 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/ralink,cevt-systick.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: System tick counter present in Ralink family SoCs
> +
> +maintainers:
> + - Sergio Paracuellos <[email protected]>
> +
> +properties:
> + compatible:
> + const: ralink,cevt-systick
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + systick@d00 {
> + compatible = "ralink,cevt-systick";
> + reg = <0xd00 0x10>;
> +
> + interrupt-parent = <&cpuintc>;
> + interrupts = <7>;
> + };
> +...
> --
> 2.25.1
>
Gentle ping on this patch. It has been a while since it has been sent.
Thanks,
Sergio Paracuellos
Hi Sergio,
On 23/02/2024 12:27, Sergio Paracuellos wrote:
> Hi,
>
> On Tue, Dec 12, 2023 at 10:34 AM Sergio Paracuellos
> <[email protected]> wrote:
>>
>> Add YAML doc for the system tick counter which is present on Ralink SoCs.
>>
>> cc: Daniel Lezcano <[email protected]>
>> Reviewed-by: Rob Herring <[email protected]>
>> Signed-off-by: Sergio Paracuellos <[email protected]>
>> ---
>> Changes in v2 RESEND:
>> - Add Daniel Lezcano to CC in the patch itself.
>> Changes in v2:
>> - Add Rob's Reviewed-by tag.
Applied, thanks
Sorry for missing this patch
> Gentle ping on this patch. It has been a while since it has been sent.
>
> Thanks,
> Sergio Paracuellos
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
On Fri, Feb 23, 2024 at 1:23 PM Daniel Lezcano
<[email protected]> wrote:
>
>
> Hi Sergio,
>
> On 23/02/2024 12:27, Sergio Paracuellos wrote:
> > Hi,
> >
> > On Tue, Dec 12, 2023 at 10:34 AM Sergio Paracuellos
> > <[email protected]> wrote:
> >>
> >> Add YAML doc for the system tick counter which is present on Ralink SoCs.
> >>
> >> cc: Daniel Lezcano <[email protected]>
> >> Reviewed-by: Rob Herring <[email protected]>
> >> Signed-off-by: Sergio Paracuellos <[email protected]>
> >> ---
> >> Changes in v2 RESEND:
> >> - Add Daniel Lezcano to CC in the patch itself.
> >> Changes in v2:
> >> - Add Rob's Reviewed-by tag.
>
> Applied, thanks
>
> Sorry for missing this patch
No problem :). Thanks for letting me know.
Best regards,
Sergio Paracuellos
>
> > Gentle ping on this patch. It has been a while since it has been sent.
> >
> > Thanks,
> > Sergio Paracuellos
>
> --
> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter |
> <http://www.linaro.org/linaro-blog/> Blog
>
The following commit has been merged into the timers/core branch of tip:
Commit-ID: ec64db6955c5ad7e8fd03f7a52f8df84f943a9b8
Gitweb: https://git.kernel.org/tip/ec64db6955c5ad7e8fd03f7a52f8df84f943a9b8
Author: Sergio Paracuellos <[email protected]>
AuthorDate: Tue, 12 Dec 2023 10:34:43 +01:00
Committer: Daniel Lezcano <[email protected]>
CommitterDate: Fri, 23 Feb 2024 13:22:45 +01:00
dt-bindings: timer: add Ralink SoCs system tick counter
Add YAML doc for the system tick counter which is present on Ralink SoCs.
cc: Daniel Lezcano <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Sergio Paracuellos <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml | 38 ++++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml
diff --git a/Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml b/Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml
new file mode 100644
index 0000000..59d97fe
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/ralink,cevt-systick.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: System tick counter present in Ralink family SoCs
+
+maintainers:
+ - Sergio Paracuellos <[email protected]>
+
+properties:
+ compatible:
+ const: ralink,cevt-systick
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ systick@d00 {
+ compatible = "ralink,cevt-systick";
+ reg = <0xd00 0x10>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <7>;
+ };
+...