This adds a pin control driver for the T-Head TH1520 RISC-V SoC used on
the Lichee Pi 4A and BeagleV Ahead boards and updates the device trees
to make use of it.
It can be easily tested using my th1520 branch at
https://github.com/esmil/linux.git
..which also adds the MMC, PWM, ethernet and USB drivers that have
been posted but are not upstream yet.
Jisheng: I've added this driver to the generic TH1520 entry in
MAINTAINERS like you did with your USB driver. Let me know if that's not
ok and I'll create a separate entry for this driver with me as
maintainer.
Drew: The last patch is purely based on reading the schematics. It'd be
great if you could give it a spin on real hardware.
/Emil
Emil Renner Berthing (8):
dt-bindings: pinctrl: Add thead,th1520-pinctrl bindings
pinctrl: Add driver for the T-Head TH1520 SoC
riscv: dts: thead: Add TH1520 pin control nodes
dt-bindings: gpio: dwapb: allow gpio-ranges
riscv: dts: thead: Add TH1520 GPIO ranges
riscv: dts: thead: Adjust TH1520 GPIO labels
riscv: dts: thead: Add TH1520 pinctrl settings for UART0
riscv: dtb: thead: Add BeagleV Ahead LEDs
.../bindings/gpio/snps,dw-apb-gpio.yaml | 2 +
.../pinctrl/thead,th1520-pinctrl.yaml | 156 ++++
MAINTAINERS | 1 +
.../boot/dts/thead/th1520-beaglev-ahead.dts | 83 ++
.../boot/dts/thead/th1520-lichee-pi-4a.dts | 28 +
arch/riscv/boot/dts/thead/th1520.dtsi | 53 +-
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-th1520.c | 796 ++++++++++++++++++
9 files changed, 1113 insertions(+), 16 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml
create mode 100644 drivers/pinctrl/pinctrl-th1520.c
--
2.40.1
Add gpio-ranges properties to the TH1520 device tree, so user space can
change basic pinconf settings for GPIOs and are not allowed to use pads
already used by other functions.
Adjust number of GPIOs available for the different controllers.
Signed-off-by: Emil Renner Berthing <[email protected]>
---
arch/riscv/boot/dts/thead/th1520.dtsi | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index 397d5c71bd3d..d5e2378a1afa 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -217,6 +217,7 @@ portc: gpio-controller@0 {
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
+ gpio-ranges = <&padctrl0_apsys 0 0 32>;
reg = <0>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -234,7 +235,8 @@ portd: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
- ngpios = <32>;
+ ngpios = <23>;
+ gpio-ranges = <&padctrl0_apsys 0 32 23>;
reg = <0>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -258,6 +260,7 @@ porta: gpio-controller@0 {
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
+ gpio-ranges = <&padctrl1_apsys 0 0 32>;
reg = <0>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -275,7 +278,8 @@ portb: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
- ngpios = <32>;
+ ngpios = <31>;
+ gpio-ranges = <&padctrl1_apsys 0 32 31>;
reg = <0>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -416,7 +420,8 @@ porte: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
- ngpios = <32>;
+ ngpios = <16>;
+ gpio-ranges = <&padctrl_aosys 0 9 16>;
reg = <0>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -439,7 +444,8 @@ portf: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
- ngpios = <32>;
+ ngpios = <23>;
+ gpio-ranges = <&padctrl_aosys 0 25 22>, <&padctrl_aosys 22 7 1>;
reg = <0>;
interrupt-controller;
#interrupt-cells = <2>;
--
2.40.1
Add nodes for the 5 user controllable LEDs on the BeagleV Ahead board.
Signed-off-by: Emil Renner Berthing <[email protected]>
---
.../boot/dts/thead/th1520-beaglev-ahead.dts | 55 +++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
index 54d86aab6656..35585eff6ab3 100644
--- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
+++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
@@ -7,6 +7,8 @@
/dts-v1/;
#include "th1520.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
/ {
model = "BeagleV Ahead";
@@ -34,7 +36,42 @@ chosen {
memory@0 {
device_type = "memory";
reg = <0x0 0x00000000 0x1 0x00000000>;
+ };
+ leds {
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins>;
+ compatible = "gpio-leds";
+
+ led-1 {
+ gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
+ color = <LED_COLOR_ID_BLUE>;
+ label = "led1";
+ };
+
+ led-2 {
+ gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
+ color = <LED_COLOR_ID_BLUE>;
+ label = "led2";
+ };
+
+ led-3 {
+ gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
+ color = <LED_COLOR_ID_BLUE>;
+ label = "led3";
+ };
+
+ led-4 {
+ gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
+ color = <LED_COLOR_ID_BLUE>;
+ label = "led4";
+ };
+
+ led-5 {
+ gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
+ color = <LED_COLOR_ID_BLUE>;
+ label = "led5";
+ };
};
};
@@ -58,6 +95,24 @@ &dmac0 {
status = "okay";
};
+&padctrl_aosys {
+ led_pins: led-0 {
+ led-pins {
+ pins = "AUDIO_PA8", /* GPIO4_8 */
+ "AUDIO_PA9", /* GPIO4_9 */
+ "AUDIO_PA10", /* GPIO4_10 */
+ "AUDIO_PA11", /* GPIO4_11 */
+ "AUDIO_PA12"; /* GPIO4_12 */
+ function = "3";
+ bias-disable;
+ drive-strength = <3>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+ };
+};
+
&padctrl0_apsys {
uart0_pins: uart0-0 {
tx-pins {
--
2.40.1
Add pinctrl settings for UART0 used as the default debug console on
both the Lichee Pi 4A and BeagleV Ahead boards.
Signed-off-by: Emil Renner Berthing <[email protected]>
---
.../boot/dts/thead/th1520-beaglev-ahead.dts | 26 +++++++++++++++++++
.../boot/dts/thead/th1520-lichee-pi-4a.dts | 26 +++++++++++++++++++
2 files changed, 52 insertions(+)
diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
index 91ba96588ae8..54d86aab6656 100644
--- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
+++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
@@ -58,6 +58,32 @@ &dmac0 {
status = "okay";
};
+&padctrl0_apsys {
+ uart0_pins: uart0-0 {
+ tx-pins {
+ pins = "UART0_TXD";
+ function = "0";
+ bias-disable;
+ drive-strength = <3>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+
+ rx-pins {
+ pins = "UART0_RXD";
+ function = "0";
+ bias-disable;
+ drive-strength = <1>;
+ input-enable;
+ input-schmitt-enable;
+ slew-rate = <0>;
+ };
+ };
+};
+
&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
status = "okay";
};
diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
index 0ae2c20d5641..260aa5e0769f 100644
--- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
@@ -29,6 +29,32 @@ chosen {
};
};
+&padctrl0_apsys {
+ uart0_pins: uart0-0 {
+ tx-pins {
+ pins = "UART0_TXD";
+ function = "0";
+ bias-disable;
+ drive-strength = <3>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+
+ rx-pins {
+ pins = "UART0_RXD";
+ function = "0";
+ bias-disable;
+ drive-strength = <1>;
+ input-enable;
+ input-schmitt-enable;
+ slew-rate = <0>;
+ };
+ };
+};
+
&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
status = "okay";
};
--
2.40.1
Allow the generic gpio-ranges property so GPIOs can be mapped to their
corresponding pin. This way control of GPIO on pins that are already used
by other peripherals can be denied and basic pinconf can be done on pin
controllers that support it.
Signed-off-by: Emil Renner Berthing <[email protected]>
---
Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
index eefe7b345286..ab2afc0e4153 100644
--- a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
@@ -65,6 +65,8 @@ patternProperties:
minItems: 1
maxItems: 32
+ gpio-ranges: true
+
ngpios:
default: 32
minimum: 1
--
2.40.1
Adjust labels for the TH1520 GPIO controllers such that GPIOs can be
referenced by the names used by the documentation. Eg.
GPIO0_X -> <&gpio0 X Y>
GPIO1_X -> <&gpio1 X Y>
GPIO2_X -> <&gpio2 X Y>
GPIO3_X -> <&gpio3 X Y>
GPIO4_X -> <&gpio4 X Y>
AOGPIO_X -> <&aogpio X Y>
Remove labels for the parent GPIO devices that shouldn't need to be
referenced.
Signed-off-by: Emil Renner Berthing <[email protected]>
---
.../boot/dts/thead/th1520-beaglev-ahead.dts | 2 ++
.../boot/dts/thead/th1520-lichee-pi-4a.dts | 2 ++
arch/riscv/boot/dts/thead/th1520.dtsi | 24 +++++++++----------
3 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
index 70e8042c8304..91ba96588ae8 100644
--- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
+++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
@@ -17,6 +17,8 @@ aliases {
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
+ gpio4 = &gpio4;
+ gpio5 = &aogpio;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
index 9a3884a73e13..0ae2c20d5641 100644
--- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
@@ -14,6 +14,8 @@ aliases {
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
+ gpio4 = &gpio4;
+ gpio5 = &aogpio;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index d5e2378a1afa..17ca214b5a97 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -206,13 +206,13 @@ uart3: serial@ffe7f04000 {
status = "disabled";
};
- gpio2: gpio@ffe7f34000 {
+ gpio@ffe7f34000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xe7f34000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- portc: gpio-controller@0 {
+ gpio2: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -225,13 +225,13 @@ portc: gpio-controller@0 {
};
};
- gpio3: gpio@ffe7f38000 {
+ gpio@ffe7f38000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xe7f38000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- portd: gpio-controller@0 {
+ gpio3: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -249,13 +249,13 @@ padctrl1_apsys: pinctrl@ffe7f3c000 {
reg = <0xff 0xe7f3c000 0x0 0x1000>;
};
- gpio0: gpio@ffec005000 {
+ gpio@ffec005000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xec005000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- porta: gpio-controller@0 {
+ gpio0: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -268,13 +268,13 @@ porta: gpio-controller@0 {
};
};
- gpio1: gpio@ffec006000 {
+ gpio@ffec006000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xec006000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- portb: gpio-controller@0 {
+ gpio1: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -410,13 +410,13 @@ timer7: timer@ffffc3303c {
status = "disabled";
};
- ao_gpio0: gpio@fffff41000 {
+ gpio@fffff41000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xfff41000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- porte: gpio-controller@0 {
+ aogpio: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -434,13 +434,13 @@ padctrl_aosys: pinctrl@fffff4a000 {
reg = <0xff 0xfff4a000 0x0 0x2000>;
};
- ao_gpio1: gpio@fffff52000 {
+ gpio@fffff52000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xfff52000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- portf: gpio-controller@0 {
+ gpio4: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
--
2.40.1
On Fri, 15 Dec 2023 15:39:02 +0100, Emil Renner Berthing wrote:
> Allow the generic gpio-ranges property so GPIOs can be mapped to their
> corresponding pin. This way control of GPIO on pins that are already used
> by other peripherals can be denied and basic pinconf can be done on pin
> controllers that support it.
>
> Signed-off-by: Emil Renner Berthing <[email protected]>
> ---
> Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring <[email protected]>
On Fri, Dec 15, 2023 at 3:39 PM Emil Renner Berthing
<[email protected]> wrote:
>
> Allow the generic gpio-ranges property so GPIOs can be mapped to their
> corresponding pin. This way control of GPIO on pins that are already used
> by other peripherals can be denied and basic pinconf can be done on pin
> controllers that support it.
>
> Signed-off-by: Emil Renner Berthing <[email protected]>
> ---
> Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
> index eefe7b345286..ab2afc0e4153 100644
> --- a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
> +++ b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
> @@ -65,6 +65,8 @@ patternProperties:
> minItems: 1
> maxItems: 32
>
> + gpio-ranges: true
> +
> ngpios:
> default: 32
> minimum: 1
> --
> 2.40.1
>
Applied, thanks!
Bart