2023-12-19 18:59:31

by Konrad Dybcio

Subject: [PATCH 0/2] 8650 PLL config updates

Some TEST_CTL values were missing, add them.

Signed-off-by: Konrad Dybcio <[email protected]>
---
Konrad Dybcio (2):
clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config

drivers/clk/qcom/dispcc-sm8650.c | 8 ++++++++
drivers/clk/qcom/gpucc-sm8650.c | 2 ++
2 files changed, 10 insertions(+)
---
base-commit: aa4db8324c4d0e67aa4670356df4e9fae14b4d37
change-id: 20231219-topic-8650_clks-e45e94ae458b

Best regards,
--
Konrad Dybcio <[email protected]>

2023-12-19 18:59:41

by Konrad Dybcio

Subject: [PATCH 1/2] clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config

These values were missing. Add them.

Fixes: 8676fd4f3874 ("clk: qcom: add the SM8650 GPU Clock Controller driver")
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/clk/qcom/gpucc-sm8650.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/drivers/clk/qcom/gpucc-sm8650.c b/drivers/clk/qcom/gpucc-sm8650.c
index 5ae494e17ee4..03307e482aca 100644
--- a/drivers/clk/qcom/gpucc-sm8650.c
+++ b/drivers/clk/qcom/gpucc-sm8650.c
@@ -50,6 +50,7 @@ static const struct alpha_pll_config gpu_cc_pll0_config = {
.test_ctl_val = 0x00000000,
.test_ctl_hi_val = 0x00000003,
.test_ctl_hi1_val = 0x00009000,
+ .test_ctl_hi2_val = 0x00000034,
.user_ctl_val = 0x00000000,
.user_ctl_hi_val = 0x00000005,
};
@@ -80,6 +81,7 @@ static const struct alpha_pll_config gpu_cc_pll1_config = {
.test_ctl_val = 0x00000000,
.test_ctl_hi_val = 0x00000003,
.test_ctl_hi1_val = 0x00009000,
+ .test_ctl_hi2_val = 0x00000034,
.user_ctl_val = 0x00000000,
.user_ctl_hi_val = 0x00000005,
};

--
2.43.0

2023-12-19 19:04:21

by Konrad Dybcio

Subject: [PATCH 2/2] clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config

These values were missing. Add them.

Fixes: 9e939f008338 ("clk: qcom: add the SM8650 Display Clock Controller driver")
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/clk/qcom/dispcc-sm8650.c | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/drivers/clk/qcom/dispcc-sm8650.c b/drivers/clk/qcom/dispcc-sm8650.c
index 6283099faf57..f3b1d9d16bae 100644
--- a/drivers/clk/qcom/dispcc-sm8650.c
+++ b/drivers/clk/qcom/dispcc-sm8650.c
@@ -79,6 +79,10 @@ static const struct alpha_pll_config disp_cc_pll0_config = {
.config_ctl_val = 0x20485699,
.config_ctl_hi_val = 0x00182261,
.config_ctl_hi1_val = 0x82aa299c,
+ .test_ctl_val = 0x00000000,
+ .test_ctl_hi_val = 0x00000003,
+ .test_ctl_hi1_val = 0x00009000,
+ .test_ctl_hi2_val = 0x00000034,
.user_ctl_val = 0x00000000,
.user_ctl_hi_val = 0x00000005,
};
@@ -106,6 +110,10 @@ static const struct alpha_pll_config disp_cc_pll1_config = {
.config_ctl_val = 0x20485699,
.config_ctl_hi_val = 0x00182261,
.config_ctl_hi1_val = 0x82aa299c,
+ .test_ctl_val = 0x00000000,
+ .test_ctl_hi_val = 0x00000003,
+ .test_ctl_hi1_val = 0x00009000,
+ .test_ctl_hi2_val = 0x00000034,
.user_ctl_val = 0x00000000,
.user_ctl_hi_val = 0x00000005,
};

--
2.43.0

2023-12-19 20:28:25

by Bjorn Andersson

Subject: Re: [PATCH 0/2] 8650 PLL config updates

On Tue, 19 Dec 2023 19:55:31 +0100, Konrad Dybcio wrote:
> Some TEST_CTL values were missing, add them.
>
>

Applied, thanks!

[1/2] clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
commit: 3f8d7f490a33625786b427ec925215c4c1f191d1
[2/2] clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
commit: 757d1ca14f94e4e00777491dcab0b4abee18f9bf

Best regards,
--
Bjorn Andersson <[email protected]>