2023-12-20 15:58:01

by Clément Léger

[permalink] [raw]

Subject: [PATCH v2 1/6] riscv: add ISA extension parsing for Ztso

---

Add support to parse the Ztso string in the riscv,isa string. The
bindings already supports it but not the ISA parsing code.

Signed-off-by: Clément Léger <[email protected]>
---
arch/riscv/include/asm/hwcap.h | 1 +
arch/riscv/kernel/cpufeature.c | 1 +
2 files changed, 2 insertions(+)

diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
index 2438d4685da6..3b31efe2f716 100644
--- a/arch/riscv/include/asm/hwcap.h
+++ b/arch/riscv/include/asm/hwcap.h
@@ -84,6 +84,7 @@
#define RISCV_ISA_EXT_ZVFH 69
#define RISCV_ISA_EXT_ZVFHMIN 70
#define RISCV_ISA_EXT_ZFA 71
+#define RISCV_ISA_EXT_ZTSO 72

#define RISCV_ISA_EXT_MAX 128
#define RISCV_ISA_EXT_INVALID U32_MAX
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index dc0ab3e97cd2..3eb48a0eecb3 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -279,6 +279,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = {
__RISCV_ISA_EXT_DATA(zkt, RISCV_ISA_EXT_ZKT),
__RISCV_ISA_EXT_DATA(zksed, RISCV_ISA_EXT_ZKSED),
__RISCV_ISA_EXT_DATA(zksh, RISCV_ISA_EXT_ZKSH),
+ __RISCV_ISA_EXT_DATA(ztso, RISCV_ISA_EXT_ZTSO),
__RISCV_ISA_EXT_SUPERSET(zvbb, RISCV_ISA_EXT_ZVBB, riscv_zvbb_exts),
__RISCV_ISA_EXT_DATA(zvbc, RISCV_ISA_EXT_ZVBC),
__RISCV_ISA_EXT_DATA(zvfh, RISCV_ISA_EXT_ZVFH),
--
2.43.0

2024-01-10 11:32:24

by Conor Dooley

[permalink] [raw]

Subject: Re: [PATCH v2 1/6] riscv: add ISA extension parsing for Ztso

---

On Wed, Dec 20, 2023 at 04:57:17PM +0100, Cl?ment L?ger wrote:
> Add support to parse the Ztso string in the riscv,isa string. The
> bindings already supports it but not the ISA parsing code.
>
> Signed-off-by: Cl?ment L?ger <[email protected]>

Reviewed-by: Conor Dooley <[email protected]>

Cheers,
Conor.

> ---
> arch/riscv/include/asm/hwcap.h | 1 +
> arch/riscv/kernel/cpufeature.c | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
> index 2438d4685da6..3b31efe2f716 100644
> --- a/arch/riscv/include/asm/hwcap.h
> +++ b/arch/riscv/include/asm/hwcap.h
> @@ -84,6 +84,7 @@
> #define RISCV_ISA_EXT_ZVFH 69
> #define RISCV_ISA_EXT_ZVFHMIN 70
> #define RISCV_ISA_EXT_ZFA 71
> +#define RISCV_ISA_EXT_ZTSO 72
>
> #define RISCV_ISA_EXT_MAX 128
> #define RISCV_ISA_EXT_INVALID U32_MAX
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index dc0ab3e97cd2..3eb48a0eecb3 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -279,6 +279,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = {
> __RISCV_ISA_EXT_DATA(zkt, RISCV_ISA_EXT_ZKT),
> __RISCV_ISA_EXT_DATA(zksed, RISCV_ISA_EXT_ZKSED),
> __RISCV_ISA_EXT_DATA(zksh, RISCV_ISA_EXT_ZKSH),
> + __RISCV_ISA_EXT_DATA(ztso, RISCV_ISA_EXT_ZTSO),
> __RISCV_ISA_EXT_SUPERSET(zvbb, RISCV_ISA_EXT_ZVBB, riscv_zvbb_exts),
> __RISCV_ISA_EXT_DATA(zvbc, RISCV_ISA_EXT_ZVBC),
> __RISCV_ISA_EXT_DATA(zvfh, RISCV_ISA_EXT_ZVFH),
> --
> 2.43.0
>

---

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