Adding a new driver for the MIPI CSI CD-PHY module v 0.5 embedded in
some Mediatek soc, such as the MT8365
This driver was adapted from https://patchwork.kernel.org/project/linux-mediatek/cover/[email protected]/
v1 can be found here: https://lore.kernel.org/all/[email protected]/
v2 can be found here: https://lore.kernel.org/all/[email protected]/
v3 can be found here: https://lore.kernel.org/all/[email protected]/
v4 can be found here: https://lore.kernel.org/linux-phy/[email protected]/
Changelog
Changes in v5:
- rebase on latest master scheduled for 6.8-rc1
- sort alphabetically CONFIG_PHY_MTK_MIPI_CSI_0_5 in Kconfig and Makefile
- put lines under 100 chars on one line
Changes in v4:
include/dt-bindings/phy/phy.h:
- remove commit adding PHY_TYPE_CDPHY definition
Binding file:
- use the standard phy-type property instead of a custom one so
rename mediatek,phy-type -> phy-type
- phy-type property is made optional: when present, describes the
phy type and the operating mode
- phy-cell is modified to accept a phy argument representing the
phy operating mode if phy-type is not specified
- adding new property num-lanes
Driver:
- add a custom xlate function to handle phy cells
- update probe function to retrieve the new value phy-type
instead of the mediatek,phy-type
- remove useless struct define `struct mtk_mipi_dphy;`
- rename some functin/variable from `xx_dphy_xx` to `xx_cdphy_xx`
- update probe function to read num-lanes property
Changes in v3:
Binding file:
- rename compatible string
mediatek,phy-mipi-csi-0-5 -> mediatek,mt8365-csi-rx
- rename binding file to be as compatible string
- change property mediatek,is_cdphy -> mediatek,phy-type using an
enum value instead of boolean for scalability
- remove status property from example nodes
- rename example node name 'mipi_rx_csi0: mipi_rx_csi0@11c10000' ->
'csi0_rx: phy@11c10000'
- put reg address in lower case
include/dt-bindings/phy/phy.h:
- add PHY_TYPE_CDPHY definition
Driver:
- rename compatible string
- rename property mediatek,is_cdphy -> mediatek,phy-type
- rename CSIx* macro to CSIX* (x -> X)
- fix style issue on the driver data structure
- update MODULE_DESCRIPTION as suggested by Angelo
and update the kconfig module description to match it
- add dphy /cdphy eq tuning function to factor the code
and increase readability
- fix typo __PHY_MTK__MIPI_CSI__C_0_5_RX_REG_H_ -->
__PHY_MTK_MIPI_CSI_V_0_5_RX_REG_H_
- reword commit message to update my contributions
- added missing copyright
- added module name in Kconfig
Changes in v2:
- fix all comments on bindings
- move the binding chunk from driver to binding commit
- fix dt_binding_check error (reported by DT_CHECKER_FLAGS)
- use a more generic compatible string
- add a new dt properties to simplify the driver
"mediatek,is_cdphy"
- rename the driver and the corresponding file to include
version
- drop of_match_ptr()
- use devm_platform_ioremap_resource
- use phy-mtk-io.h api instead of regmap
- rework the driver to use dt nodes to declare PHY instead of an
array in the driver
- remove useless define for unused registers
- remove support for CSI0A/B because it cannot be tested, and it
simplifies the driver for a first review
- edit commit message and bindings to be more descriptive about the
hardware
Florian Sylvestre (1):
dt-bindings: phy: add mediatek MIPI CD-PHY module v0.5
Phi-bang Nguyen (1):
phy: mtk-mipi-csi: add driver for CSI phy
.../bindings/phy/mediatek,mt8365-csi-rx.yaml | 79 +++++
MAINTAINERS | 7 +
drivers/phy/mediatek/Kconfig | 12 +
drivers/phy/mediatek/Makefile | 2 +
.../mediatek/phy-mtk-mipi-csi-0-5-rx-reg.h | 62 ++++
drivers/phy/mediatek/phy-mtk-mipi-csi-0-5.c | 294 ++++++++++++++++++
6 files changed, 456 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/mediatek,mt8365-csi-rx.yaml
create mode 100644 drivers/phy/mediatek/phy-mtk-mipi-csi-0-5-rx-reg.h
create mode 100644 drivers/phy/mediatek/phy-mtk-mipi-csi-0-5.c
--
2.43.0
From: Florian Sylvestre <[email protected]>
This adds the bindings, for the MIPI CD-PHY module v0.5 embedded in
some Mediatek soc, such as the mt8365
Signed-off-by: Florian Sylvestre <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
.../bindings/phy/mediatek,mt8365-csi-rx.yaml | 79 +++++++++++++++++++
MAINTAINERS | 6 ++
2 files changed, 85 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/mediatek,mt8365-csi-rx.yaml
diff --git a/Documentation/devicetree/bindings/phy/mediatek,mt8365-csi-rx.yaml b/Documentation/devicetree/bindings/phy/mediatek,mt8365-csi-rx.yaml
new file mode 100644
index 000000000000..2127a5732f73
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/mediatek,mt8365-csi-rx.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2023 MediaTek, BayLibre
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/mediatek,mt8365-csi-rx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek Sensor Interface MIPI CSI CD-PHY
+
+maintainers:
+ - Julien Stephan <[email protected]>
+ - Andy Hsieh <[email protected]>
+
+description:
+ The SENINF CD-PHY is a set of CD-PHY connected to the SENINF CSI-2
+ receivers. The number of PHYs depends on the SoC model.
+ Depending on the SoC model, each PHYs can be either CD-PHY or D-PHY only
+ capable.
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8365-csi-rx
+
+ reg:
+ maxItems: 1
+
+ num-lanes:
+ enum: [2, 3, 4]
+
+ '#phy-cells':
+ enum: [0, 1]
+ description: |
+ If the PHY doesn't support mode selection then #phy-cells must be 0 and
+ PHY mode is described using phy-type property.
+ If the PHY supports mode selection, then #phy-cells must be 1 and mode
+ is set in the PHY cells. Supported modes are:
+ - PHY_TYPE_DPHY
+ - PHY_TYPE_CPHY
+ See include/dt-bindings/phy/phy.h for constants.
+
+ phy-type:
+ description:
+ If the PHY doesn't support mode selection then this set the operating mode.
+ See include/dt-bindings/phy/phy.h for constants.
+ const: 10
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+required:
+ - compatible
+ - reg
+ - num-lanes
+ - '#phy-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/phy/phy.h>
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ csi0_rx: phy@11c10000 {
+ compatible = "mediatek,mt8365-csi-rx";
+ reg = <0 0x11c10000 0 0x2000>;
+ num-lanes = <2>;
+ #phy-cells = <1>;
+ };
+
+ csi1_rx: phy@11c12000 {
+ compatible = "mediatek,mt8365-csi-rx";
+ reg = <0 0x11c12000 0 0x2000>;
+ phy-type = <PHY_TYPE_DPHY>;
+ num-lanes = <2>;
+ #phy-cells = <0>;
+ };
+ };
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index cc92b10a4cad..37dfa99b0eb0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13569,6 +13569,12 @@ F: Documentation/devicetree/bindings/media/mediatek-vpu.txt
F: drivers/media/platform/mediatek/vcodec/
F: drivers/media/platform/mediatek/vpu/
+MEDIATEK MIPI-CSI CDPHY DRIVER
+M: Julien Stephan <[email protected]>
+M: Andy Hsieh <[email protected]>
+S: Supported
+F: Documentation/devicetree/bindings/phy/mediatek,mt8365-csi-rx.yaml
+
MEDIATEK MMC/SD/SDIO DRIVER
M: Chaotian Jing <[email protected]>
S: Maintained
--
2.43.0
On 11-01-24, 11:14, Julien Stephan wrote:
> Adding a new driver for the MIPI CSI CD-PHY module v 0.5 embedded in
> some Mediatek soc, such as the MT8365
You would want to fix the way you send patches, the series is disjoint.
I had to apply them manually, but please fix your process
--
~Vinod