Describe soc-nvmem subnode as the part of firmware node. The name can't be
pure nvmem because dt-schema already defines it as array property that's
why different name should be used.
Signed-off-by: Michal Simek <[email protected]>
---
Changes in v2:
- Fix typo in subject
- Make example bigger requested by Conor
Dt binding for nvmem node has been already merged and it is the part of
linux-next tree.
Here is the reference to it just in case:
https://lore.kernel.org/r/[email protected]
v1 available here:
https://lore.kernel.org/r/3869498c995cbb123127122f429e90de0a3f4014.1706531104.git.michal.simek@amd.com
---
.../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
index 870b94813a43..741f17c830f4 100644
--- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
+++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
@@ -62,6 +62,12 @@ properties:
interface.
type: object
+ soc-nvmem:
+ $ref: /schemas/nvmem/xlnx,zynqmp-nvmem.yaml#
+ description: The ZynqMP MPSoC provides access to the hardware related data
+ like SOC revision, IDCODE and specific purpose efuses.
+ type: object
+
pcap:
$ref: /schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml#
description: The ZynqMP SoC uses the PCAP (Processor Configuration Port) to
@@ -110,6 +116,18 @@ examples:
firmware {
zynqmp_firmware: zynqmp-firmware {
#power-domain-cells = <1>;
+ soc-nvmem {
+ compatible = "xlnx,zynqmp-nvmem-fw";
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ soc_revision: soc-revision@0 {
+ reg = <0x0 0x4>;
+ };
+ };
+ };
gpio {
compatible = "xlnx,zynqmp-gpio-modepin";
gpio-controller;
--
2.36.1
On Wed, Jan 31, 2024 at 10:17:28AM +0100, Michal Simek wrote:
> Describe soc-nvmem subnode as the part of firmware node. The name can't be
> pure nvmem because dt-schema already defines it as array property that's
> why different name should be used.
>
> Signed-off-by: Michal Simek <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Cheers,
Conor.
> ---
>
> Changes in v2:
> - Fix typo in subject
> - Make example bigger requested by Conor
>
> Dt binding for nvmem node has been already merged and it is the part of
> linux-next tree.
> Here is the reference to it just in case:
> https://lore.kernel.org/r/[email protected]
>
> v1 available here:
> https://lore.kernel.org/r/3869498c995cbb123127122f429e90de0a3f4014.1706531104.git.michal.simek@amd.com
>
> ---
> .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> index 870b94813a43..741f17c830f4 100644
> --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> @@ -62,6 +62,12 @@ properties:
> interface.
> type: object
>
> + soc-nvmem:
> + $ref: /schemas/nvmem/xlnx,zynqmp-nvmem.yaml#
> + description: The ZynqMP MPSoC provides access to the hardware related data
> + like SOC revision, IDCODE and specific purpose efuses.
> + type: object
> +
> pcap:
> $ref: /schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml#
> description: The ZynqMP SoC uses the PCAP (Processor Configuration Port) to
> @@ -110,6 +116,18 @@ examples:
> firmware {
> zynqmp_firmware: zynqmp-firmware {
> #power-domain-cells = <1>;
> + soc-nvmem {
> + compatible = "xlnx,zynqmp-nvmem-fw";
> + nvmem-layout {
> + compatible = "fixed-layout";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + soc_revision: soc-revision@0 {
> + reg = <0x0 0x4>;
> + };
> + };
> + };
> gpio {
> compatible = "xlnx,zynqmp-gpio-modepin";
> gpio-controller;
> --
> 2.36.1
>
On 1/31/24 10:17, Michal Simek wrote:
> Describe soc-nvmem subnode as the part of firmware node. The name can't be
> pure nvmem because dt-schema already defines it as array property that's
> why different name should be used.
>
> Signed-off-by: Michal Simek <[email protected]>
> ---
>
> Changes in v2:
> - Fix typo in subject
> - Make example bigger requested by Conor
>
> Dt binding for nvmem node has been already merged and it is the part of
> linux-next tree.
> Here is the reference to it just in case:
> https://lore.kernel.org/r/[email protected]
>
> v1 available here:
> https://lore.kernel.org/r/3869498c995cbb123127122f429e90de0a3f4014.1706531104.git.michal.simek@amd.com
>
> ---
> .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> index 870b94813a43..741f17c830f4 100644
> --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> @@ -62,6 +62,12 @@ properties:
> interface.
> type: object
>
> + soc-nvmem:
> + $ref: /schemas/nvmem/xlnx,zynqmp-nvmem.yaml#
> + description: The ZynqMP MPSoC provides access to the hardware related data
> + like SOC revision, IDCODE and specific purpose efuses.
> + type: object
> +
> pcap:
> $ref: /schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml#
> description: The ZynqMP SoC uses the PCAP (Processor Configuration Port) to
> @@ -110,6 +116,18 @@ examples:
> firmware {
> zynqmp_firmware: zynqmp-firmware {
> #power-domain-cells = <1>;
> + soc-nvmem {
> + compatible = "xlnx,zynqmp-nvmem-fw";
> + nvmem-layout {
> + compatible = "fixed-layout";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + soc_revision: soc-revision@0 {
> + reg = <0x0 0x4>;
> + };
> + };
> + };
> gpio {
> compatible = "xlnx,zynqmp-gpio-modepin";
> gpio-controller;
Applied.
M