From: Claudiu Beznea <[email protected]>
Hi,
Series addresses few typos identified in r9a08g04{3,4} clock drivers.
Thank you,
Claudiu Beznea
Claudiu Beznea (2):
clk: renesas: r9a08g04{3,4}: Use SEL_SDHI1_STS status configuration
for SD1 mux
clk: renesas: r9a07g04{3,4}: Fix typo for sel_shdi variable
drivers/clk/renesas/r9a07g043-cpg.c | 6 +++---
drivers/clk/renesas/r9a07g044-cpg.c | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
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2.39.2